TWM499651U - Light emitting diode - Google Patents
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Description
本新型是有關於一種發光元件,特別是指一種發光二極體(LED)。The present invention relates to a light-emitting element, and more particularly to a light-emitting diode (LED).
近幾年來,基於技術的演進,LED的應用越來越廣。因應著LED的升級,照明市場對於LED的需求量不僅與日俱增;此外,高功率LED的開發也因此孕育而生。就高功率LED的設計而言,目前常見的技術多半是以大尺寸單顆低壓值流LED為主,其主要做法可分成傳統的水平導通結構與垂直導通結構。然而,前述高功率LED的操作模式通常是被操作在大電流之下。因此,一旦些微不平衡的P、N電極設計,則容易導致此技術領域所不欲見的電流叢聚效應(current crowding),其不只達不到設計所需的亮度,也會損壞LED的可靠度。基於前述問題,業界更進一步地發展出了高壓發光二極體(HV LED)。In recent years, based on the evolution of technology, LED applications have become more widespread. In response to the upgrade of LEDs, the demand for LEDs in the lighting market is not only increasing; in addition, the development of high-power LEDs has been born. As far as the design of high-power LEDs is concerned, most of the current common technologies are mainly large-sized single low-voltage current LEDs, and the main methods can be divided into traditional horizontal conduction structures and vertical conduction structures. However, the operational modes of the aforementioned high power LEDs are typically operated at high currents. Therefore, once the micro-unbalanced P and N electrodes are designed, it is easy to cause current crowding which is not desired in the technical field, which not only fails to achieve the brightness required for the design, but also damages the reliability of the LED. degree. Based on the aforementioned problems, the industry has further developed high voltage light emitting diodes (HV LEDs).
參閱圖1,一種傳統的高壓發光二極體(以下稱前案1)1,主要包含:一藍寶石基板11、複數彼此相間隔地設置於該藍寶石基板11上的微晶粒12、一絕緣保護層13,及複數連接於兩相鄰微晶粒12的金屬導電層14。每一微晶粒12包括一形成有一平台的N型氮化鎵(n-GaN)層121、一蓋設於該N型氮化鎵層121且未覆蓋該平台的多重量子井 層(MQW)122、一蓋設於該多重量子井層122的P型氮化鎵層123、一蓋設於該P型氮化鎵層123的透明導電層124、一設置於該N型氮化鎵層121之平台上以電連接該N型氮化鎵層121的N型電極層125,與一設置於該透明導電層124上以電連接該P型氮化鎵層123的P型電極層126。該絕緣保護層13覆蓋該等微晶粒12以使各微晶粒12之N型電極層125與P型電極層126顯露於外。該等金屬導電層14是分別連接每兩相鄰之微晶粒12上的P型電極層126與N型電極層125,以使該等微晶粒12以電串聯方式導通。然而,由於該藍寶石基板11的熱傳係數(thermal conductivity)低,導致散熱效果差,降低發光效率。Referring to FIG. 1 , a conventional high-voltage light-emitting diode (hereinafter referred to as the first case 1) 1 mainly includes a sapphire substrate 11 , a plurality of micro-grains 12 disposed on the sapphire substrate 11 spaced apart from each other, and an insulation protection. Layer 13, and a plurality of metal conductive layers 14 connected to two adjacent micro-grains 12. Each micro-die 12 includes an N-type gallium nitride (n-GaN) layer 121 formed with a terrace, a multiple quantum well covered on the N-type gallium nitride layer 121 and not covering the platform. a layer (MQW) 122, a P-type gallium nitride layer 123 disposed on the multiple quantum well layer 122, a transparent conductive layer 124 disposed on the P-type gallium nitride layer 123, and a N-type nitrogen An N-type electrode layer 125 electrically connecting the N-type gallium nitride layer 121 on the platform of the gallium layer 121, and a P-type electrode disposed on the transparent conductive layer 124 to electrically connect the P-type gallium nitride layer 123 Layer 126. The insulating protective layer 13 covers the micro-grains 12 such that the N-type electrode layer 125 and the P-type electrode layer 126 of each of the micro-grains 12 are exposed. The metal conductive layers 14 are respectively connected to the P-type electrode layer 126 and the N-type electrode layer 125 on each of the two adjacent micro-grains 12, so that the micro-grains 12 are electrically connected in series. However, since the sapphire substrate 11 has a low thermal conductivity, the heat dissipation effect is poor, and the luminous efficiency is lowered.
參圖2,為了解決散熱問題,如台灣第I317162核准公告號發明專利案(以下稱前案2)則是公開一種傳統的覆晶式(flip chip)發光二極體封裝結構2,主要包含一發光二極體21、一導熱基板22、一絕緣層23、一焊墊24,及一共晶層25。該發光二極體21的結構是雷同於圖1所顯示之微晶粒12,其不同處是在於,該發光二極體21包括一藍寶石基板211、一磊製於該藍寶石基板211上之以氮化鎵為主的磊晶膜層結構212,及設置於該磊晶膜層結構212上的一第一電極213與一第二電極214。該發光二極體21是在翻轉180度後以蓋設於該導熱基板22之上。該絕緣層23位於該導熱基板22上,該焊墊24則是夾置於該絕緣層23與該第二電極214間,且該共晶層25是自該導熱基板22向上延伸至該第一電極213。然而,由圖2所顯示的結 構可知,由於該磊晶膜層結構212之一下表面並無等高。因此,於製作導電金(Au)層以製備該第二電極214時,則須額外地耗費較久的時間成本與較多的耗材成本來製作該第二電極層214,以盡量縮減該第一電極213與該第二電極214兩者的高度差。再者,前述作法工序繁瑣,仍須使用到焊墊24才能完成覆晶程序(flip chip program),也因此衍生出了製程良率低的問題。Referring to FIG. 2, in order to solve the heat dissipation problem, for example, the Taiwan Patent No. I317162 Approved Announcement No. (hereinafter referred to as the former case 2) discloses a conventional flip chip light-emitting diode package structure 2, which mainly includes a The light emitting diode 21, a heat conducting substrate 22, an insulating layer 23, a solder pad 24, and a eutectic layer 25. The structure of the light-emitting diode 21 is the same as that of the micro-crystal 12 shown in FIG. 1 , and the difference is that the light-emitting diode 21 includes a sapphire substrate 211 and a display on the sapphire substrate 211 . A gallium nitride-based epitaxial film layer structure 212, and a first electrode 213 and a second electrode 214 disposed on the epitaxial film layer structure 212. The LED 21 is placed on the thermally conductive substrate 22 after being turned 180 degrees. The insulating layer 23 is disposed on the thermally conductive substrate 22, and the bonding pad 24 is interposed between the insulating layer 23 and the second electrode 214, and the eutectic layer 25 extends upward from the thermally conductive substrate 22 to the first Electrode 213. However, the knot shown by Figure 2 It can be seen that the lower surface of one of the epitaxial film layer structures 212 has no equal height. Therefore, when the conductive gold (Au) layer is formed to prepare the second electrode 214, the second electrode layer 214 is additionally required to be used for a long time cost and more consumable cost, so as to minimize the first The height difference between the electrode 213 and the second electrode 214 is different. Furthermore, the above-mentioned process is cumbersome, and the pad 24 must be used to complete the flip chip program, thereby deducing the problem of low process yield.
根據上述前案1與前案2的說明可知,縱算是該傳統的高壓發光二極體1可利用覆晶程序來解決散熱問題。然而,該傳統的高壓發光二極體1上之各微晶粒12的N型氮化鎵層121平台與P型氮化鎵層123並非等高。因此,該前案1也需要如同該前案2般,不只需耗費額外的時間與耗材來製作各N型電極層125,以縮短各N型電極層125與各P型電極126間的高度差;再者,更需透過焊墊才可完成覆晶程序。According to the descriptions of the foregoing first case 1 and the previous case 2, it can be seen that the conventional high-voltage light-emitting diode 1 can use the flip chip program to solve the heat dissipation problem. However, the N-type gallium nitride layer 121 of each of the micro-grains 12 on the conventional high-voltage LED 1 is not of the same height as the P-type gallium nitride layer 123. Therefore, the first case 1 also needs to be as in the prior case 2, and it is not necessary to spend extra time and consumables to fabricate each of the N-type electrode layers 125 to shorten the height difference between each of the N-type electrode layers 125 and each of the P-type electrodes 126. Furthermore, it is more necessary to complete the flip chip process through the pad.
經上述說明可知,因應高壓發光二極體的需求以解決發光二極體之散熱問題的同時,亦能維持應有的製程良率並降低生產成本,是此技術領域的相關技術人員所待突破的難題。According to the above description, in view of the demand of the high-voltage light-emitting diode to solve the heat-dissipating problem of the light-emitting diode, it is also possible to maintain the desired process yield and reduce the production cost, which is a breakthrough for the relevant technical personnel in this technical field. Puzzle.
因此,本新型之目的,即在提供一種發光二極體。Therefore, the object of the present invention is to provide a light-emitting diode.
本新型之又一目的,即在提供另一種發光二極體。A further object of the present invention is to provide another light emitting diode.
於是,本新型發光二極體包含:一磊晶基板、一發光晶粒,及兩金屬導電層。該發光晶粒設置於該磊晶基板上,且包括一具有一平台與一鄰設於該平台之凸柱的第一型半導體層、一磊製於該平台的主動層,及一磊製於該主動層上且不與該第一型半導體層之凸柱接觸的第二型半導體層。該第二型半導體層之一頂面與該第一型半導體層之凸柱的一頂面是實質等高。該等金屬導電層是分別設置於該發光晶粒的第二型半導體層上與該第一型半導體層之凸柱上。Therefore, the novel light-emitting diode comprises: an epitaxial substrate, a light-emitting die, and two metal conductive layers. The illuminating die is disposed on the epitaxial substrate, and includes a first type semiconductor layer having a platform and a pillar adjacent to the platform, an active layer protruding on the platform, and a display layer a second type semiconductor layer on the active layer that is not in contact with the studs of the first type semiconductor layer. A top surface of one of the second type semiconductor layers is substantially equal in height to a top surface of the stud of the first type semiconductor layer. The metal conductive layers are respectively disposed on the second type semiconductor layer of the light emitting die and the stud of the first type semiconductor layer.
又,本新型另一種發光二極體,包含:一磊晶基板、複數發光晶粒、複數絕緣物,及複數金屬導電層。該等發光晶粒分別彼此間隔地設置於該磊晶基板上,且相鄰發光晶粒間共同定義出複數溝渠。每一發光晶粒包括一磊製於該磊晶基板之上且具有一平台與一鄰設於該平台之凸柱的第一型半導體層、一磊製於該平台上主動層,及一磊製於該主動層上且不與該第一型半導體層之凸柱接觸的第二型半導體層。各第二型半導體層之一頂面與各第一型半導體層之凸柱的一頂面是實質等高。該等絕緣物是分別填入各溝渠內。該等金屬導電層中的其中兩金屬導電層是分別設置於最外側之兩發光晶粒的第二型半導體層上與凸柱上,且剩餘的金屬導電層是分別設置於每兩相鄰之發光晶粒的凸柱上與第二型半導體層上,以電連接每兩相鄰之發光晶粒。Moreover, another light-emitting diode of the present invention comprises: an epitaxial substrate, a plurality of light-emitting crystal grains, a plurality of insulating materials, and a plurality of metal conductive layers. The illuminating dies are respectively disposed on the epitaxial substrate at intervals, and a plurality of trenches are defined together between adjacent illuminating dies. Each of the illuminating dies includes a first type semiconductor layer which is formed on the epitaxial substrate and has a platform and a stud adjacent to the platform, an active layer on the platform, and a lei A second type semiconductor layer formed on the active layer and not in contact with the stud of the first type semiconductor layer. A top surface of each of the second type semiconductor layers is substantially equal in height to a top surface of the pillars of each of the first type semiconductor layers. The insulators are filled into the respective trenches. Two of the metal conductive layers are respectively disposed on the second type semiconductor layer of the outermost two light emitting crystal grains and the stud, and the remaining metal conductive layers are respectively disposed adjacent to each other. The bumps of the light-emitting crystal grains are on the second type semiconductor layer to electrically connect each two adjacent light-emitting crystal grains.
本新型之功效在於,藉由該第二型半導體層之 頂面實質等高於該第一型半導體層之凸柱的頂面,有利於發光二極體在透過覆晶程序以解決散熱問題時,能避免耗費額外的電極耗材與製程工時以降低生產成本,也可避免使用焊墊來進行覆晶程序,以簡化製程工序並提升製程良率。The effect of the novel is that the second type semiconductor layer The top surface is substantially higher than the top surface of the stud of the first type semiconductor layer, which is advantageous for the light emitting diode to avoid additional electrode consumables and process man-hours to reduce production when the flip chip process is used to solve the heat dissipation problem. Cost, you can also avoid the use of solder pads to perform the flip chip process to simplify the process and improve the process yield.
3‧‧‧磊晶基板3‧‧‧ epitaxial substrate
4‧‧‧發光晶粒4‧‧‧Lighting grain
41‧‧‧第一型半導體層41‧‧‧First type semiconductor layer
411‧‧‧平台411‧‧‧ platform
412‧‧‧凸柱412‧‧‧Bump
42‧‧‧主動層42‧‧‧ active layer
43‧‧‧第二型半導體層43‧‧‧Second type semiconductor layer
5‧‧‧金屬導電層5‧‧‧Metal conductive layer
6‧‧‧導熱性的電路板6‧‧‧ Thermally conductive circuit board
61‧‧‧接點61‧‧‧Contacts
7‧‧‧溝渠7‧‧‧ Ditch
8‧‧‧絕緣物8‧‧‧Insulators
本新型之其他的特徵及功效,將於參照圖式的較佳實施例詳細說明中清楚地呈現,其中:圖1是一局部剖視圖,說明一種傳統的高壓發光二極體;圖2是一局部剖視圖,說明一種傳統的覆晶式發光二極體封裝結構;圖3是一正視示意圖,說明本新型發光二極體之一第一實施例;及圖4是一正視示意圖,說明本新型發光二極體之一第二實施例。Other features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments of the accompanying drawings, wherein: FIG. 1 is a partial cross-sectional view illustrating a conventional high-voltage light-emitting diode; FIG. The cross-sectional view illustrates a conventional flip-chip light-emitting diode package structure; FIG. 3 is a front view showing a first embodiment of the novel light-emitting diode; and FIG. 4 is a front elevational view showing the novel light-emitting diode A second embodiment of a polar body.
在本新型被詳細描述之前,應當注意在以下的說明內容中,類似的元件是以相同的編號來表示。Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.
參閱圖3,本新型發光二極體之一第一實施例包含一磊晶基板3、一設置於該磊晶基板3上的發光晶粒4、兩金屬導電層5,及一導熱性的電路板6。Referring to FIG. 3, a first embodiment of the novel light-emitting diode includes an epitaxial substrate 3, a light-emitting die 4 disposed on the epitaxial substrate 3, two metal conductive layers 5, and a thermal conductive circuit. Board 6.
該發光晶粒4包括一磊製於該磊晶基板3之上且具有一平台411與一鄰設於該平台411之凸柱412的第 一型半導體層41、一磊製於該平台411上的主動層42,及一磊製於該主動層42上且不與該第一型半導體層41之凸柱412接觸的第二型半導體層43。該平台411具有一粗糙化的表面。該第二型半導體層43之一頂面與該第一型半導體層41之凸柱412的一頂面是實質等高。該等金屬導電層5是分別設置於該發光晶粒4的第二型半導體層43上與凸柱412上,且分別電連接於該導熱性的電路板6之兩接點61。The illuminating die 4 includes a protrusion 143 on the epitaxial substrate 3 and a platform 411 and a protrusion 412 adjacent to the platform 411. A semiconductor layer 41, an active layer 42 protruding on the platform 411, and a second type semiconductor layer protruding on the active layer 42 and not in contact with the studs 412 of the first type semiconductor layer 41 43. The platform 411 has a roughened surface. A top surface of the second type semiconductor layer 43 and a top surface of the stud 412 of the first type semiconductor layer 41 are substantially equal in height. The metal conductive layers 5 are respectively disposed on the second type semiconductor layer 43 of the light emitting die 4 and the bumps 412, and are electrically connected to the two contacts 61 of the thermally conductive circuit board 6, respectively.
在本新型該第一實施例中,該磊晶基板3、該第一型半導體層41、該發光層42、該第二型半導體層43,與該等金屬導電層5,分別是以一藍寶石基板、一n-GaN層、一(InGaN/GaN)n多層膜、一p-GaN層,及兩金電極層為例做說明。較佳地,該第一型半導體層41之凸柱412的高度是介於100μm至120μm間,且該第一型半導體層41之平台411的高度是介於55μm至65μm間。在本新型該第一實施例中,該第一型半導體層41之凸柱412的厚度是120μm,該第一型半導體層之平台411的高度是55μm,該發光層42的厚度是5μm,該第二型半導體層43的厚度是60μm。In the first embodiment of the present invention, the epitaxial substrate 3, the first type semiconductor layer 41, the light emitting layer 42, the second type semiconductor layer 43, and the metal conductive layers 5 are respectively a sapphire A substrate, an n-GaN layer, an (InGaN/GaN) n multilayer film, a p-GaN layer, and two gold electrode layers are exemplified. Preferably, the height of the stud 412 of the first type semiconductor layer 41 is between 100 μm and 120 μm, and the height of the land 411 of the first type semiconductor layer 41 is between 55 μm and 65 μm. In the first embodiment of the present invention, the thickness of the stud 412 of the first type semiconductor layer 41 is 120 μm, the height of the land 411 of the first type semiconductor layer is 55 μm, and the thickness of the luminescent layer 42 is 5 μm. The thickness of the second type semiconductor layer 43 is 60 μm.
此處需補充說明的是,當本新型該第一實施例之該磊晶基板3、該發光晶粒4及該等金屬導電層5是直接交由下游廠商實施後段處理(如,覆晶封裝)時,則本新型該第一實施例也可不包含該導熱性的電路板6。簡單地來說,本新型基於該第二型半導體層43之頂面是實質等高於該第一型半導體層41之凸柱412頂面,以致於供應包含有該磊 晶基板3、該發光晶粒4及該等金屬導電層5的發光二極體給下游廠商時,下游廠商能在省略掉焊墊的前提下,即可直接透過表面接著技術(surface mounting technology,SMT)將該等金屬導電層5接合至該導熱性的電路板6的接點61上。本新明該第一實施不只無須如同該前案2般(配合參圖2),尚需耗費額外的耗材與時間來增加該第二電極214的厚度,以藉此縮減該第一電極213與該第二電極214的高度差。此外,本新型該第一實施例更無需使用到焊墊即可完成覆晶程序,以致於製作程序簡化且良率高。It should be noted that, in the first embodiment of the present invention, the epitaxial substrate 3, the illuminating crystal 4 and the metal conductive layer 5 are directly processed by a downstream manufacturer (eg, flip chip packaging). In this case, the first embodiment of the present invention may not include the thermally conductive circuit board 6. In a simple manner, the top surface of the second type semiconductor layer 43 is substantially equal to the top surface of the pillar 412 of the first type semiconductor layer 41, so that the supply includes the Lei When the crystal substrate 3, the light-emitting crystal 4, and the light-emitting diodes of the metal conductive layers 5 are supplied to downstream manufacturers, the downstream manufacturers can directly pass through the surface mounting technology without omitting the solder pads. SMT) The metal conductive layers 5 are bonded to the contacts 61 of the thermally conductive circuit board 6. The first implementation of the present invention is not limited to the previous case 2 (in conjunction with FIG. 2), additional cost and time are required to increase the thickness of the second electrode 214, thereby reducing the first electrode 213 and The height difference of the second electrode 214. In addition, the first embodiment of the present invention can complete the flip chip process without using a pad, so that the fabrication process is simplified and the yield is high.
此外,該第一型半導體層41之平台411的粗糙化表面目的在於提升發光效率。然而,當本新型該第一實施例是被運用於普通亮度的照明設備時,則本新型該第一實施例是可以省略該粗糙化表面。Further, the roughened surface of the stage 411 of the first type semiconductor layer 41 is intended to improve luminous efficiency. However, when the first embodiment of the present invention is applied to a lighting device of ordinary brightness, the first embodiment of the present invention can omit the roughened surface.
參閱圖4,本新型發光二極體之一第二實施例大致上是相同於該第一實施例,其不同處是在於,該第二實施例還包含複數絕緣物8,且該發光晶粒4與該金屬導電層5的數量皆為複數個。在本新型該第二實施例中,該發光晶粒4的數量皆是以四個為例做說明,該金屬導電層5的數量則以五個為例做說明。本新型該第二實施例前述金屬導電層5的數量有別於該第一實施例,以致於該第二實施例之金屬導電層5的細部連接關係,及該散熱性的電路板6的連接關係也有別於該第一實施例。Referring to FIG. 4, a second embodiment of the novel light-emitting diode is substantially the same as the first embodiment, except that the second embodiment further includes a plurality of insulators 8, and the light-emitting die 4 and the number of the metal conductive layers 5 are plural. In the second embodiment of the present invention, the number of the light-emitting dies 4 is described by taking four examples. The number of the metal conductive layers 5 is exemplified by five. The number of the metal conductive layers 5 of the second embodiment of the present invention is different from that of the first embodiment, so that the detailed connection relationship of the metal conductive layer 5 of the second embodiment and the connection of the heat dissipation circuit board 6 The relationship is also different from the first embodiment.
具體地來說,該等發光晶粒4分別彼此間隔地設置於該磊晶基板3上,且相鄰發光晶粒4間共同定義出 複數溝渠7。該等絕緣物8是分別填入各溝渠7內。Specifically, the illuminating crystal grains 4 are respectively disposed on the epitaxial substrate 3 at intervals from each other, and the adjacent illuminating crystal grains 4 are commonly defined. Multiple ditches 7. The insulators 8 are filled into the respective trenches 7, respectively.
該等金屬導電層5中的其中兩金屬導電層5是分別形成於最外側之兩發光晶粒4的第二型半導體層43上與凸柱412上,且剩餘的金屬導電層5是分別形成於每兩相鄰之發光晶粒4的凸柱412上與第二型半導體層43上,以電連接每兩相鄰之發光晶粒4。位於最外側之兩發光晶粒4上的金屬導電層5是分別電連接於該導熱性的電路板6之各接點61。具體地來說,前述最外側之兩發光晶粒4所指的分別是如圖4所示之第一個(最左側)發光晶粒4與最後一個(最右側)發光晶粒4,且每兩相鄰之發光晶粒4也透過剩餘的金屬導電層5以依序電性連接;因此,該等發光晶粒4在本新型該第二實施例中,是以電串聯的方式依序電連接。Two of the metal conductive layers 5 are formed on the second type semiconductor layer 43 of the outermost two light emitting crystal grains 4 and the studs 412, respectively, and the remaining metal conductive layers 5 are respectively formed. Each of the two adjacent light-emitting dies 4 is electrically connected to the second type semiconductor layer 43 on the bump 412 of each two adjacent light-emitting dies 4. The metal conductive layers 5 on the outermost two light-emitting dies 4 are electrically connected to the respective contacts 61 of the thermally conductive circuit board 6. Specifically, the outermost two light-emitting dies 4 are referred to as the first (leftmost) luminescent crystal 4 and the last (rightmost) luminescent crystal 4 as shown in FIG. 4, respectively. The two adjacent light-emitting dies 4 are also electrically connected through the remaining metal conductive layers 5 in sequence; therefore, in the second embodiment of the present invention, the illuminating dies 4 are electrically connected in series. connection.
經上述第二實施例的詳細說明可知,本新型該第二實施例之發光二極體即是高壓發光二極體(HV LED)。如同第一實施例所述,本新型該第二實施例的發光二極體,藉由各第二型半導體層43之頂面實質等高於各第一型半導體層41之凸柱412的頂面的設計,有利於發光二極體在透過覆晶程序以解決散熱問題時,除了能避免耗費額外的電極耗材與製程工時以降低生產成本外,也可在省略掉焊墊的前提下,即可直接進行覆晶程序,以簡化製程工序並提升製程良率。As can be seen from the detailed description of the second embodiment, the light-emitting diode of the second embodiment of the present invention is a high-voltage light-emitting diode (HV LED). As shown in the first embodiment, the light-emitting diode of the second embodiment of the present invention has a top surface substantially higher than the top of each of the pillars 412 of each of the first-type semiconductor layers 41 by the top surface of each of the second-type semiconductor layers 43. The design of the surface is beneficial to the light-emitting diode in solving the heat dissipation problem through the flip chip process, in addition to avoiding the extra electrode consumables and process man-hours to reduce the production cost, and also omitting the solder pad. The flip chip process can be performed directly to simplify the process and improve the process yield.
綜上所述,本新型發光二極體藉由各實施例之第二型半導體層43之頂面實質等高於各第一型半導體層 41之凸柱412的頂面的設計,有利於發光二極體在透過覆晶程序以解決散熱問題時,能避免耗費額外的電極耗材與製程工時以降低生產成本,也可避免使用焊墊來進行覆晶程序,以簡化製程工序並提升製程良率,故確實能達成本新型之目的。In summary, the top surface of the second type semiconductor layer 43 of the present embodiment is substantially higher than the first type semiconductor layers by the second type semiconductor layer 43 of each embodiment. The design of the top surface of the stud 412 of the 41 is advantageous for the light-emitting diode to avoid the extra electrode consumables and process man-hours to reduce the production cost when the through-chip flipping process is used to solve the heat dissipation problem, and the use of the solder pad can be avoided. To carry out the flip chip process to simplify the process and improve the process yield, it is indeed possible to achieve the purpose of the present invention.
惟以上所述者,僅為本新型之實施例而已,當不能以此限定本新型實施之範圍,即大凡依本新型申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本新型專利涵蓋之範圍內。However, the above description is only for the embodiments of the present invention, and the scope of the present invention cannot be limited thereto, that is, the simple equivalent changes and modifications made by the present patent application scope and the contents of the patent specification are still It is within the scope of this new patent.
3‧‧‧磊晶基板3‧‧‧ epitaxial substrate
4‧‧‧發光晶粒4‧‧‧Lighting grain
41‧‧‧第一型半導體層41‧‧‧First type semiconductor layer
411‧‧‧平台411‧‧‧ platform
412‧‧‧凸柱412‧‧‧Bump
42‧‧‧主動層42‧‧‧ active layer
43‧‧‧第二型半導體層43‧‧‧Second type semiconductor layer
5‧‧‧金屬導電層5‧‧‧Metal conductive layer
6‧‧‧導熱性的電路板6‧‧‧ Thermally conductive circuit board
61‧‧‧接點61‧‧‧Contacts
Claims (8)
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