201013976 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係關於一種發光二極體晶片，特別是一種發光二 極體晶片藉由一導電層以及至少一電流分佈層依序形成 在蟲晶疊層上’使電流均勻分佈在主動層。 [0002] 【先前技術】 目前市面上的高功率發光二極體晶片（power LED chip)就面積效率而言高功率LEd晶片邊長多大於looo y m ’面積大於1 mm2，發光效率比起較小的晶片，如61〇# m、381 "m要小很多’所以增大Led晶片面積雖可提高額 定電流與瓦數及亮度，但相對衍生出散熱不易問題與發 光效率低等問題。 ::f , Η [0003] 圖1為一種習知發光二極體晶片之剖面圖。該發光二極體 晶片1包括藍寶石（sapphire)基板11、緩衝層12、磊晶 疊層13、透明導電層14、η型電極16以及p型電極17，其 中磊晶疊層13包括η型GaN層131、主動層132、ρ型GaN ❹ 層133。發光二極截晶片1面積越大發光效率越低。瓦數 提高，發光效率反而下降，增大LED晶片面積造成溫度集 中與上升，進而造成LED亮度與壽命下降。 [0004] 如圖1所示，因為ρ型GaN層材料阻抗值很高，傳統式愈大 的晶片面積會造成電流18分佈愈不均勻，靠近ρ型電極ρ 的區域電流密度高’遠離ρ型17的區域電流18密度低，當 施加的電流18越來越高時在近ρ型電極17的高電流密度區 域會產生飽和現象而造成發光效率低的現象，額外的電 流將轉換為熱，溫度也將升高，所以LED晶片面積越大， 097136770 表單編號 A0101 % 3 I/* 29 I 0972060556-0 201013976 電流分佈越不均勻，早位面積效率越低，溫度分佈不均 勻且也越集中，故使電流平均流過LED的主動層132將 有助於提昇其效率。 [0005] ❹ 圖2為另一種習知發光·一極體晶片之上視圖。該發光二極 體晶片2與發光二極體晶片1不同之處在於η型電極26以及 ρ型電極27為指插狀電極’分別具有複數個焊接部261、 271以及複數個延伸部262、272，η型電極26之延伸部 262與ρ型電極27之延伸部272互相平行、交錯設置。發 光二極體晶片2為使電流更均勻通過主動層132，不論是η 型電極26或ρ型電極f7皆作成複雜的指插狀電極。圖3為 圖2之發光二極體晶片沿AA，直線之模擬無.因次化 (normalized)電流密度值》由模擬分析可鑫，在7〇〇mA 的電流輸入下，此電極圖案所造成主動層132平面之最大 電流密度值為1. 951xl〇6A/m2，最小電流密度值為3. 152 xl05A/m2，最大電流密度值約為最小鼋流密度值的6倍， 而此平面上之電流密度標準差為2. 34x1 〇5A/m2。 © [0006] P型電極圖案越多撞住的光轉鱗參’透明導電層（IT0) 雖然可使電流分佈較均勻，但是靠近P型電極附近依然是 電流密度最高之處，仍會造成電流密度過高，在主動層 產生電光轉換飽和現象，此時電光轉換效率下降，部份 電流將無法轉換成光線輸出，最後將轉換成熱，造成溫 度上升。再者，發光二極體晶片複雜的表面電極圖案， 設計不易，良率差’生產不易。表面電極（例如P型電極） 越多、面積越大，越容易擋住光線造成發光效率降低。 多個電極，每個電極需打上一條以上的金線或鋁線，成 097136770 表單煸號A0101 第4頁/共29頁 0972060556-0 201013976 [0007] 本較高。複雜的表面電極圖案和多個打線用電極易造成 電路複雜，並採用較多的線路，使用的電路板也增大， 成本也加而。 【發明内容】 有鑑於上述課題’本發明之一目的在於提供一種發光二 極體晶片’藉由第一導電層以及至少一電流分佈層依序 形成在磊晶疊層上，使電流均勻分佈在主動層，使發光 均勻，且提高效率’也減少熱的集中，延長壽命。 ❹ [0008] 本發明之另一目的在於提供一種發光二極體晶片，藉由 第一導電層以及至少一電流分佈層依序形成在磊晶疊層 上，使電流均勻分佈在主動層，可減少P型電極的面積， 增加發光的區域。 ％-，* 1·厂 [0009] 本發明之又一目的在於提供一種發光二極體晶片，藉由 增高圖案化阻抗層在第二電極的單位两積圖案覆蓋率， 可提升發光二極體晶片電放密度方布的均4度。 f. . . . . Γ 咚 ·. ,f- ..； - ^ [0010] 本發明之再一目的在於提供一種發光二極體晶片，當發 光二極體晶片包括複數層電流分佈層時，各該圖案化阻 抗層之無圖案部分為相鄰之該圖案化阻抗層之圖案所覆 蓋’可提升發光二極體晶片電流密度方布的均勻度。 [0011] 為達上述目的’一種發光二極體晶片，包括：一磊晶疊 層；一第一導電層，形成在磊晶疊層上；以及至少一電 流分佈層形成在第一導電層上，其中電流分佈層包括一 圖案化阻抗層及第二導電層依序形成在該第一導電層上 ，使圖案化阻抗層介於兩導電層之間。 097136770 表單編號A0101 第5頁/共29頁 0972060556-0 201013976 [0012] [0013] ❹ [0014] ❿ [0015] [0016] 097136770 該發光二極體晶片包括複數屠電流分佈層時圖案化阻 抗層之無圖案部分為相鄰之圖案化阻抗層之圖案所覆蓋 〇 發光二極體晶片其更包括至少一第一電極形成在部分之 曝露第-半導體層上，至少—第二電極形成在電流分佈 層上其中第一電極包括至少一第一焊接部以及至少一 延伸部延伸自第—焊接部，第二電極包括至少—第二焊 接部。圖案化阻抗層靠近第二電極的單位面積圖案覆蓋 率尚於遠離第二電極的單位面積圖案覆蓋率。 承上所述’本發明提供之發光二極體晶片，藉由將第一 導電層以及至少一電流分佈膚根存形成在磊辱疊層上， 使電流均勻分佈在主動層，使，發4二極韙晶4發光均勻 ’且提咼發光效率，同時降低熱的集中程度，延長發光 二極體晶片的壽命，且可減少第二電極的面積，增加發 光的區域。藉由增高圖案化阻抗層在第二鼋極的單位面 積圖案覆蓋率，可更提升發光二極體晶片電流密度的均 勻度。 【實施方式】 以下將參照相關圖式，說明依據本發明較佳實施例之發 光二極體晶片，其中相同的晶片將以相同的參照符號加 以說明。 圖4A及圖4B為本發明之發光二極體晶片兩種態樣的剖面 圖。該發光二極體晶片3包括基板31、緩衝層32、磊晶疊 層33、第一導電層34以及至少一電流分佈層35,其中圖 4A之發光二極體晶片3包括一電流分佈層35，圖4B之發光 表單編號A0101 第6頁/共29頁 0972 201013976 二極體晶片3’包括二電流分佈層35、35’ 。 [0017] 發光二極體晶片3之基板31可以是藍寶石（sapphire)、 石夕（silicon)、碳化石夕（SiC)、MgAl2〇4或合金之材質。 ❹ 緩衝層32形成在基板31上，其可為單層物質或多層物質 。磊晶疊層33形成在緩衝層32上，磊晶疊層33依序包括 一第一半導體層331、一主動層332以及一第二半導體層 333。第一半導體層331為η型半導體層，第二半導體層 333為ρ型半導體層，第一半導體層331可為n-GaN、n-AlGaN、n-GaAs 或 n-GaP，第二半導體層 333 可為 p-GaN 、p-AlGaN、p-GaAs或p-GaP，主動層332為一或多層能 隙層、多量子井結構（Multiple Quantum Well, MQW) 結構或單一量子井結構（Single Quantum Well, SQW) ，其材質可為氮化銦鎵（Indium gallium nitride, ❿201013976 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a light-emitting diode wafer, and more particularly to a light-emitting diode wafer formed by a conductive layer and at least one current distribution layer in sequence On the insect crystal stack, 'the current is evenly distributed in the active layer. [0002] [Prior Art] High-power LED chips on the market currently have a high power LEd wafer side length greater than the looo ym area greater than 1 mm2 in terms of area efficiency, and the luminous efficiency is smaller than that of the prior art. The wafers, such as 61 〇 #m, 381 "m are much smaller, so increasing the Led wafer area can increase the rated current and wattage and brightness, but it is relatively difficult to solve the problem of heat dissipation and low luminous efficiency. ::f , Η [0003] FIG. 1 is a cross-sectional view of a conventional light-emitting diode wafer. The LED wafer 1 includes a sapphire substrate 11, a buffer layer 12, an epitaxial layer 13, a transparent conductive layer 14, an n-type electrode 16, and a p-type electrode 17, wherein the epitaxial layer 13 includes n-type GaN. Layer 131, active layer 132, and p-type GaN germanium layer 133. The larger the area of the light-emitting diode chip 1 is, the lower the light-emitting efficiency is. As the wattage increases, the luminous efficiency decreases, and the increase in the area of the LED chip causes the temperature to concentrate and rise, which in turn causes the brightness and life of the LED to decrease. [0004] As shown in FIG. 1, since the p-type GaN layer material has a high impedance value, the larger the conventional wafer area, the more uneven the current 18 distribution, and the higher the current density near the p-type electrode ρ. The regional current 18 of 17 has a low density, and when the applied current 18 is higher and higher, saturation occurs in the high current density region of the near-n-type electrode 17 to cause a low luminous efficiency, and the extra current is converted into heat and temperature. It will also rise, so the larger the area of the LED chip, 097136770 Form No. A0101 % 3 I/* 29 I 0972060556-0 201013976 The more uneven the current distribution, the lower the early area efficiency, the more uneven the temperature distribution and the more concentrated it is. Having an average current flowing through the active layer 132 of the LED will help to increase its efficiency. [0005] FIG. 2 is a top view of another conventional light-emitting diode wafer. The light-emitting diode wafer 2 is different from the light-emitting diode wafer 1 in that the n-type electrode 26 and the p-type electrode 27 have a plurality of soldering portions 261 and 271 and a plurality of extending portions 262 and 272, respectively. The extension portion 262 of the n-type electrode 26 and the extension portion 272 of the p-type electrode 27 are parallel to each other and alternately arranged. The light-emitting diode chip 2 is made to make the current more uniform through the active layer 132, and the n-type electrode 26 or the p-type electrode f7 are formed as complex finger-inserted electrodes. 3 is a schematic diagram of the LED of FIG. 2 along the line AA, and the normalized current density value is simulated by the analog analysis, and the electrode pattern is caused by the current input of 7 mA. The maximum current density of the plane of the active layer 132 is 1.951xl〇6A/m2, and the minimum current density value is 3.152 xl05A/m2, and the maximum current density value is about 6 times of the minimum turbulence density value, and the plane is The standard deviation of the current density is 2.34x1 〇5A/m2. © [0006] The more the P-type electrode pattern hits the light-turned scales, the transparent conductive layer (IT0), although the current distribution is more uniform, but near the P-type electrode is still the highest current density, still cause current The density is too high, and the electro-optic conversion saturation phenomenon occurs in the active layer. At this time, the electro-optical conversion efficiency is lowered, and some currents cannot be converted into light output, and finally converted into heat, causing the temperature to rise. Furthermore, the complicated surface electrode pattern of the light-emitting diode chip is not easy to design, and the yield difference is not easy to produce. The more surface electrodes (for example, P-type electrodes) and the larger the area, the more easily the light is blocked and the luminous efficiency is lowered. Multiple electrodes, each electrode needs to be marked with more than one gold wire or aluminum wire, into 097136770 Form nickname A0101 Page 4 / Total 29 pages 0972060556-0 201013976 [0007] This is higher. The complicated surface electrode pattern and the plurality of wire-bonding electrodes are apt to cause a complicated circuit, and a large number of circuits are used, and the used circuit board is also increased, and the cost is also increased. SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a light-emitting diode wafer that is sequentially formed on an epitaxial layer by a first conductive layer and at least one current distribution layer, so that current is evenly distributed. The active layer, which makes the light uniform, and improves the efficiency 'also reduces the concentration of heat and prolongs the life. [0008] Another object of the present invention is to provide a light-emitting diode wafer, which is sequentially formed on an epitaxial layer by a first conductive layer and at least one current distribution layer, so that current is evenly distributed in the active layer. Reduce the area of the P-type electrode and increase the area of illumination. %-,*1·厂 [0009] Another object of the present invention is to provide a light-emitting diode wafer, which can improve the light-emitting diode by increasing the coverage ratio of the patterned two-product pattern of the patterned resistive layer in the second electrode. The wafer density of the wafers is 4 degrees. F. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . The unpatterned portion of each of the patterned resistive layers is covered by the pattern of the adjacent patterned resistive layer to improve the uniformity of the current density of the light emitting diode wafer. [0011] To achieve the above object, a light-emitting diode wafer includes: an epitaxial layer; a first conductive layer formed on the epitaxial layer; and at least one current distribution layer formed on the first conductive layer The current distribution layer includes a patterned resistance layer and a second conductive layer sequentially formed on the first conductive layer such that the patterned resistance layer is interposed between the two conductive layers. 097136770 Form No. A0101 Page 5 of 29 0972060556-0 201013976 [0013] [0016] [0016] 097136770 The light-emitting diode wafer includes a patterned resistance layer when a plurality of current collecting layers are included The unpatterned portion is covered by a pattern of adjacent patterned resistive layers. The light emitting diode wafer further includes at least one first electrode formed on a portion of the exposed first-semiconductor layer, at least - the second electrode is formed in the current distribution The first electrode of the layer includes at least one first soldering portion and the at least one extending portion extends from the first soldering portion, and the second electrode includes at least a second soldering portion. The pattern coverage of the patterned resistive layer near the second electrode is still outside the unit area pattern coverage away from the second electrode. According to the above-mentioned light-emitting diode chip provided by the present invention, the first conductive layer and at least one current distribution skin are formed on the smear stack, so that the current is evenly distributed in the active layer, so that The bipolar twin 4 emits light uniformly and improves the luminous efficiency, reduces the concentration of heat, prolongs the life of the LED, and reduces the area of the second electrode and increases the area of illumination. By increasing the pattern coverage of the patterned resistive layer in the unit area of the second drain, the uniformity of the current density of the light-emitting diode wafer can be further improved. [Embodiment] Hereinafter, a light-emitting diode wafer according to a preferred embodiment of the present invention will be described with reference to the related drawings, wherein the same wafer will be denoted by the same reference numerals. 4A and 4B are cross-sectional views showing two aspects of a light-emitting diode wafer of the present invention. The LED chip 3 includes a substrate 31, a buffer layer 32, an epitaxial layer 33, a first conductive layer 34, and at least one current distribution layer 35. The LED array 3 of FIG. 4A includes a current distribution layer 35. Fig. 4B illuminating form number A0101 Page 6 of 29 9712 201013976 The diode chip 3' includes two current distribution layers 35, 35'. [0017] The substrate 31 of the light-emitting diode wafer 3 may be made of sapphire, silicon, carbon carbide (SiC), MgAl 2 4 or alloy. The buffer layer 32 is formed on the substrate 31, which may be a single layer material or a multilayer material. The epitaxial layer 33 is formed on the buffer layer 32. The epitaxial layer 33 sequentially includes a first semiconductor layer 331, an active layer 332, and a second semiconductor layer 333. The first semiconductor layer 331 is an n-type semiconductor layer, the second semiconductor layer 333 is a p-type semiconductor layer, and the first semiconductor layer 331 may be n-GaN, n-AlGaN, n-GaAs or n-GaP, and the second semiconductor layer 333 The active layer 332 may be p-GaN, p-AlGaN, p-GaAs or p-GaP, and the active layer 332 may be one or more energy gap layers, a multiple quantum well structure (MQ) structure or a single quantum well structure (Single Quantum Well) , SQW), the material of which can be Indium gallium nitride (❿)
InGaN)、氮化鎵（Gallium nitride，GaN)、氮化鎵钢 (Gallium indium nitride, GalnN)、氮化铭鎵 (Aluminum gallium nitride，AlGaN)、氮化銦 (InN)、氮化氮化IS(AIN)、砸化鋅（Zinc selenide，InGaN), Gallium nitride (GaN), Gallium indium nitride (GalnN), Aluminum Gallium Nitride (AlGaN), Indium Nitride (InN), Nitrided Nitride IS ( AIN), zinc telluride (Zinc selenide,
ZnS.e)、摻鋅之氮化钢鎵（Zinc doped Indium gallium nitride, InGaN:Zn)、碟化銘銦鎵 (Aluminum gallium indium phosphide, AlInGaP) 或鱗化鎵（Gallium phosphide, GaP)。發光二極體晶 片3之第一導電層34形成在磊晶疊層33上，電流分佈層35 形成在第一導電層34上。其中電流分佈層35包括一圖案 化阻抗層351及一第二導電層352依序形成在第一導電層 34上，用以均勻分佈電流，使主動層332均勻發光。第一 097136770 表單編號A0101 第7頁/共29頁 0972060556-0 201013976 及第二導電層34、352為透明導電層，其材質可為銦錫氧 化物（ΙΤ0)、氧化鋅（ZnO)、鋁鋅氧化物（ΑΖ0) ' 摻錄二氧化錫（Antimony Doped Tin Oxide, ΑΤ0) 、二氧化錫（Sn〇2)。第一及第二導電層可為相同或不 同材質，圖案化阻抗層351為電性絕緣材料或低導電係數 材料，例如為透明介電層，其材料可為氧化矽（Si〇2)4 五氧化二鈮（NbqO。、，圖案化阻抗層351之圖案可為多個 四邊形（如圖5A)、三角形（如圖5B)、六邊形（如圖5C) 、八邊形（如圖5D)、圓形（如圖5E)、橢圓形（如圖5F)或 其組合，但不以此為限。再者，圖案化阻抗層351也可是 具有多個孔洞的介電層，該等孔洞可為多個三角形、四 邊形（如圖5 G )、六邊形、八邊形、圓形、概圓形或其組 合。此外，此圖案化阻抗層351之導電係數小於第一或第 二導電層34、352之導電係數即可，而其折射率接近或等 於第一或第二導電層34、352之折射率。 [0018] ❹ 此外，當至少一電流分佈層3 5為複數層電流分佈層時， 如圖4B所示，自發光二極體晶片3’之俯視方向，圖案化 阻抗層351之無圖案部份為相鄰之圖案化阻抗層351’之 圖案所覆蓋，換言之，圖案化阻抗層351、351’成錯開 排列，且圖案化阻抗層35Γ之長度大於圖案化阻抗層 351之長度。舉例來說，若一圖案化阻抗層351之圖案包 括複數個四邊形（如圖5B)時，其相鄰之圖案化阻抗層351 ’之圖案可為如圖5G所示之具有多個四邊形孔洞的介電 層，此時，電流密度經由圖案化阻抗層351’無圖案區域 經圖案化阻抗層351之圖案使電流密度再重新分佈一次， 097136770 表單編號A0101 第8頁/共29頁 0972060556-0 201013976 [0019] Ο [0020] [0021] 使電流密度分佈更加均勻β 如圖4Α ' 4Β及6Α所示’發光二極體晶片3更包括至少一第 一電極36及至少一第二電極37，其中第一電極36形成在 曝露的部份第一半導體層331上，第二電極37形成在電流 分佈層35上。在本實施例中，第一電極36為η型電極，形 成在曝露的部份η型半導體層331上，第二電極37為ρ型電 極’形成在電流分佈層35上，其中第一電極36包括至少 一焊接部361以及至少一延伸部362延伸自焊接部361， 第二電極37包括至少一焊接部，可以無延伸部，焊接部 361及第二電極37係用以與外界電性連接，第一電極36的 延伸部3 6 2可以使電流更均句分佈。 此外，第二電極37形成在電疏分散層35上，電流分佈層 35及第一導電層34具有分散電流的功皞，所以第二電極 37可以無延伸部。第一及第二電極36、37可對應地設置 在發光一極體晶片3的周邊:區.域....，如圖..β人辦示。或者，第 一電極36設置在發光二極體晶片3的中心區域，第二電極 37設置在發光二極體晶片3的周邊區域，如圖6Β所示。或 者，第一電極36設置在發光二極體晶片3的周邊區域，第 一電極37設置在發光·一極體晶片3的中心區域，如圖6C所 示。 再者’如圖7所示，圖案化阻抗層351靠近第二電極37的 單位面積圖案覆蓋率高於遠離第二電極37的單位面積圖 案覆蓋率，可使靠近第二電極37的圖案化阻抗層351每單 位面積具有較高的阻抗’遠離第二電極37的圖案化阻抗 層351每單位面積具有較低的阻抗，使電流分佈更均勻。 097136770 表單編號Α0101 第9頁/共29頁 0972060556-0 201013976 [0022] 因此，電流自第二電極（例如P型電極）流經電流分佈層時 ，被至少一圖案化阻抗層阻擂而均勻分佈至第一導電層 ，再經第二半導體層'(例如P型半導體層）到達主動層，最 後經第一半導體層（例如η型半導體層）傳到第一電極（例 如η型電極），使主動層的電流較均勻。 [0023] 圖8為圖6Β之發光二極體晶片沿ΒΒ’直線之模擬無因次化 電流密度值。由模擬分析可知，在7〇〇mA的電流輸入下， ❹ 此電極圖案所造成主動層332平面之最大電流密度值為 1. 185xl06A/m2，最小電流密度隹為6. 9xl05A/m2，最 大電流密度值約為最小電流密度值的1. 7倍，而此平面上 之電流密度標準差為1· lxl〇5A/m2。因此，相較於圖2， 不論是最大電流密度值對最小電流密度值的比值及標準 差，本發明皆有明顯改善。 [0024] 圖9為本發明另一種發光二極體晶片的剖面圖。該發光二 極體晶片4依序包括一基板41、缓衝層32、蠢晶叠層3 3、 .丨....... 第一導電層34、至少一電流分佈層35、第一電極36以及 第二電極37，該發光二極體晶片4與上述實施例不同之處 在於發光二極體晶片4為覆晶式發光二極體晶片，發光二 極體晶片4的基板41為透明基板，第一及第二導電層34、 352可為金屬層或透明導電層，發光二極體晶片4上的第 一電極3 6以及第二電極37以覆晶方式藉由凸塊（bump)4 2 與黏著基板（Sub-mount) 44上的接觸墊（contact pad)43電極電性連接。其餘元件皆相同，不另為贅述。 圖10A及圖10B為本發明之發光二極體晶片其他態樣的剖 面圖。該發光二極趙晶片5依序包括一基板51、蠢晶昼層 097136770 表單編號A0101 第10頁/共29頁 0972060556-0 [0025] 201013976 33、第一導電層34、至少一電流分佈層35以及第二電極 37，談發光二極體晶片5與上述實施例不同之處在於發光 二極體晶片5為垂直式發光二極體晶片，基板51為—導電 基板’可為金屬基板’同時具備反射層以及第—電極之 功能。磊晶疊層33包括第二半導體層333、主動層3犯以 及第一半導體層331依序形成在基板51上，第二半導體層 333為p型半導體層，第一半導體層331&η型半導體声， 第一及第二導電層34、352可為透明導電層。發光二極體 晶片51更包括至少一第二電極37形成在電流分佈層”上 ，第二電極37包括^少一焊接部，可不包括延伸部。其 餘元件皆相同★不另為贅述β [0026] 如圖10Β所示，該發光二極體磊片5，包择―基板51、電 流分佈層35、第-導電層34、為晶疊層33以及第二電極 37,發光二極體晶片5’與圖1〇Α之發光二極體晶片5不同 之處在於磊晶疊層33以及依序形成其上的第一導電層^ ❹ 及至少-電流分佈層35形成在-蟲晶基板後，再倒立轉 置形成在基板51上，然後竿二電極37形成在蟲晶疊 上。第-及第二導電層34、352可為金屬廣或透明導電層. 。其餘元件皆相同，不另為贅述。 [0027] 综上所述，本發明提供之發光二極體晶片，藉由將第一 導電層以及至少-電流分佈層依序形成在蠢晶疊層上， 使電流均勻分佈在主動層，使發光二極體晶片發光均勻 ，且提高發光效率’同時降低熱的集中程度，延長發光 二極體晶片的壽命’且可減少第二電極的面積，增加發 光的區域。藉由增高圖案化阻抗層在第二電極的圖案密 097136770 表單編號Α0101 第11頁/共29頁 0972060556-0 201013976 [0028] -可更提升發光二極體晶片電流密度的均句度。 ^所述僅為舉· ’而非為限制性者。 發明之精神與範嘴，而對其進行之等效修改或= 應包含於後附之巾請專㈣圍中。 【圖式簡單說明】 [_圖1為一種習知之發光二極體晶片裝置之剖面圖。 [晒圖2為另一種習知之發光二極體晶片裝置之。 ❹ 圆圖3為圖2之發光二極體晶片沿AA，線段之模擬無因次化 電流密度值。 [0032] 圖4A及圖4B為本發明之發光二極體晶片兩種態樣之剖面 圖。 [0033] 圖5A至圖5G為本發明之圖案化阻抗層之上視圖。 [0034] 圖6A至圖6C為本發明之發光二極體晶片之上視圖，顯示 ；：. | 發光二極體晶片第一及，第二_電.極之相對位置。ZnS.e), Zinc doped Indium gallium nitride (InGaN: Zn), Aluminum gallium indium phosphide (AlInGaP) or Gallium phosphide (GaP). The first conductive layer 34 of the light-emitting diode wafer 3 is formed on the epitaxial layer 33, and the current distribution layer 35 is formed on the first conductive layer 34. The current distribution layer 35 includes a patterned resistive layer 351 and a second conductive layer 352 sequentially formed on the first conductive layer 34 for uniformly distributing current to uniformly illuminate the active layer 332. The first 097136770 form number A0101 page 7 / 29 pages 0972060556-0 201013976 and the second conductive layer 34, 352 is a transparent conductive layer, the material of which can be indium tin oxide (ΙΤ0), zinc oxide (ZnO), aluminum zinc Oxide (ΑΖ0) 'Incorporate tin dioxide (Antimony Doped Tin Oxide, ΑΤ0), tin dioxide (Sn〇2). The first and second conductive layers may be the same or different materials, and the patterned resistive layer 351 is an electrically insulating material or a low conductivity material, such as a transparent dielectric layer, and the material may be yttrium oxide (Si〇2) 4 The pattern of the NbqO., patterned resistive layer 351 can be a plurality of quadrangles (as shown in FIG. 5A), a triangle (as shown in FIG. 5B), a hexagon (as shown in FIG. 5C), and an octagon (FIG. 5D). a circular shape (as shown in FIG. 5E), an elliptical shape (as shown in FIG. 5F), or a combination thereof, but not limited thereto. Further, the patterned resistance layer 351 may also be a dielectric layer having a plurality of holes, and the holes may be It is a plurality of triangles, a quadrangle (as shown in FIG. 5 G ), a hexagon, an octagon, a circle, a circle, or a combination thereof. Further, the patterned impedance layer 351 has a smaller conductivity than the first or second conductive layer. The conductivity of 34, 352 is sufficient, and its refractive index is close to or equal to the refractive index of the first or second conductive layers 34, 352. [0018] Further, when at least one current distribution layer 35 is a plurality of current distribution layers When, as shown in FIG. 4B, the patterned resistive layer 351 has no pattern in the plan view direction of the light-emitting diode chip 3'. The portion of the pattern is covered by the pattern of the adjacent patterned resistive layer 351', in other words, the patterned resistive layers 351, 351' are arranged in a staggered manner, and the length of the patterned resistive layer 35 is greater than the length of the patterned resistive layer 351. For example, if the pattern of the patterned resistive layer 351 includes a plurality of quadrangles (as shown in FIG. 5B), the pattern of the adjacent patterned resistive layer 351' may be a plurality of quadrilateral holes as shown in FIG. 5G. The electric layer, at this time, the current density is redistributed once again through the pattern of the patterned resistive layer 351 via the patterned resistive layer 351 pattern, 097136770 Form No. A0101 Page 8 of 29 9772060556-0 201013976 [ [0021] [0021] The current density distribution is more uniform. As shown in FIG. 4A '4Β and 6', the light-emitting diode chip 3 further includes at least one first electrode 36 and at least one second electrode 37, wherein An electrode 36 is formed on the exposed portion of the first semiconductor layer 331, and a second electrode 37 is formed on the current distribution layer 35. In this embodiment, the first electrode 36 is an n-type electrode formed in the exposed portion η. Semiconductor On the layer 331, the second electrode 37 is formed on the current distribution layer 35, wherein the first electrode 36 includes at least one soldering portion 361 and at least one extending portion 362 extends from the soldering portion 361, and the second electrode 37 includes at least A soldering portion may be provided without an extension portion, and the soldering portion 361 and the second electrode 37 are electrically connected to the outside, and the extending portion 326 of the first electrode 36 may distribute the current more evenly. Further, the second electrode 37 Formed on the electrically dispersed layer 35, the current distribution layer 35 and the first conductive layer 34 have a function of dispersing current, so the second electrode 37 may have no extension. The first and second electrodes 36, 37 are correspondingly disposed on the periphery of the light-emitting one-pole wafer 3: a region, a ..., as shown in Fig. Alternatively, the first electrode 36 is disposed in a central region of the light-emitting diode wafer 3, and the second electrode 37 is disposed in a peripheral region of the light-emitting diode wafer 3, as shown in Fig. 6A. Alternatively, the first electrode 36 is disposed in a peripheral region of the light-emitting diode wafer 3, and the first electrode 37 is disposed in a central region of the light-emitting body wafer 3 as shown in Fig. 6C. Furthermore, as shown in FIG. 7, the pattern coverage of the patterned impedance layer 351 near the second electrode 37 is higher than the pattern coverage of the unit area away from the second electrode 37, so that the patterned impedance close to the second electrode 37 can be obtained. Layer 351 has a higher impedance per unit area. The patterned resistive layer 351 away from the second electrode 37 has a lower impedance per unit area, making the current distribution more uniform. 097136770 Form No. 1010101 Page 9 of 29 0972060556-0 201013976 [0022] Therefore, when a current flows from the second electrode (for example, a P-type electrode) through the current distribution layer, it is uniformly distributed by at least one patterned impedance layer. To the first conductive layer, to the active layer through the second semiconductor layer ' (eg, P-type semiconductor layer), and finally to the first electrode (eg, n-type electrode) via the first semiconductor layer (eg, n-type semiconductor layer), The current in the active layer is relatively uniform. 8 is a simulated dimensionless current density value of the light-emitting diode wafer of FIG. 6 along the ΒΒ' line. The maximum current density of the active layer 332 is 1. 185xl06A/m2, and the minimum current density 6 is 6. 9xl05A/m2, the maximum current is obtained by the simulation. The density value is about 1.7 times the minimum current density value, and the standard deviation of the current density on this plane is 1·lxl〇5A/m2. Therefore, compared to Fig. 2, the present invention is significantly improved regardless of the ratio of the maximum current density value to the minimum current density value and the standard deviation. 9 is a cross-sectional view showing another light emitting diode wafer of the present invention. The LED wafer 4 includes a substrate 41, a buffer layer 32, a stray layer stack 3, a first conductive layer 34, at least one current distribution layer 35, and a first The electrode 36 and the second electrode 37 are different from the above embodiment in that the LED chip 4 is a flip-chip diode chip, and the substrate 41 of the LED chip 4 is transparent. The first and second conductive layers 34, 352 may be a metal layer or a transparent conductive layer. The first electrode 36 and the second electrode 37 on the LED substrate 4 are flip-chip by bumps. 4 2 Electrically connected to the contact pad 43 electrode on the Sub-mount 44. The rest of the components are the same and will not be described again. 10A and 10B are cross-sectional views showing other aspects of the LED of the present invention. The light-emitting diode wafer 5 includes a substrate 51 and a stray layer 097136770 in sequence. Form No. A0101 Page 10 / 29 pages 0972060556-0 [0025] 201013976 33, the first conductive layer 34, at least one current distribution layer 35 And the second electrode 37, the light-emitting diode wafer 5 is different from the above embodiment in that the light-emitting diode wafer 5 is a vertical light-emitting diode wafer, and the substrate 51 is a conductive substrate 'which can be a metal substrate' The function of the reflective layer and the first electrode. The epitaxial layer stack 33 includes a second semiconductor layer 333, an active layer 3, and a first semiconductor layer 331 sequentially formed on the substrate 51. The second semiconductor layer 333 is a p-type semiconductor layer, and the first semiconductor layer 331 & The first and second conductive layers 34, 352 may be transparent conductive layers. The LED chip 51 further includes at least one second electrode 37 formed on the current distribution layer, and the second electrode 37 includes one soldering portion, which may not include the extending portion. The remaining components are the same ★ no further description β [0026 As shown in FIG. 10A, the LED sheet 5 includes a substrate 51, a current distribution layer 35, a first conductive layer 34, a crystal layer 33, and a second electrode 37. The LED chip 5 is provided. The difference from the light-emitting diode wafer 5 of FIG. 1 is that the epitaxial layer 33 and the first conductive layer and/or at least the current distribution layer 35 formed thereon are formed on the substrate. And then inverted and formed on the substrate 51, and then the second electrode 37 is formed on the insect crystal stack. The first and second conductive layers 34, 352 may be metal wide or transparent conductive layers. The remaining components are the same, no other [0027] In summary, the present invention provides a light-emitting diode wafer in which a current is uniformly distributed on an active layer by sequentially forming a first conductive layer and at least a current distribution layer on the dummy layer. , to make the light-emitting diode wafer emit light uniformly, and improve luminous efficiency' Low heat concentration, extending the life of the LED wafer' and reducing the area of the second electrode, increasing the area of illumination. By increasing the patterning resistance layer in the pattern of the second electrode 097136770 Form No. 1010101 Page 11 / 29 pages 0972060556-0 201013976 [0028] - The uniformity of the current density of the light-emitting diode wafer can be further improved. ^The description is only for the sake of 'not a limitation. The spirit of the invention and the mouth of the invention, and The equivalent modification or = should be included in the attached towel. (Simplified description) [_ Figure 1 is a cross-sectional view of a conventional light-emitting diode chip device. A conventional light-emitting diode chip device. ❹ Figure 3 is a simulated dimensionless current density value of the light-emitting diode wafer of Figure 2 along line AA. [0032] Figures 4A and 4B are the present invention FIG. 5A to FIG. 5G are top views of a patterned resistive layer of the present invention. [0034] FIGS. 6A to 6C illustrate a light emitting diode chip of the present invention. Above view, display;:. | Light-emitting diode chip first and , the second _ electric. The relative position of the pole.
[0035] 圖7為圖4A之發光二極體晶片之圖案化阻抗層之較佳圖案 分佈情形。 [0036] 圖8為圖6B之發光二極體晶片沿BB’線段之模擬無因次化 電流密度值。 [0037] 圖9為本發明另一種之發光二極體晶片之剖面圖。 [0038] 圖及圖10B為本發明之發光二極體晶片其他悲樣的剖 .面圖。 【主要元件符被說明】 097136770 表單編號A0101 第12頁/共29頁 0972060556-0 201013976 [0039] ❹ ❹ I、 2、3、3’ 、4、5 :發光二極體晶片 II、 31、41、51 :基板 12 ' 32 :緩衝層 13、33 :磊晶疊層 131 : η型GaN層 132、332 :主動層 133 : p型GaN層 14 :透明導電層 16、 26 : η型電極 17、 27 : ρ型電極 18 :電流 261、 271、361 :焊接部 262、 272、362 :延伸部 331 :第一半導體層 333 :第二半導體層 34 :第一導電層 35、35’ ：電流分佈層 . 广'、if) 、 351、 351’ ：圖案化阻抗層 352、 352’ ：第二導電層 36 :第一電極 37 :第二電極 42 :凸塊 43 :接觸墊 44 :黏著基板 097136770 表單編號A0101 第13頁/共29頁 0972060556-07 is a view showing a preferred pattern distribution of a patterned impedance layer of the light-emitting diode wafer of FIG. 4A. 8 is a simulated dimensionless current density value of the light-emitting diode wafer of FIG. 6B along the BB' line segment. [0036] FIG. 9 is a cross-sectional view of another light emitting diode chip of the present invention. 10 and FIG. 10B are cross-sectional views showing other sadness of the LED of the present invention. [Main component description is explained] 097136770 Form No. A0101 Page 12 of 29 0972060556-0 201013976 [0039] ❹ ❹ I, 2, 3, 3', 4, 5: LED Diode Chips II, 31, 41 51: substrate 12' 32: buffer layer 13, 33: epitaxial layer 131: n-type GaN layer 132, 332: active layer 133: p-type GaN layer 14: transparent conductive layer 16, 26: n-type electrode 17, 27: p-type electrode 18: current 261, 271, 361: soldering portion 262, 272, 362: extension portion 331: first semiconductor layer 333: second semiconductor layer 34: first conductive layer 35, 35': current distribution layer Wide ', if), 351, 351': patterned impedance layer 352, 352': second conductive layer 36: first electrode 37: second electrode 42: bump 43: contact pad 44: adhesive substrate 097136770 form number A0101 Page 13 of 29 0972060556-0