TWI371930B - Decoding apparatus, decoding method and program - Google Patents

Decoding apparatus, decoding method and program

Info

Publication number
TWI371930B
TWI371930B TW097139363A TW97139363A TWI371930B TW I371930 B TWI371930 B TW I371930B TW 097139363 A TW097139363 A TW 097139363A TW 97139363 A TW97139363 A TW 97139363A TW I371930 B TWI371930 B TW I371930B
Authority
TW
Taiwan
Prior art keywords
decoding
program
decoding apparatus
decoding method
Prior art date
Application number
TW097139363A
Other languages
English (en)
Other versions
TW200926616A (en
Inventor
Takashi Yokokawa
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of TW200926616A publication Critical patent/TW200926616A/zh
Application granted granted Critical
Publication of TWI371930B publication Critical patent/TWI371930B/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1168—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/615—Use of computational or mathematical techniques
    • H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Multimedia (AREA)
  • Algebra (AREA)
  • Computing Systems (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Error Detection And Correction (AREA)
TW097139363A 2007-10-19 2008-10-14 Decoding apparatus, decoding method and program TWI371930B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007272519A JP4487213B2 (ja) 2007-10-19 2007-10-19 復号装置および方法、並びにプログラム

Publications (2)

Publication Number Publication Date
TW200926616A TW200926616A (en) 2009-06-16
TWI371930B true TWI371930B (en) 2012-09-01

Family

ID=40257089

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097139363A TWI371930B (en) 2007-10-19 2008-10-14 Decoding apparatus, decoding method and program

Country Status (6)

Country Link
US (1) US8281205B2 (zh)
EP (1) EP2051386A3 (zh)
JP (1) JP4487213B2 (zh)
KR (1) KR20090040225A (zh)
CN (1) CN101414834B (zh)
TW (1) TWI371930B (zh)

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US8358447B2 (en) 2007-07-31 2013-01-22 Samsung Electronics Co., Ltd. Scanner module and image scanning apparatus employing the same
JP4487212B2 (ja) * 2007-10-19 2010-06-23 ソニー株式会社 復号装置および方法、送受信システム、受信装置および方法、並びにプログラム
JP5320964B2 (ja) 2008-10-08 2013-10-23 ソニー株式会社 サイクリックシフト装置、サイクリックシフト方法、ｌｄｐｃ復号装置、テレビジョン受像機、及び、受信システム
US8612823B2 (en) * 2008-10-17 2013-12-17 Intel Corporation Encoding of LDPC codes using sub-matrices of a low density parity check matrix
JP5488472B2 (ja) * 2008-11-07 2014-05-14 日本電気株式会社 復号装置、この復号装置を有するデータ通信装置およびデータ記憶装置
JP5445828B2 (ja) * 2009-05-29 2014-03-19 ソニー株式会社 受信装置、受信方法、およびプログラム、並びに受信システム
JP5445829B2 (ja) * 2009-05-29 2014-03-19 ソニー株式会社 受信装置、受信方法、およびプログラム、並びに受信システム
CN101777921B (zh) * 2010-01-28 2013-04-17 中国人民解放军国防科学技术大学 用于显式存储片上系统的结构化ldpc码译码方法及装置
CN102480336B (zh) * 2010-11-30 2014-04-09 中国科学院微电子研究所 一种准循环低密度奇偶校验码的通用快速译码协处理器
JP5952072B2 (ja) * 2012-04-26 2016-07-13 ルネサスエレクトロニクス株式会社 符号化装置、復号化装置及び伝送システム
US8972834B2 (en) * 2012-08-28 2015-03-03 Hughes Network Systems, Llc System and method for communicating with low density parity check codes
KR102068030B1 (ko) 2012-12-11 2020-01-20 삼성전자 주식회사 메모리 컨트롤러 및 그 동작방법
EP2833554B8 (en) * 2013-07-31 2018-06-06 Alcatel Lucent Encoder and decoder
CN104868925B (zh) 2014-02-21 2019-01-22 中兴通讯股份有限公司 结构化ldpc码的编码方法、译码方法、编码装置和译码装置
CN104917536B (zh) * 2014-03-11 2019-11-12 中兴通讯股份有限公司 一种支持低码率编码的方法及装置
CN107437946A (zh) * 2014-09-10 2017-12-05 上海数字电视国家工程研究中心有限公司 Ldpc码的编码方法
US10050642B2 (en) * 2016-03-17 2018-08-14 Silicon Motion Inc. Low power scheme for bit flipping low density parity check decoder
KR102589918B1 (ko) 2016-07-19 2023-10-18 삼성전자주식회사 저밀도 패리티 체크 디코더 및 그것을 포함하는 저장 장치
CN107659317A (zh) * 2017-10-30 2018-02-02 南京扬贺扬微电子科技有限公司 快速转化生成矩阵的方法
CN110048805B (zh) * 2018-12-11 2021-08-31 西安电子科技大学 低密度奇偶校验码的译码控制系统及方法、无线通信系统
CN110298847B (zh) * 2019-06-27 2021-06-04 浙江工业大学 一种长时间背景收集的背景建模方法

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Also Published As

Publication number Publication date
JP2009100423A (ja) 2009-05-07
EP2051386A3 (en) 2010-03-31
US8281205B2 (en) 2012-10-02
US20090106620A1 (en) 2009-04-23
CN101414834B (zh) 2011-10-19
TW200926616A (en) 2009-06-16
JP4487213B2 (ja) 2010-06-23
EP2051386A2 (en) 2009-04-22
CN101414834A (zh) 2009-04-22
KR20090040225A (ko) 2009-04-23

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