TWI367543B - Method for forming a passivation layer for air gap formation and structure thereof - Google Patents

Method for forming a passivation layer for air gap formation and structure thereof

Info

Publication number
TWI367543B
TWI367543B TW092128711A TW92128711A TWI367543B TW I367543 B TWI367543 B TW I367543B TW 092128711 A TW092128711 A TW 092128711A TW 92128711 A TW92128711 A TW 92128711A TW I367543 B TWI367543 B TW I367543B
Authority
TW
Taiwan
Prior art keywords
forming
passivation layer
air gap
gap formation
formation
Prior art date
Application number
TW092128711A
Other languages
English (en)
Chinese (zh)
Other versions
TW200414414A (en
Inventor
K Goldberg Cindy
Michael Filipiak Stanley
C Flake John
T Lii Yeong-Jyh
P Smith Bradley
E Solomentsev Yuri
G Sparks Terry
J Strozewski Kirk
C Yu Kathleen
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200414414A publication Critical patent/TW200414414A/zh
Application granted granted Critical
Publication of TWI367543B publication Critical patent/TWI367543B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76844—Bottomless liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
TW092128711A 2002-12-20 2003-10-16 Method for forming a passivation layer for air gap formation and structure thereof TWI367543B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/327,403 US6838354B2 (en) 2002-12-20 2002-12-20 Method for forming a passivation layer for air gap formation

Publications (2)

Publication Number Publication Date
TW200414414A TW200414414A (en) 2004-08-01
TWI367543B true TWI367543B (en) 2012-07-01

Family

ID=32594241

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092128711A TWI367543B (en) 2002-12-20 2003-10-16 Method for forming a passivation layer for air gap formation and structure thereof

Country Status (8)

Country Link
US (1) US6838354B2 (enExample)
EP (1) EP1579497A3 (enExample)
JP (2) JP4799868B2 (enExample)
KR (1) KR20050085833A (enExample)
CN (1) CN100378948C (enExample)
AU (1) AU2003279030A1 (enExample)
TW (1) TWI367543B (enExample)
WO (1) WO2004061948A2 (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7850770B2 (en) * 2003-05-09 2010-12-14 Basf Aktiengesellschaft Compositions for the currentless deposition of ternary materials for use in the semiconductor industry
US7361991B2 (en) * 2003-09-19 2008-04-22 International Business Machines Corporation Closed air gap interconnect structure
US7071532B2 (en) * 2003-09-30 2006-07-04 International Business Machines Corporation Adjustable self-aligned air gap dielectric for low capacitance wiring
US20050147746A1 (en) * 2003-12-30 2005-07-07 Dubin Valery M. Nanotube growth and device formation
US7405147B2 (en) 2004-01-30 2008-07-29 International Business Machines Corporation Device and methodology for reducing effective dielectric constant in semiconductor devices
JP2006031875A (ja) * 2004-07-20 2006-02-02 Fujitsu Ltd 記録媒体基板および記録媒体
US20060038293A1 (en) * 2004-08-23 2006-02-23 Rueger Neal R Inter-metal dielectric fill
US7629225B2 (en) * 2005-06-13 2009-12-08 Infineon Technologies Ag Methods of manufacturing semiconductor devices and structures thereof
US7396757B2 (en) * 2006-07-11 2008-07-08 International Business Machines Corporation Interconnect structure with dielectric air gaps
DE102007001523A1 (de) * 2007-01-10 2008-07-17 Infineon Technologies Ag Halbleiterschaltungsanordnung und Verfahren zu deren Herstellung
JP5650878B2 (ja) * 2007-06-20 2015-01-07 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． ダミーパターンの設計方法、露光マスク、半導体装置、半導体装置の製造方法およびダミーパターンの設計プログラム
US7879683B2 (en) 2007-10-09 2011-02-01 Applied Materials, Inc. Methods and apparatus of creating airgap in dielectric layers for the reduction of RC delay
JP2009094378A (ja) * 2007-10-11 2009-04-30 Panasonic Corp 半導体装置及びその製造方法
JP4856107B2 (ja) * 2008-02-14 2012-01-18 パナソニック株式会社 半導体装置の製造方法及び半導体装置
KR101382564B1 (ko) * 2008-05-28 2014-04-10 삼성전자주식회사 에어갭을 갖는 층간 절연막의 형성 방법
US8108820B2 (en) * 2008-09-11 2012-01-31 International Business Machines Corporation Enhanced conductivity in an airgapped integrated circuit
DE102008059650B4 (de) * 2008-11-28 2018-06-21 Globalfoundries Inc. Verfahren zur Herstellung einer Mikrostruktur mit einer Metallisierungsstruktur mit selbstjustierten Luftspalten zwischen dichtliegenden Metallleitungen
US8497203B2 (en) 2010-08-13 2013-07-30 International Business Machines Corporation Semiconductor structures and methods of manufacture
US8530347B2 (en) * 2010-10-05 2013-09-10 Freescale Semiconductor, Inc. Electronic device including interconnects with a cavity therebetween and a process of forming the same
KR101619682B1 (ko) * 2011-12-29 2016-05-10 인텔 코포레이션 후드층을 갖는 에어갭 인터커넥트 및 그 형성 방법
JP5696679B2 (ja) * 2012-03-23 2015-04-08 富士通株式会社 半導体装置
KR102003881B1 (ko) * 2013-02-13 2019-10-17 삼성전자주식회사 반도체 소자 및 그 제조 방법
US9209073B2 (en) 2013-03-12 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Metal cap apparatus and method
KR102154112B1 (ko) * 2013-08-01 2020-09-09 삼성전자주식회사 금속 배선들을 포함하는 반도체 장치 및 그 제조 방법
JP6295802B2 (ja) * 2014-04-18 2018-03-20 ソニー株式会社 高周波デバイス用電界効果トランジスタおよびその製造方法、ならびに高周波デバイス
US10177032B2 (en) * 2014-06-18 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Devices, packaging devices, and methods of packaging semiconductor devices
US9831214B2 (en) * 2014-06-18 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packages, packaging methods, and packaged semiconductor devices
US9583380B2 (en) 2014-07-17 2017-02-28 Globalfoundries Inc. Anisotropic material damage process for etching low-K dielectric materials
US9443956B2 (en) 2014-12-08 2016-09-13 Globalfoundries Inc. Method for forming air gap structure using carbon-containing spacer
KR102312732B1 (ko) * 2014-12-24 2021-10-15 인텔 코포레이션 타이트한 피치의 금속 상호접속층들의 상부 및 하부에 비아를 자기 정렬하는 구조체 및 방법
US9768058B2 (en) 2015-08-10 2017-09-19 Globalfoundries Inc. Methods of forming air gaps in metallization layers on integrated circuit products
WO2017064937A1 (ja) * 2015-10-16 2017-04-20 ソニー株式会社 半導体装置、および半導体装置の製造方法
US9922940B2 (en) * 2016-02-22 2018-03-20 Toshiba Memory Corporation Semiconductor device including air gaps between interconnects and method of manufacturing the same
KR102645957B1 (ko) * 2016-03-22 2024-03-08 삼성전자주식회사 반도체 장치 및 그의 제조 방법
US10020260B1 (en) * 2016-12-22 2018-07-10 Globalfoundries Inc. Corrosion and/or etch protection layer for contacts and interconnect metallization integration
EP4649787A1 (en) * 2023-01-12 2025-11-19 Atlas Magentics Method and apparatus for increasing skin depth and reducing eddy currents in non-magnetic hybrid materials using electroless plating techniques

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3366471B2 (ja) * 1994-12-26 2003-01-14 富士通株式会社 半導体装置及びその製造方法
US5645930A (en) * 1995-08-11 1997-07-08 The Dow Chemical Company Durable electrode coatings
US5695810A (en) * 1996-11-20 1997-12-09 Cornell Research Foundation, Inc. Use of cobalt tungsten phosphide as a barrier material for copper metallization
JP4492982B2 (ja) * 1997-11-06 2010-06-30 パナソニック株式会社 多層配線を有する半導体装置の製造方法
US5949143A (en) * 1998-01-22 1999-09-07 Advanced Micro Devices, Inc. Semiconductor interconnect structure with air gap for reducing intralayer capacitance in metal layers in damascene metalization process
US6025260A (en) * 1998-02-05 2000-02-15 Integrated Device Technology, Inc. Method for fabricating air gap with borderless contact
JP2000223492A (ja) * 1999-01-29 2000-08-11 Nec Corp 多層配線を有する半導体装置の製造方法
US6077767A (en) * 1999-09-03 2000-06-20 United Semiconductor Corp. Modified implementation of air-gap low-K dielectric for unlanded via
US6153935A (en) * 1999-09-30 2000-11-28 International Business Machines Corporation Dual etch stop/diffusion barrier for damascene interconnects
DE19957302C2 (de) * 1999-11-29 2001-11-15 Infineon Technologies Ag Substrat mit mindestens zwei darauf angeordneten Metallstrukturen und Verfahren zu dessen Herstellung
JP2001217310A (ja) * 2000-02-02 2001-08-10 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6815329B2 (en) * 2000-02-08 2004-11-09 International Business Machines Corporation Multilayer interconnect structure containing air gaps and method for making
JP3979791B2 (ja) * 2000-03-08 2007-09-19 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2001355074A (ja) * 2000-04-10 2001-12-25 Sony Corp 無電解メッキ処理方法およびその装置
US6854077B2 (en) * 2000-08-05 2005-02-08 Motorola, Inc. Apparatus and method for providing turbo code interleaving in a communications system
US6413852B1 (en) * 2000-08-31 2002-07-02 International Business Machines Corporation Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material
US6692898B2 (en) * 2001-01-24 2004-02-17 Infineon Technologies Ag Self-aligned conductive line for cross-point magnetic memory integrated circuits
JP2003163266A (ja) * 2001-11-28 2003-06-06 Sony Corp 半導体装置の製造方法および半導体装置
US6872659B2 (en) * 2002-08-19 2005-03-29 Micron Technology, Inc. Activation of oxides for electroless plating
CN100372113C (zh) * 2002-11-15 2008-02-27 联华电子股份有限公司 一种具有空气间隔的集成电路结构及其制作方法
US6885074B2 (en) * 2002-11-27 2005-04-26 Freescale Semiconductor, Inc. Cladded conductor for use in a magnetoelectronics device and method for fabricating the same

Also Published As

Publication number Publication date
WO2004061948A3 (en) 2005-10-13
TW200414414A (en) 2004-08-01
WO2004061948A2 (en) 2004-07-22
US20040119134A1 (en) 2004-06-24
CN1820365A (zh) 2006-08-16
AU2003279030A1 (en) 2004-07-29
KR20050085833A (ko) 2005-08-29
EP1579497A2 (en) 2005-09-28
US6838354B2 (en) 2005-01-04
JP4799868B2 (ja) 2011-10-26
JP2006511955A (ja) 2006-04-06
CN100378948C (zh) 2008-04-02
JP4794389B2 (ja) 2011-10-19
EP1579497A3 (en) 2005-12-07
JP2006324689A (ja) 2006-11-30

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