TWI363257B - - Google Patents
Download PDFInfo
- Publication number
- TWI363257B TWI363257B TW095123119A TW95123119A TWI363257B TW I363257 B TWI363257 B TW I363257B TW 095123119 A TW095123119 A TW 095123119A TW 95123119 A TW95123119 A TW 95123119A TW I363257 B TWI363257 B TW I363257B
- Authority
- TW
- Taiwan
- Prior art keywords
- tester
- test
- semiconductor integrated
- integrated circuit
- mentioned
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
- G01R31/318314—Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
- G01R31/31912—Tester/user interface
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Tests Of Electronic Circuits (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/011798 WO2007000806A1 (ja) | 2005-06-28 | 2005-06-28 | 半導体集積回路開発支援システム |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200712810A TW200712810A (en) | 2007-04-01 |
TWI363257B true TWI363257B (ja) | 2012-05-01 |
Family
ID=37595070
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095123119A TW200712810A (en) | 2005-06-28 | 2006-06-27 | Semiconductor integrated circuit development support system |
Country Status (2)
Country | Link |
---|---|
TW (1) | TW200712810A (ja) |
WO (2) | WO2007000806A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI619955B (zh) * | 2012-11-19 | 2018-04-01 | 泰瑞達公司 | 用於在半導體裝置之測試環境中偵錯的非暫態電腦可讀取儲存媒體、方法和測試設備 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8146061B2 (en) | 2007-12-12 | 2012-03-27 | Via Technologies, Inc. | Systems and methods for graphics hardware design debugging and verification |
CN116774990B (zh) * | 2023-08-25 | 2023-11-28 | 合肥晶合集成电路股份有限公司 | 一种半导体机台的产品程式管理系统及管理方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3569237B2 (ja) * | 2001-03-09 | 2004-09-22 | エー・テイー・イー・サービス株式会社 | 電子機器のテスト手段情報提供システム |
JP2002350499A (ja) * | 2001-05-30 | 2002-12-04 | Ando Electric Co Ltd | 半導体集積回路の試験仲介システム及びその試験仲介方法 |
JP2003150661A (ja) * | 2001-11-15 | 2003-05-23 | Hitachi Ltd | 回路シミュレーション方法 |
-
2005
- 2005-06-28 WO PCT/JP2005/011798 patent/WO2007000806A1/ja active Application Filing
-
2006
- 2006-06-23 WO PCT/JP2006/312654 patent/WO2007000953A1/ja active Application Filing
- 2006-06-27 TW TW095123119A patent/TW200712810A/zh not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI619955B (zh) * | 2012-11-19 | 2018-04-01 | 泰瑞達公司 | 用於在半導體裝置之測試環境中偵錯的非暫態電腦可讀取儲存媒體、方法和測試設備 |
US9959186B2 (en) | 2012-11-19 | 2018-05-01 | Teradyne, Inc. | Debugging in a semiconductor device test environment |
Also Published As
Publication number | Publication date |
---|---|
WO2007000806A1 (ja) | 2007-01-04 |
WO2007000953A1 (ja) | 2007-01-04 |
TW200712810A (en) | 2007-04-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Marinissen et al. | On IEEE P1500’s standard for embedded core test | |
JP4074738B2 (ja) | イベントベース半導体試験システム及びlsiデバイス設計試験システム | |
JP4058252B2 (ja) | Ic設計の検証方法 | |
KR100936855B1 (ko) | Asic/soc 제조시에 프로토타입-홀드를 방지하기위한 제조 방법 및 장치 | |
JP5188580B2 (ja) | 並列アクセスおよび直列アクセスを伴う、システムオンチップをテストするための方法ならびに装置 | |
JP5184645B2 (ja) | 並列アクセスおよび直列アクセスを伴う、システムオンチップをテストするための方法ならびに装置 | |
JP2004509425A (ja) | テストコントローラアクセスデータを用いて回路をテスト及び/または診断する方法及びシステム | |
JP2008134824A (ja) | 消費電力解析方法及びプログラム | |
JP2011512568A (ja) | システムオンチップテストに関するスキャンパスを動的に修正するように適合された構成要素を記述するための方法及び装置 | |
CN112444731B (zh) | 芯片测试方法、装置、处理器芯片及服务器 | |
CN104732001B (zh) | 电子器件的在线设计验证 | |
TWI363257B (ja) | ||
Balcárek et al. | Test patterns compression technique based on a dedicated SAT-based ATPG | |
Vock et al. | Challenges for semiconductor test engineering: a review paper | |
Appello et al. | On the automation of the test flow of complex SoCs | |
TWI363185B (ja) | ||
Raik et al. | Constraint-based hierarchical untestability identification for synchronous sequential circuits | |
Das et al. | Implementation of a testing environment for digital IP cores | |
Dey et al. | Design for testability techniques at the behavioral and register-transfer levels | |
Tang et al. | Research and implementation of an automatic simulation tool | |
Rajsuman | Extending EDA environment from design to test | |
Portolan et al. | A common language framework for next-generation embedded testing | |
Melani et al. | An integrated flow from pre-silicon simulation to post-silicon verification | |
Gregerson et al. | Advances in architectures and tools for FPGAs and their impact on the design of complex systems for particle physics | |
JP4028574B2 (ja) | Lsiのテスト容易化設計方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |