TWI321846B - - Google Patents

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Publication number
TWI321846B
TWI321846B TW095143604A TW95143604A TWI321846B TW I321846 B TWI321846 B TW I321846B TW 095143604 A TW095143604 A TW 095143604A TW 95143604 A TW95143604 A TW 95143604A TW I321846 B TWI321846 B TW I321846B
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TW
Taiwan
Prior art keywords
cover
image
wafer
carrier
wire
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TW095143604A
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Chinese (zh)
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TW200824105A (en
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Taiwan Electronic Packaging Co Ltd
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Priority to TW095143604A priority Critical patent/TW200824105A/en
Publication of TW200824105A publication Critical patent/TW200824105A/en
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Publication of TWI321846B publication Critical patent/TWI321846B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/162Disposition
    • H01L2924/16235Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip

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  • Solid State Image Pick-Up Elements (AREA)

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九、發明說明: 【發明所屬之技術領域】 本發明係與晶片封裝結構有 薄型影像晶片封裝結構。 【先前技術】 按,以習知之積體電路晶片構裝而言, 3 = 一電路板上,再利用金屬導線焊二 敗Γ板上’使《晶片可藉由該金屬導線之連接而 與邊電路板呈電性之連通。 10 15 關,更詳而言之是指一種 惟’當其構裝之晶片為-種攝取影像用之晶片時,該 L务之頂面乃為—影像感測區,以藉由該影像感測區加以 因此4衫像感測區須為極度之乾淨,但由於在構裝 &力工過私中,仍必須有焊接導線…等之作業,因此極易 ^成衫像感測區有污染物濺佈之情形發生,而導致成像之 ^果不佳’或更甚有因焊接導線之不慎而誤撞擊影像感測 區之情形,進而造成損壞。 再者,由於影像用晶片之構裝必須再藉由一封裝體直 接將整個晶片加以包覆,但受限於導線之焊接及避免有誤 觸衫像感測區之情形,而必須將其封裝體設置於距該晶片 1一預定距離之位置上,此對現今要求輕薄短小之晶片構 裂而言,無疑不符現今之時勢。 【發明内容】 有鑑於此’本發明之主要目的乃在提供一種薄型影像 20 1321846 晶片封裝結構,係可有效減少整體構裝後之體積者。 本發明之另一目的乃在提供一種薄型影像晶片封裂結 構,係可避免其影像感測區於施打導線時受到污染或損傷 者。 5 緣是,為達上述目的,本發明所提供一種薄型影像晶 片封裝結構’包含有:一載體;一影像晶片,係以其—端 面連結於S亥載體上’該影像晶片之另一端上形成有一影像 感測區’並於該影像感測區之外周邊上形成有若干之晶片 ¥塾,一罩體,具有一連接部及一頂罩部,該連接部係連 10結於5亥影像晶片上,並位於該影像感測區與該晶片焊塾之 間,使由該連接部加以阻隔於該影像感測區與該晶片焊墊 之間’該頂罩部係連結於該連接部上,並位於該影像感測 區之上方;若干之導線,係以其一端連接於該晶片焊墊上, 另一端則連接於該載體上,使該影像晶片與該載體間藉由 15該導線而電性連通;一蓋體,具有一側壁及一頂板,該側 壁係連接於該載體上,該頂板係連接於該側壁上,且該頂 板升> 成有一穿孔,使該頂罩部位於該穿孔中,而與外界相 通,且該頂板係可將該導線完全蓋覆。 20【實施方式】 為使責審查委員,能對本發明之特徵及目的有更進一 步之暸解與認同,茲列舉以下較佳之實施例,並配合圖式 說明於後: 請參閱第一及第二圖,係本發明第一較佳實施例所提 j 5 1321846 供一種薄型影像晶片封裝結構(l〇),其主要包含有一載體 (11)、一影像晶片(12)、一罩體(13)、若干之導線(14)、一蓋 體(15)及一黏著物(16);其中: δ玄載體(11),係可為塑膠、強化塑膠、玻璃纖維、陶瓷··. 5等材質所製成之電路板或花架預鑄(Printed Circuit Board、 PCB ' PRE-MOLD),作為該封裝結構(⑼與外界電性連接 之橋樑;該載體(11)呈一平板狀,具有一頂面(111)及一與該 頂面(111)相背之底面(112),該頂面(111)上佈設有呈預定態 樣及數量之電路佈線(圖中未示)及若干與該電路佈線電性 ίο 相通之電路焊墊(113)。 該景^像晶片(12),具有一頂面及一與該頂面相背之底 面,其底面係藉由環氧樹脂、矽樹脂、低熔點之玻璃或雙 面膠帶…等黏性材料,而黏著貼附於該載體(11)之頂面(111) 上,5亥影像晶片(12)之頂面中央位置處設置有一影像感測區 15 (121)用以成像,並於影像晶片(12)之頂面上位於該影像感 測區(121)之外部周邊處,設置有若干與該影像晶片(12)呈 電性導通之晶片焊墊(122)。 遠罩體(13),包含有一連接部(131)及一頂罩部(132); 該連接部(131)於本實施例中為一軸心呈透空狀之環形體, 20係可由塑膠、玻璃、玻璃纖維、金屬或陶瓷…材質所製成, 使其軸心内部形成一罩設空間(133),該連接部(131)係以其 一端緣(底緣)藉由一黏膠(圖中未示)而連接抵於該影像晶 片(12)頂面之影像感測區(i21)周圍外,且係連接於該影像 感測區(121)與該各晶片焊墊(丨22)之間,使該影像感測區 6 (121)位在該罩設空卯33)内,而由該連接部㈣將該影像 感測區(121)之外周邊加以封閉,並使得該晶片焊塾(⑵)與 該影像感測區(121)得以由該連接部(131)而加以隔開,該連 接部(m)外側邊上並再以一快乾膠(134)黏接於該影像晶 5片(I2)上’以迅速固定該連接部(131)與該影像晶片⑽之相 關位置;,該頂罩部(132)於本實施例中為一絕緣之圓盤狀薄 板(亦可為矩形狀薄板),係可由玻璃等透光材料所製成,該 頂罩。P(132)係藉由-黏著物(圖中未示)而黏接於該連接部 (131) 之另一端緣(頂緣)上,使該頂罩部(132)正位於該影像 1〇感測區(121)之上方’並藉由與該連接部(131)之連接而距該 影像感測區(121)有-預定之距離,使由該頂罩部(132)將該 罩設空間(133)之上方加以封閉;於本實施例中,該頂罩部 (132) 之寬度面積係相等於該連接部(131)之寬度面積,但於 貫際设計時,該頂罩部之寬度面積亦可大於該連接部之寬 15度面積。 s亥等導線(14),係由黃金、鋁…等導電金屬材質所製 成,係利用打線技術將該各導線(14)分別與該載體(11)之電 路焊墊(113)及該晶片(12)之晶片焊墊(122)電性連接;於打 線作業時,該導線(14)首先以垂直該載體(11)電路焊^(113) 20之方式與該電路焊墊(113)牢固地銜接(為第一焊接點),再將 導線(14)往上拉伸至晶片(12)頂面之位置時,以近乎水平之 方式延伸至與該晶片焊墊(122)銜接(為第二焊接點),藉 此’該晶片(12)上方供導線(14)容置之空間即可加以爲平化 而大幅縮減封裝結構(10)之高度。 1^21846 該蓋體(15),係可由一不透明之塑膠、玻璃纖維、金屬、 陶瓷或透明之玻璃、石英、塑膠材質所製成;該蓋體(15) 具有一側壁(151)及一頂板(152),該側壁(丨51)於本實施例中 為一軸向呈透空狀之矩形體(亦可為環形體),使其軸向内部 5形成一蓋設空間(153) ’該侧壁(151)係以其一端緣(底緣)藉 由一黏著物(圖中未示)而連接於該載體(11)之頂面(111) 上,且係位於該電路焊墊(113)之外周圍,使該晶片(12)、電 路焊墊(113)及各導線(14)皆位在封裝之蓋設空間(153)内, 該頂板(152)於本實施例中為一矩形狀薄板(亦可為環形狀 10薄板)’該頂板(152)係以其外側緣連接於該側壁(ι51)之另一 端緣(頂緣),且該頂板(152)中央位置並形成有一穿孔 〇54),該穿孔(154)之孔徑略大於該罩體(丨3)之頂罩部(丨32) 外徑,使該頂罩部(132)正位於該穿孔(154)中,且該頂板(152) 係可將該導線(14)完全蓋覆。 15 該黏著物(16),可為矽樹脂(Silicones)、環氧樹脂 (Ep〇xles)、丙烯酸樹脂(Acrylics)、聚醯亞胺(p〇lyamides)、 低熔點之玻璃…等材質所製成,該黏著物(丨6)係佈設於該罩 肢(13)頂罩部(132)之外側與該蓋體(15)之穿孔(154)之内壁 面間,使s玄罩體(13)與該蓋體(15)加以黏接,以將該晶片(12) 2〇及導線(14)加以封閉於該蓋體(15)之蓋設空間(153)内,而完 成整體之封裝作業。 由於本發明之封裝結構(1 〇)於進行打線作業(即將導線 /、曰a片:塾及電路焊塾連接之作業)前,已藉由該罩體(u) 將影像感測區(121)與晶片焊墊(122)加以阻隔,可避免於打 8 1321846 • 線作業時有誤觸或污染影像感測區(121)之情事發生。另 - 外,由於導線(I4)係以近乎水平之方式延伸至與該晶片焊墊 - (I22)銜接’因此,該晶片(12)上方供導線(14)容置之空間即 可加以爲平化而大幅縮減封裝結構(10)之高度。 5 再者,該罩體(13)之連接部(131)與頂罩部(132)亦可採 . 一體成形所製成,而該蓋體(15)之側壁(151)與該頂板(152) 亦可採一體成形所製成,可更加簡化整體組裝之作業。 φ 請參閱第三圖,係本發明第二較佳實施例所提供之一 種薄型影像晶片封裝結構(20),其與上述實施例相同包含有 .1〇 一載體(21)、一影像晶片P2)、一罩體(23)、若干之導線(24)、 一蓋體(25)及一黏著物(26),惟與上述實施例之差異在於: 該蓋體(25)之蓋設空間(253)内更佈設有一包覆體 (27) ’係覆蓋於該晶片(22)及該導線(24)上,該包覆體(27) 係可為石夕樹脂(Silicones)、環氧樹脂(Epoxies)、丙烯酸樹脂 15 (Acrylics)、聚醯亞胺(Polyamides)、低溶點之玻璃…等材質 φ 所製成,該包覆體(27)於初期係呈膠狀,而後可乾燥固化成 硬質之保護體,藉以保護該晶片(22)及該導線(24)。 請參閱第四圖,係本發明第三較佳實施例所提供之一 種薄型影像晶片封裝結構(3〇),其與第一較佳實施例相同包 —20含有一載體(31)、一影像晶片(32)、一罩體(33)、若干之導 線(34)、一蓋體(35)及一黏著物(36),惟與第一較佳實施例 之差異在於: 該導線(34),係以其一端焊接於該晶片(32)之晶片焊墊 (322)上,再將另—端焊接於該載體(31)之頂面(311)上,且 9 1321846 該導線(34)係由其一端與載體(31)焊接後,而逐漸地呈往晶 片(32)中心之方向傾斜地拉伸至由另一端與該晶片焊S (322)焊接’如此一來’該導線(34)便呈傾斜狀,雖其導線(3句 所佔之空間較大’但卻較便於打線之作業者。 5 該蓋體(35)之側壁(351)鄰近於與該載體(31)頂面(3 u) 連接之内側部位上’形成有一容置空間(355),該容置空間 (355)係用以供鄰近於載體(31)之導線(34)部位容置,即$成 該容置空間(355)之侧壁(351)其厚度較薄,且呈現與該‘線 (34)同一走向之斜切態樣。如此一來,原本為便於打線作業 ίο而將5玄導線(34)呈斜接狀態所增加之耗佔空間’即可由該^ 線(34)置位於該容置空間(355)内所加以補償,使得蓋體(35) 之整體高度及寬度皆無需增加,而可同樣使封裝結構(3〇) 呈薄型化,而能減少打線作業之進行難度及增進打線作業 之效率。 15 請參閱第五圖,係本發明第四較佳實施例所提供之一 種4型影像晶片封裝結構(40) ’其與第一較佳實施例相同包 含有一載體(41)、一影像晶片(42)、一罩體(43)、若干之導 線(44)、一蓋體(45)及一黏著物(46),惟與第一較佳實施例 之差異在於: 20 邊盍體(45)更於其頂板(452)上凸伸形成有一容置部 (456) ,該容置部(456)内部係呈上下透空而形成有一容室 (457) ’該容室(457)並與該穿孔(454)連通,該容室(457)之内 側壁面上形成有一第一螺紋部(458),該第一螺紋部(458)為 一内螺紋。 10 °玄薄型衫像晶片封裝結構(40)更包含有一鏡頭(47),該 鏡頭(47)具有一管體(471)及若干固設於該管體(471)内之鏡 ^^72) ’該管體(471)之外周面上設有一第二螺紋部(473), 該第一螺紋部(473)為一外螺紋’係螺接於該蓋體(Μ)之第 5 一螺紋部(458)上,使可藉由旋轉該管體(471)以造成該鏡頭 (47)之上、下位移’以調整鏡頭(47)中之鏡片(々π)焦距。 一請參閱第六圖,係本發明第五較佳實施例所提供之一 =薄型影像晶片封裝結構(50),其與第一較佳實施例相同包 含有一載體(51)、一影像晶片(52)、一罩體(53)、若干之導 1〇線(54) ' —蓋體(55)及一黏著物(56),惟與第一較佳實施例 之差異在於: ' 该罩體(53)之頂罩部(532)為一鏡片,係貼接於該連接 4(531)上,使該頂罩部(532)正位於該影像感測區(52i)之上 方,並藉由與該連接部(531)之連接,而使得該頂罩部(532) 15與泫影像感測區(52丨)間距有一預定之距離,使可由該頂罩 部(532)提供聚焦之效果。 ' 該蓋體(55)更於其頂板(552)上凸伸形成有一容置部 (556) ’該容置部(556)内部係呈上下透空而形成有一容室 (557) ,該容室(557)並與該穿孔(554)連通,該容室(557)内則 2〇固設置有一鏡片(559)。 當然,該頂罩部(532)可為與該連接部(531)所一體製 成’而該鏡片(559)亦可與該容置部(556)所一體製成。 請參閱第七圖,係本發明第六較佳實施例所提供之一 種薄型影像晶片封裝結構(60),其與第一較佳實施例相同包 1321846 含有一載體(61)、一影像晶片(62)、一罩體(63)、若干之導 線(64)、一蓋體(65)及一黏著物(66),惟與第一較佳實施例 之差異在於: 該載體(61)之頂面(611)上以一預定之寬度及深度向下 凹陷延伸有一凹陷區(614),該影像晶片(62)係設置於該凹 陷區(614)内,該各導線(64)則係利用打線技術將其兩端分 另J連接於§亥影像晶片(62)之晶片焊墊(622)及該載體(61)頂 面(611)上之電路焊墊(圖中未示)上。 該蓋體(65)僅具有一頂板(652)且藉由一可撕離性之黏 性體(651)以其一面黏貼於該載體(61)之頂面(611)上使該 罩體(63)之頂罩部(632)同樣位於該蓋體(65)之穿孔(654) 中,且同樣由該黏著物(66)將該蓋體(65)與該罩體(63)加以 黏結。 15 另外’該射生體(651)亦可為多數個之黏性體,係採用 夕點方式黏貼於該載體⑹)之頂面(611)上。如此一來,不僅 本發明之目的’更可藉由該黏性體易撕離之特性, 將该盍體㈣與鋪_丨)分離使封肋轉修更為簡易。 雖然=本貫施例中,該栽體之電路焊㈣設置於其頂 二但實際上亦設置於該叫區巾,而使得整體之封裝 、、,。構可更加地降低高度。 12 丄:>Ζ1δ40 【圖式簡單說明】 第一圖係本發明第一較佳實施例之剖視示意圖。 第二圖係第一圖所示較佳實施例之頂面示意圖。 第三圖係本發明第二較佳實施例之剖視示意圖。 第四圖係本發明第三較佳實施例之剖視示意圖。 第五圖係本發明第四較佳實施例之剖視示意圖。 第六圖係本發明第五較佳實施例之剖視示意圖。 第七圖係本發明第六較佳實施例之剖視示意圖。 10 【主要元件符號說明】 「第一較佳實施例」 15 薄型影像晶片封裝結構(1 〇) 載體(11) 頂面(111) 底面(112) 電路焊墊(113) 影像晶片(12) 影像感測區(121) 晶片焊墊(122) 罩體(13) 連接部(131) 頂罩部(132) 罩設空間(133) 快乾膠(134) 導線(14) 蓋體(15) 侧壁(151) 頂板(152) 蓋設空間(153) 穿孔(154) 黏著物(16) 二較佳實施例」 薄型影像晶片封裝結構(2〇) 13 20 1321846 載體(21) 罩體(23) 蓋體(25) 黏著物(26) 5 「第三較佳實施例」 薄型影像晶片封裝結構(30) 載體(31) 影像晶片(32) 罩體(33) ίο 蓋體(35) 容置空間(355) 「第四較佳實施例」 薄型影像晶片封裝結構(40) 載體(41) 15 罩體(43) 蓋體(45) 容置部(45 6) 穿孔(454) 黏著物(46) 20 管體(471) 第二螺紋部(473) 「第五較佳實施例」 薄型影像晶片封裝結構(50) 載體(51) 影像晶片(22) 導線(24) 蓋設空間(253) 包覆體(27) 頂面(311) 晶片焊墊(322) 導線(34) 側壁(351) 黏著物(36) 影像晶片(42) 導線(44) 頂板(452) 容室(457) 第一螺紋部(458) 鏡頭(47) 鏡片(472) 影像晶片(52) 14 1321846 影像感測區(521) - 連接部(531) 導線(54) 頂板(552) ' 5 容室(557) , 鏡片(559) 「第六較佳實施例」 _ 薄型影像晶片封裝結構(60) 載體(61) ίο 凹陷區(614) 晶片焊墊(622) 頂罩部(632) 蓋體(65) 頂板(652) 15 黏著物(66) 罩體(53) 頂罩部(532) 蓋體(55) 容置部(556) 穿孔(554) 黏著物(56) 頂面(611) 影像晶片(62) 罩體(63) 導線(64) 黏性體(651) 穿孔(654) 15IX. Description of the Invention: [Technical Field of the Invention] The present invention has a thin image chip package structure and a chip package structure. [Prior Art] According to the conventional integrated circuit chip package, 3 = a circuit board, and then the metal wire is used to solder the two failed boards, so that the wafer can be connected to the side by the metal wire. The board is electrically connected. 10 15 , in more detail, refers to a type of image that is used only when the wafer is a wafer for image capture, and the top surface of the L is an image sensing area. Therefore, the four-shirt sensing area must be extremely clean, but since there is still a need to have welding wires, etc. in the construction and work, it is very easy to make a shirt like the sensing area. The situation of contaminant splashing occurs, which leads to poor image formation' or even the accidental impact of the welding wire on the image sensing area, causing damage. Furthermore, since the image wafer is mounted, the entire wafer must be directly coated by a package, but it is limited by soldering of the wires and avoiding the situation of the touch-sensitive region, and must be packaged. The body is disposed at a predetermined distance from the wafer 1, which is undoubtedly inconsistent with the present situation for today's demand for thin and short wafers. SUMMARY OF THE INVENTION In view of the above, the main object of the present invention is to provide a thin image 20 1321846 chip package structure, which can effectively reduce the volume after the overall assembly. Another object of the present invention is to provide a thin image wafer sealing structure which can prevent the image sensing area from being contaminated or damaged when the wire is applied. 5 EDGE, in order to achieve the above object, the present invention provides a thin image chip package structure 'contains: a carrier; an image wafer is formed by its end face connected to the S-chip carrier' on the other end of the image chip There is an image sensing area' and a plurality of wafers 塾 are formed on the periphery of the image sensing area, and a cover body has a connecting portion and a top cover portion, and the connecting portion is connected to the image On the wafer, between the image sensing area and the wafer pad, such that the connecting portion is blocked between the image sensing area and the wafer pad. The top portion is coupled to the connecting portion. And being located above the image sensing area; a plurality of wires are connected to the wafer pad by one end thereof, and the other end is connected to the carrier, so that the image chip and the carrier are electrically connected by the wire a cover body having a side wall and a top plate connected to the carrier, the top plate is coupled to the side wall, and the top plate is raised to have a perforation such that the top cover portion is located at the perforation In communication with the outside world And the top plate can completely cover the wire. 20 [Embodiment] For the purpose of reviewing the features and objects of the present invention, the following preferred embodiments are listed, with reference to the following description: Please refer to the first and second figures. J 5 1321846 is a thin image chip package structure (1), which mainly comprises a carrier (11), an image wafer (12), a cover (13), a plurality of wires (14), a cover (15) and an adhesive (16); wherein: the δ meta-carrier (11) can be made of plastic, reinforced plastic, fiberglass, ceramic, etc. a printed circuit board or a printed circuit board (PCB ' PRE-MOLD), as a package structure ((9) is electrically connected to the outside; the carrier (11) has a flat shape with a top surface (111) And a bottom surface (112) opposite to the top surface (111), the top surface (111) is provided with a predetermined pattern and a number of circuit wirings (not shown) and a plurality of electrical wirings with the circuit Οο The circuit pad (113) of the same. The image wafer (12) has a top surface and a top surface The bottom surface of the opposite side is adhered to the top surface (111) of the carrier (11) by an adhesive material such as epoxy resin, enamel resin, low melting glass or double-sided tape. An image sensing area 15 (121) is disposed at a central position of a top surface of the image chip (12) for imaging, and is located at an outer periphery of the image sensing area (121) on a top surface of the image chip (12). a plurality of wafer pads (122) electrically connected to the image wafer (12). The remote cover (13) includes a connecting portion (131) and a top cover portion (132); the connecting portion ( 131) In the present embodiment, the annular body is a hollow core, and the 20 series can be made of plastic, glass, glass fiber, metal or ceramic material to form a cover space inside the shaft center (133). The connecting portion (131) is connected to the periphery of the image sensing area (i21) of the top surface of the image chip (12) by an adhesive edge (bottom edge) connected by an adhesive (not shown). And connecting between the image sensing area (121) and the die pads (丨22), so that the image sensing area 6 (121) is located in the cover In the space 33), the periphery of the image sensing area (121) is closed by the connecting portion (4), and the wafer soldering ((2)) and the image sensing area (121) are allowed to be connected by the connecting portion. (131) and spaced apart, the outer side of the connecting portion (m) is further adhered to the image crystal 5 (I2) by a quick-drying glue (134) to quickly fix the connecting portion (131) In a position corresponding to the image wafer (10), the top cover portion (132) is an insulating disk-shaped thin plate (which may also be a rectangular thin plate) in the embodiment, and may be made of a light-transmitting material such as glass. The top cover. P (132) is adhered to the other end edge (top edge) of the connecting portion (131) by an adhesive (not shown) such that the top cover portion (132) is located in the image 1〇 Above the sensing area (121) and having a predetermined distance from the image sensing area (121) by connection with the connecting portion (131), the cover portion (132) is covered by the top cover portion (132) The space above the space (133) is closed; in the embodiment, the width of the top cover portion (132) is equal to the width of the connecting portion (131), but in the continuous design, the top portion is The width area may also be greater than the width of the connecting portion by 15 degrees. The wire (14), such as shai, is made of a conductive metal material such as gold, aluminum, etc., and the wire (113) and the circuit pad (113) of the carrier (11) and the wafer are respectively used by a wire bonding technique. (12) The wafer pad (122) is electrically connected; during the wire bonding operation, the wire (14) is first firmly secured to the circuit pad (113) by perpendicular to the carrier (11) circuit solder (113) 20 Grounding (which is the first solder joint), and then stretching the wire (14) upward to the top surface of the wafer (12), extending in a nearly horizontal manner to the wafer pad (122) (for the first The second solder joint can be used to flatten the space above the wafer (12) for the conductor (14) to substantially reduce the height of the package structure (10). 1^21846 The cover body (15) can be made of an opaque plastic, glass fiber, metal, ceramic or transparent glass, quartz or plastic material; the cover body (15) has a side wall (151) and a The top plate (152), in the embodiment, is a rectangular body (also an annular body) that is axially vacant, such that the axial interior 5 forms a cover space (153). The side wall (151) is connected to the top surface (111) of the carrier (11) by an adhesive (not shown) at one end edge (lower edge), and is located on the circuit pad ( 113), the wafer (12), the circuit pad (113) and the wires (14) are all located in the package cover space (153), and the top plate (152) is a a rectangular thin plate (which may also be a ring-shaped 10 thin plate) 'the top plate (152) is connected to the other end edge (top edge) of the side wall (ι 51) with its outer edge, and the top plate (152) is centrally formed and formed a perforation 〇 54), the aperture of the perforation (154) is slightly larger than the outer diameter of the top cover portion (丨32) of the cover (丨3) such that the top cover portion (132) is located at the perforation (154) And the top plate (152) can completely cover the wire (14). 15 The adhesive (16) can be made of materials such as silicones, epoxy resins (Ep〇xles), acrylic resins (Acrylics), p〇lyamides, and low melting glass. The adhesive (丨6) is disposed between the outer side of the top cover portion (132) of the cover leg (13) and the inner wall surface of the through hole (154) of the cover body (15), so that the s-shaped cover body (13) The cover body (15) is adhered to enclose the wafer (12) 2 and the wire (14) in the cover space (153) of the cover body (15) to complete the overall packaging operation. . Since the package structure (1 〇) of the present invention performs the wire bonding operation (ie, the operation of the wire/, 曰a piece: 塾 and the circuit solder joint), the image sensing area (121) has been used by the cover (u). ) Blocking with the wafer pad (122) can avoid the occurrence of accidental contact or contamination of the image sensing area (121) during the operation of the line 13 1321846. In addition, since the wire (I4) extends to the wafer pad - (I22) in a nearly horizontal manner, the space for the wire (14) above the wafer (12) can be flattened. The height of the package structure (10) is greatly reduced. Further, the connecting portion (131) and the top cover portion (132) of the cover body (13) can also be integrally formed, and the side wall (151) of the cover body (15) and the top plate (152) It can also be made by one-piece molding, which can simplify the overall assembly work. φ. Referring to the third embodiment, a thin image chip package structure (20) according to a second preferred embodiment of the present invention, which comprises the same as the above embodiment, includes a carrier (21) and an image wafer P2. a cover (23), a plurality of wires (24), a cover (25) and an adhesive (26), but differs from the above embodiment in that: the cover (25) covers a space ( 253) further comprising a covering body (27) covering the wafer (22) and the wire (24), the covering body (27) being a Silicone resin or an epoxy resin ( Epoxies), acrylic resin 15 (Acrylics), polyamides (Polyamides), low melting point glass, etc., made of material φ, the coating body (27) is gelatinized in the initial stage, and then dried and solidified into A hard protector protects the wafer (22) and the wires (24). Referring to FIG. 4, a thin image chip package structure (3A) according to a third preferred embodiment of the present invention, which comprises the same package as the first preferred embodiment, 20 includes a carrier (31) and an image. The wafer (32), a cover (33), a plurality of wires (34), a cover (35) and an adhesive (36), but differ from the first preferred embodiment in that: the wire (34) Soldering one end of the wafer to the wafer pad (322) of the wafer (32), soldering the other end to the top surface (311) of the carrier (31), and 9 1321846 the wire (34) After soldering one end to the carrier (31), it is gradually stretched obliquely toward the center of the wafer (32) to be soldered to the wafer solder S (322) from the other end. [Therefore, the wire (34) is It is inclined, although its wire (the space occupied by 3 sentences is larger), but it is easier for the operator to wire. 5 The side wall (351) of the cover (35) is adjacent to the top surface of the carrier (31) (3) u) an accommodating space (355) is formed on the inner portion of the connection, and the accommodating space (355) is for accommodating the portion of the wire (34) adjacent to the carrier (31), that is, the accommodating space (355) The side wall (351) has a thin thickness and exhibits a beveled shape of the same direction as the 'line (34). Thus, the 5 mysterious wire (34) is obliquely connected to facilitate the wire bonding operation ίο. The increased space consumption can be compensated by the wire (34) being placed in the accommodating space (355), so that the overall height and width of the cover (35) need not be increased, and the package structure can be similarly 3〇) is thinner, which can reduce the difficulty of the wire bonding operation and improve the efficiency of the wire bonding operation. 15 Referring to FIG. 5, a type 4 image chip package structure (40) according to a fourth preferred embodiment of the present invention is provided. The same as the first preferred embodiment includes a carrier (41), an image wafer (42), a cover (43), a plurality of wires (44), a cover (45) and an adhesive ( 46), but differs from the first preferred embodiment in that: 20 the side body (45) protrudes from the top plate (452) to form a receiving portion (456), and the inner portion of the receiving portion (456) Forming a chamber (457) 'the chamber (457) and communicating with the perforation (454), the inner wall surface of the chamber (457) is formed a first threaded portion (458), the first threaded portion (458) is an internal thread. The 10 ° thin-length shirt-like chip package structure (40) further includes a lens (47) having a tube body (471) and a plurality of mirrors (72) fixed in the tube body (471). A second thread portion (473) is disposed on the outer circumferential surface of the tube body (471), and the first thread portion (473) An external thread is threaded onto the fifth threaded portion (458) of the cover to enable the lens (47) to be displaced above and below by rotating the tube (471) To adjust the focal length of the lens (々π) in the lens (47). Referring to a sixth embodiment, a thin image chip package structure (50) according to a fifth preferred embodiment of the present invention includes a carrier (51) and an image chip (the same as the first preferred embodiment). 52), a cover (53), a plurality of guide wires (54) '- cover (55) and an adhesive (56), but differs from the first preferred embodiment in that: The top cover portion (532) of (53) is a lens attached to the connection 4 (531) such that the top cover portion (532) is located above the image sensing region (52i) by The connection portion (531) is connected such that the top cover portion (532) 15 is spaced apart from the 泫 image sensing region (52 有一) by a predetermined distance so that the hood portion (532) can provide a focusing effect. The cover body (55) protrudes from the top plate (552) to form a receiving portion (556). The inside of the receiving portion (556) is vertically emptied to form a chamber (557). The chamber (557) is in communication with the perforation (554), and a lens (559) is disposed in the chamber (557). Of course, the top cover portion (532) may be formed integrally with the connecting portion (531) and the lens (559) may be integrally formed with the receiving portion (556). Referring to FIG. 7, a thin image chip package structure (60) according to a sixth preferred embodiment of the present invention, which is the same as the first preferred embodiment, includes a carrier (61) and an image chip (61). 62), a cover (63), a plurality of wires (64), a cover (65) and an adhesive (66), but differs from the first preferred embodiment in that: the top of the carrier (61) The surface (611) is recessed downwardly with a predetermined width and depth to extend a recessed area (614). The image wafer (62) is disposed in the recessed area (614), and the wires (64) are lined. The technique connects the two ends of the chip to the die pad (622) of the CMOS image chip (62) and the circuit pad (not shown) on the top surface (611) of the carrier (61). The cover body (65) has only one top plate (652) and is adhered to the top surface (611) of the carrier (61) by a peelable adhesive body (651) to make the cover body ( 63) The top cover portion (632) is also located in the through hole (654) of the cover body (65), and the cover body (65) is also bonded to the cover body (63) by the adhesive (66). Further, the green body (651) may be a plurality of viscous bodies which are adhered to the top surface (611) of the carrier (6) by means of a spot method. In this way, not only the object of the present invention can be separated from the shop body by the separation of the body (four) and the shop. Although in the present embodiment, the circuit soldering (4) of the carrier is placed on the top of the device, but it is actually disposed in the area, so that the package is as a whole. The structure can reduce the height even more. 12 丄: > Ζ 1 δ 40 [Simple Description of the Drawings] The first drawing is a schematic cross-sectional view of a first preferred embodiment of the present invention. The second drawing is a top plan view of the preferred embodiment shown in the first figure. The third drawing is a schematic cross-sectional view of a second preferred embodiment of the present invention. Figure 4 is a schematic cross-sectional view showing a third preferred embodiment of the present invention. Figure 5 is a cross-sectional view showing a fourth preferred embodiment of the present invention. Figure 6 is a cross-sectional view showing a fifth preferred embodiment of the present invention. Figure 7 is a cross-sectional view showing a sixth preferred embodiment of the present invention. 10 [Description of Main Components] "First Preferred Embodiment" 15 Thin Image Chip Package Structure (1 〇) Carrier (11) Top Surface (111) Bottom Surface (112) Circuit Pad (113) Image Wafer (12) Image Sensing area (121) Wafer pad (122) Cover (13) Connection (131) Top cover (132) Covering space (133) Quick-drying glue (134) Wire (14) Cover (15) Side Wall (151) Top plate (152) Covering space (153) Perforation (154) Adhesive (16) Second preferred embodiment Thin image chip package structure (2〇) 13 20 1321846 Carrier (21) Cover (23) Cover (25) Adhesive (26) 5 "Third Preferred Embodiment" Thin Image Chip Package Structure (30) Carrier (31) Image Wafer (32) Cover (33) ίο Cover (35) Housing Space (355) "Fourth Preferred Embodiment" Thin Image Chip Package Structure (40) Carrier (41) 15 Cover (43) Cover (45) Housing (45 6) Perforation (454) Adhesive (46) 20 Tube (471) Second thread portion (473) "Fifth preferred embodiment" Thin image chip package structure (50) Carrier (51) Image wafer (22) Wire (24) Cover space (253) Cover Body (27) top surface (311) crystal Pad (322) Wire (34) Sidewall (351) Adhesive (36) Image Wafer (42) Wire (44) Top Plate (452) Housing (457) First Thread (458) Lens (47) Lens (472 Image chip (52) 14 1321846 Image sensing area (521) - Connection (531) Wire (54) Top plate (552) '5 Room (557), Lens (559) "Sixth preferred embodiment" _ Thin Image Chip Package Structure (60) Carrier (61) ίο Recessed Area (614) Wafer Pad (622) Top Cover (632) Cover (65) Top Plate (652) 15 Adhesive (66) Cover (53) Top cover part (532) Cover body (55) Housing part (556) Perforation (554) Adhesive (56) Top surface (611) Image wafer (62) Cover (63) Conductor (64) Viscous body (651 ) Perforation (654) 15

Claims (1)

1321846 十、申請專利範圍: 1. 一種薄型影像晶片封裝結構,包含有: 一載體; 一影像晶片,係以其一端面連結於該載體上,該影像 晶片之另一端上形成有一影像感測區’並於該影像感測區 5 之外周邊上形成有若干之晶片焊墊; 一罩體,具有一連接部及一頂罩部,該連接部係連結 於該影像晶片上,並位於該影像感測區與該晶片焊墊之 間,使由該連接部加以阻隔於該影像感測區與該晶片焊墊 之間,該頂罩部係連結於該連接部上,並位於該影像感測 10 區之上方; 若干之導線,係以其一端連接於該晶片焊墊上,另一 端則連接於該載體上,使該影像晶片與該載體間藉由該導 線而電性連通; 一蓋體,係連接於該載體上用以封裝晶片及各導線, 15 並具有一頂板,且該頂板形成有一穿孔,使該頂罩部位於 該穿孔中,而與外界相通,且該頂板係可將該導線完全蓋 覆。 2. 依據申請專利範圍第1項所述薄型影像晶片封裝結 構,其中更包含有一黏著物,係設於該罩體之外側與該蓋 20體之穿孔間,以黏接該罩體之頂罩部與該蓋體之頂板。 3. 依據申請專利範圍第1項所述薄型影像晶片封裝結 構,其中該載體具有一頂面及一與該頂面相背之底面,該 頂面上佈設有呈預定態樣及數量之電路佈線及若干與該電 路佈線電性相通之電路焊塾,該影像晶片係連結於該頂面 161321846 X. Patent Application Range: 1. A thin image chip package structure comprising: a carrier; an image chip connected to the carrier by one end surface thereof, and an image sensing area formed on the other end of the image chip And forming a plurality of wafer pads on the periphery of the image sensing area 5; a cover having a connecting portion and a top cover portion, the connecting portion being coupled to the image wafer and located in the image Between the sensing region and the die pad, the connecting portion is blocked between the image sensing region and the die pad, and the cap portion is coupled to the connecting portion and located at the image sensing a plurality of wires, wherein one end of the wire is connected to the wafer pad, and the other end is connected to the carrier, so that the image chip and the carrier are electrically connected by the wire; Attached to the carrier for encapsulating the wafer and the wires, 15 and having a top plate, and the top plate is formed with a through hole so that the top cover portion is located in the through hole and communicates with the outside, and the top plate can Line completely cover component. 2. The thin image chip package structure according to claim 1, further comprising an adhesive disposed between the outer side of the cover and the perforation of the cover 20 to adhere the cover of the cover And the top plate of the cover. 3. The thin image chip package structure according to claim 1, wherein the carrier has a top surface and a bottom surface opposite to the top surface, and the top surface is provided with a predetermined pattern and a number of circuit wirings. a plurality of circuit pads electrically connected to the circuit wiring, the image wafer being coupled to the top surface 16
TW095143604A 2006-11-24 2006-11-24 Package structure for thin type image chip TW200824105A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI804052B (en) * 2021-06-04 2023-06-01 同欣電子工業股份有限公司 Non-soldering type sensor lens

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI804052B (en) * 2021-06-04 2023-06-01 同欣電子工業股份有限公司 Non-soldering type sensor lens

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