TWI302352B - - Google Patents

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Publication number
TWI302352B
TWI302352B TW091134813A TW91134813A TWI302352B TW I302352 B TWI302352 B TW I302352B TW 091134813 A TW091134813 A TW 091134813A TW 91134813 A TW91134813 A TW 91134813A TW I302352 B TWI302352 B TW I302352B
Authority
TW
Taiwan
Prior art keywords
layer
source
forming
drain
metal
Prior art date
Application number
TW091134813A
Other languages
English (en)
Chinese (zh)
Other versions
TW200409244A (en
Inventor
Kuo Chien Wu
Zheng-Ping Lin
Original Assignee
Nanya Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanya Technology Corp filed Critical Nanya Technology Corp
Priority to TW091134813A priority Critical patent/TW200409244A/zh
Priority to US10/397,627 priority patent/US6743717B1/en
Publication of TW200409244A publication Critical patent/TW200409244A/zh
Application granted granted Critical
Publication of TWI302352B publication Critical patent/TWI302352B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H10B99/22—Subject matter not provided for in other groups of this subclass including field-effect components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H10D84/0133—Manufacturing common source or drain regions between multiple IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Electrodes Of Semiconductors (AREA)
TW091134813A 2002-11-29 2002-11-29 Method for forming metal silicide on source and drain TW200409244A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW091134813A TW200409244A (en) 2002-11-29 2002-11-29 Method for forming metal silicide on source and drain
US10/397,627 US6743717B1 (en) 2002-11-29 2003-03-26 Method for forming silicide at source and drain

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW091134813A TW200409244A (en) 2002-11-29 2002-11-29 Method for forming metal silicide on source and drain

Publications (2)

Publication Number Publication Date
TW200409244A TW200409244A (en) 2004-06-01
TWI302352B true TWI302352B (https=) 2008-10-21

Family

ID=32322979

Family Applications (1)

Application Number Title Priority Date Filing Date
TW091134813A TW200409244A (en) 2002-11-29 2002-11-29 Method for forming metal silicide on source and drain

Country Status (2)

Country Link
US (1) US6743717B1 (https=)
TW (1) TW200409244A (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050069437A (ko) * 2003-12-31 2005-07-05 동부아남반도체 주식회사 에스램 소자의 제조방법

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6025267A (en) * 1998-07-15 2000-02-15 Chartered Semiconductor Manufacturing, Ltd. Silicon nitride--TEOS oxide, salicide blocking layer for deep sub-micron devices

Also Published As

Publication number Publication date
TW200409244A (en) 2004-06-01
US6743717B1 (en) 2004-06-01
US20040106282A1 (en) 2004-06-03

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