1302080 ⑴ 九、發明說明 【發明所屬之技術領域】 本發明是有關於印刷配線板及其製造方法，尤其是， 有關於剛性·撓曲基板等，於基層基板的部分領域具有多 層部的印刷配線板及其製造方法。 【先前技術】 • 作爲被使用於電子機器的印刷配線板的一種，眾知有 如下構成的剛性-撓曲基板。 亦即，該剛性-撓曲基板是具有於聚醯亞胺薄膜等具 有絕緣性的基層薄膜的至少單面具有由銅箔等產生的導體 層的基層基板，於該基層基板的導體層側的一面，爲了將 其部分的領域作成多層化，於絕緣性薄膜的至少單面層積 具有導體層的層積板，藉由上述基層基板的上述導體層與 上述層積板的上述導體層形成有剛性多層部，而且形成有 • 由上述基層基板的上述導體層產生的導通連接用的撓曲電 纜部。 此種剛性-撓曲基板是記載於日本CMK起始頁[2004 年10月1曰檢索]網際網路 URL:http://www.cmk-corp.com/html/product/prod_rf__idx.html ' http://www.crnk-corp.com/pdf/products/RigidFlex0306.pdl (非專利文獻1)及日本美克特侖起始頁[200年10月1日 檢索]網際網路 URL:http://www.mektron.co.jp/fb/index.html、 http://www.mektron.co.jp/fbb/index.html(非專利文獻 2)等 (2) 1302080 參照第8圖說明習知的剛性-撓曲基板的具體例（6層） 〇 如第8圖所示地，該習知的剛性-撓曲6層基板，觀 看斷面圖，於中央（層積方向的中央），作爲基層基板，於 FPC用的內層CCL(貼銅層積板）100，亦即，於聚醯亞胺 薄膜101的兩面配置具有由銅箔產生的導體圖案 102、 # 103的兩面貼銅的內層CCL100，而於其兩面全面分別配 置有CL(覆蓋襯墊）110、120。CL110、120是於聚醯亞胺 等所致的覆蓋薄膜111、120的單面具有黏接層112、122 ，分別藉由黏接劑層112、122被黏貼於CCL100的表面 〇 又，有此些外側（外層側）的部分領域（在斷面圖觀看 爲左右兩側），經由層間黏接薄片（層間黏接劑）1 3 1、1 3 2 與預浸材133、134層積配置有兩面貼銅的外層CCL140、 _ 15〇。外層CCL140、150是於絕緣薄膜141、151的兩面 分別形成由銅箔產生的導體圖案142、143、152、153。 藉此’構成由內層CCL100，夕}層CCL140、150產生 的多層部A，及由內層CCL100產生的導通連接的可撓性 電纜部B。 又，在多層部A形成有層間導通用電鍍通孔135、 1 36。又，在最外層形成有電路保護用永久光阻層（絕緣層 )137 、 138 。 該剛性撓曲6層基板是製造過程如下所述。 -6 - 1302080 (3) (1) 作爲配置於中央的基層基板，進行FPC用的內層 CCL1 00兩面的電路形成（導體圖案1〇2、103的形成），於 其兩面黏接CCL110、120。 (2) 在外層 CCL140、150中，形成位於內層 CCL100 側的電路（導體圖案 142、152)，將其外層 CCL140、150 經由層間黏接薄片131、132與預浸材133、134與在（1) 所形成的內層CCL100黏貼。由此，形成多層部A。 # (3)爲了得到多層部A的層間電路的互相導通而打開 貫通穴，於銅箔表面及貫通穴內進行鍍銅，形成電鍍通孔 135 、 136 ° (4) 進行由外層CCL140、150產生的最外層的電路形 成（導體圖案143、153的形成），又，設置永久抗蝕劑層（ 抗焊劑層）137、138完成剛性-撓曲6層基板。 又，剛性-撓曲6層基板時，省略預浸材133、134， 僅經由層間黏接薄片131、132，也可進行層積。又，在 Φ FPC多層基板時，省略預浸材 133、134，作爲外層 CCL140、150，使用與內層CCL100同樣的FPC用者。 此種多層基板是一體地設置多層部A與電纜部LB， 於電纜部B具有可撓性，爲其特徵。 如上述過程所述，此些多層基板是以層間黏接劑，預 浸材等進行層積，惟必須抑制多層部A與電纜部B的境 界部分C的黏接劑滲出。層間黏接劑是在多層部A必須 確保電路塡充性，而未硬化時的熔融黏度較低者較理想。 但是，若層間黏接劑的熔融黏度過低，則在層積時多層部 1302080 (4) A與電纜部B的境界部分C的滲出量較多，而有損及電 纜部B的可撓性。 對於此，一般採用可確保電路塡充性，且可抑制樹脂 流動，調整黏接劑或預浸材的熔融黏度，或是黏貼時所使 用的緩衝材的組合來防止的方法。此外，也提案在境界部 設置虛擬圖案，或是境界部配置樹脂流動防止用的堤堰材 等以防止樹脂流出至電纜部。此種提案是記載於日本特開 # 2001-156445號公報（專利文獻1)及日本特開2001-185854 號公報（專利文獻2)。 然而，針對於從多層部樹脂流出至電纜部的防止對策 ’爲了調整樹脂的黏度而設置虛擬圖案，設置堤堰材等， 任何情形均必須與一般不相同的過程，而有成爲提高成本 的主要原因的問題。 又，一方面，隨著電子機器的小型化，薄型化，針對 於被裝載於電子機器的印刷電路基板也被要求更薄型化， • 而在習知的多層基板構造中，有限度。 在習知構造爲了將基板做成較薄，則必須將所使用的 材料作成較薄。例如作爲被使用於多層基板的材料有如下 者0 (l)CCL(聚醯亞胺薄膜與電路銅箔） 聚醯亞胺薄膜是25μπι厚度（lmil)的材料通用地被使 用。作爲薄基材也使用 銅箱是以 35μιη(1〇ζ)作爲標準，有 iwm(i/2〇z)，ι2μιη(1/3〇ζ)， (5) 1302080 9μηι(1/4οζ)等。例如將聚醯亞胺薄膜作爲iamil，將銅箔 作爲1 / 4 ο z ’則實現總厚2 1 · 5 μ m的C C L，惟薄銅箱是高 價格，也很難製造CCL，使得材料成本變高。又，因較薄 ’不容易處理，在手工作業中，容易發生折斷，縐紋等不 良。 (2) CL(聚醯亞胺薄膜與黏接劑層） Φ 與CCL同樣地，聚醯亞胺薄膜是imii的材料通用地 被使用，惟作爲薄基材也使用材。黏接劑是可加 工成任意厚度，爲了塡充於電路間，比電路銅箔還厚較理 想。 (3) 玻璃纖維強化環氧樹脂板（GE板） 有約60μπι的薄基材，惟因在中心夾住玻璃纖維，因 此作成愈薄有所限制。 (4) 使用於層間黏接的黏接劑 與CL用黏接劑同樣，可加工成任意厚度，而爲了塡 充電路間，比電路銅箱還厚較理想。 (5) 用以連接層間的鍍銅 爲了確保連接可靠性，更薄化上有界限。界限厚度是 也依存於基板材質或厚度，穴的品質。一般，若基板變薄 ，則可將鍍厚作成更薄。 -9- (6) 1302080 (6 )表層的永久抗蝕劑層 爲了保護電路，需要一定厚度，依存於電路厚度。 然而，任何材料都爲了確保生產性或成本，性能而被 要求一定以上的厚度，而在作成更薄型化上也有界限。 【發明內容】 • 本發明是爲了解決上述習知的問題點而創作者，其目 的是在於提供重新認識構造而作成更薄型化，而且也可達 成防止樹脂從多層部流出至電纜部的印刷配線板及其製造 方法。 依本發明的印刷配線板，屬於具有於絕緣性基層薄膜 的至少單面具有導體層的基層基板的導體層側的一面，爲 了將其部分領域作成多層化，於絕緣性薄膜的至少單面層 積具有導體層的層積板，由上述基層基板的上述導體層與 ® 上述層積板的上述導體層產生的多層部，及由上述基層基 板的上述導體層產生的導通連接用的電纜部，其特徵爲： 多層化所用的上述層積板的上述絕緣性薄膜延伸至上述基 層基板的上述電纜部，該絕緣性薄膜的延伸部具有保護被 覆上述電纜部的上述導體層的覆蓋膜的功能。 依本發明的印刷配線板，較理想是上述層積板的上述 層積板的上述絕緣性薄膜是在上述電纜部中藉由黏接劑層 被黏貼於上述基層基板的導體層側的一面。 依本發明的印刷配線板，較理想是上述基層基板的上 -10- (7) 1302080 述基層薄膜與上述層積板的上述絕緣性薄膜，均由可撓性 樹脂薄膜所構成。 依本發明的印刷配線板，較理想是於上述多層材層積 預浸材。 依本發明的印刷配線板的製造方法，其特徵爲具有： 於絕緣性基層薄膜的至少單面具有導體層的基層基板的導 體層側的一面，爲了將其部分領域作成多層化，於絕緣性 • 薄膜的至少單面黏貼具有導體層的層積板，藉由上述基層 基板的上述導體層與上述層積板的上述導體層形成多層部 ，而將此以外的部分作成由上述基層基板的上述導體層產 生的導通連接用的電纜部的層積硬化工程；上述層積板的 上述絕緣性薄膜延伸至上述基層基板的上述電纜部，將該 絕緣性薄膜的延伸部以上述層積硬化工程黏貼於上述電纜 部，而藉由該延伸部來保護被覆上述電纜部的上述導體層 【實施方式】 本發明的新穎特徵，是被記載於申請專利範圍。然而 ’發明本身及其他特徵與效果，是參照所附圖式而閱讀具 體性實施例的詳細說明更容易地瞭解。 參照第1圖說明將依本發明的印刷配線板適用作爲剛 性-撓曲6層基板的一實施形態。 如第1圖所示地，本實施形態的剛性·撓曲6層基板 ’是在斷面圖觀看於中央（層積方向的中央），作爲基層基 -11 - 1302080 (8) 板，具有FPC用的內層CCL(貼銅層積板）10。該內層 CCL10是於可撓性樹脂薄膜的聚醯亞胺薄膜（聚醯亞胺基 材）11兩面形成有由銅箔產生的導體圖案12，13。 在內層CCL10兩面的部分領域（觀看斷面圖爲左右兩 側），經由環氧系黏接劑產生的層間黏接薄片21、22與環 氧系統的預浸材 23、24層積配置有兩面貼銅的外層 CCL30、40。 Φ 外層CCL30、40是用以多層化的貼銅層積板，於絕 緣性的可撓性樹脂薄膜的聚醯亞胺薄膜（聚醯亞胺基材3 1 、41兩面分別形成有由銅箔產生的導體圖案32、33、42 、43 〇 由此，構成有由內層CCL10，外層CCL30、40產生 的多層部A，及由內層CCL10產生的導通連接用的可撓 性電纜部B。 在多層部A形成有層間導通用電鍍通孔25、26或表 # 層導孔27、28。又，在最外層，形成有電路保護用的永 久抗蝕劑層（絕緣層）51、52。 外層CCL3 0、40的聚醯亞胺薄膜31、41是延伸至成 爲基層基板的內層CCL10的電纜部B，該聚醯亞胺薄膜 31、41的電纜對應部分（延伸部）31B、41B，黏貼於設在 內層CCL10的兩面全面的層間黏接薄膜21、22的電纜對 應部分21B、22B的表面。 由此，外層CCL3 0、40的聚醯亞胺薄膜31、41的電 纜對應部分（延伸部）3 1 B、4 1 B ’具有保護被覆電纜部B的 -12- 1302080 Ο) 導體圖案（導體層）12、13的覆蓋薄膜的功能。 在該構造的剛性-撓曲基板，成爲不需要用以保護被 覆電纜部B的導體圖案的CL(覆蓋襯墊。亦即，在表示於 第8圖的習知剛性-撓曲基板，可省略一樣地層積於多層 部A與電纜部B的CL110、120，而僅該份量，可將多層 部A作成較薄。 與習知例比較，例如在習知，使用聚醯亞胺薄膜 # 25μπχ，黏接劑層25μιη的CL時，則在此實施形態中，在 兩面合計100 μπι，可將多層部Α作成較薄。又，若不需要 CL，當然降低材料費的成本成爲可能。 又，層間黏接薄片 21，22是成爲均配置於外層 CCL30、40的內側，而不會露出至基板外部。所以在通常 的層積條件下，可抑制對於層間黏接薄片21、22的境界 部C的滲出，而可提高境界部的可撓性。 預浸材23、24是使用於必須多層部A的機械性強度 ® 的時候（剛性化），視需要可作成較薄。又，也可加以省略 °或是不使用多層部A的層間黏接薄片21、22而僅作爲 預浸材23、24，在電纜部B僅設置用以黏貼聚醯亞胺薄 膜31、41的層間黏接薄片21、22(僅部分21B、22B)也可 以。 以下，參照第2圖至第7圖說明本實施形態的剛性-擦曲6層基板的製造過程例。 (基層基板的製造） -13 - (10) 1302080 如第2(a)圖所示地，於聚醯亞胺薄膜11的兩面將具 有銅箔14、15的兩面貼銅層積板19作爲出發材料，如第 2(b)圖所示地，鈾刻銅箔14、15而形成導體圖案12、13 ，完成作爲基層基板的內層CCL10。 (上側的多層化用層積板的製造） 如第3(a)圖所示地，於聚醯亞胺薄膜31的兩面將具 φ 有銅箔34、35的兩面貼銅層積板39作爲出發材料，如第 3(b)圖所示地，鈾刻下側銅箔35而形成導體圖案33。兩 面貼銅層積板39是具有與基層基板用的兩面貼銅層積板 19同時大小，而兩面貼銅層積板39的導體圖案33是僅 形成在多層化對應部分Aa，而電纜對應部分Ba的銅箔 3 5是都被除去。 然後，如第3(c)圖所示地，於兩面貼銅層積板39的 多層化對應部分Aa的導體圖案33側疊合符合於多層化對 Φ 應部分Aa大小的大小的預浸材23。預浸材23是僅存在 於多層化對應部分Aa。 之後，如第3 ( d )、（ e )圖所示地，於兩面貼銅層積板 3 9的預浸材23側，疊合與兩面貼銅層積板3 9相同大小 ，換言之，與基層基板用的兩面貼銅層積板1 9同等大小 的層間黏接薄片21。又，層間黏接薄片21是疊合於內層 CCL10的導體圖案12側也可以。 (下側的多層化用層積板的製造） -14- (11) 1302080 如第4(a)圖所示地，於聚醯亞胺薄膜41兩面將具有 銅箔4 4、4 5的兩面貼銅層積板4 9作爲出發材料，如第 4(b)圖所示地，鈾刻上側銅箔44而形成導體圖案42。兩 面貼銅層積板49也具有與基層基板用的兩面貼銅層積板 19同等大小，兩面貼銅層積板4 9的導體圖案4 2是僅形 成在多層化對應部分Ab，而電纜對應部分Bb的銅箔44 是都被除去。 Φ 然後，如第4(c)圖所示地，於兩面貼銅層積板49的 多層化對應部分Ab的導體圖案42側疊合符合於多層化 對應部分Ab大小的大小的預浸材24。預浸材24是僅存 在於多層化對應部分Ab。又，多層化對應部分Aa與Ab 是相同大小。 之後，如第4(d)、（e)圖所示地，於兩面貼銅層積板 49的預浸材24側，疊合與兩面貼銅層積板49相同大小 ，亦即與基層基板用的兩面貼銅層積板1 9同樣大小的層 • 間黏接薄片22。又，層間黏接薄片22是疊合於內層 C CL10的導體圖案13側也可以。 (層積） 如第 5(a)圖所示地，於內層 CCL10的上側配置第 3(e)圖的層積板38，而於內層CCL10的下側配置第4(e) 圖的層積板48，如第5(b)圖所示地，總括這些進行層積 硬化。該層積硬化是利用熱壓機，來加熱，加壓層積板 38，內層CCL10，層積板48的層積體，進行使得層間黏 -15- (12) 1302080 接薄片21、22，預浸材23、24硬化至C級狀態。 由此，構成由內層CCL10，層積板38、48產生的多 層部A ’及由內層CCL10產生的導通連接用可撓性電纔 部B。 利用該層積硬化，上側層積板3 8的聚醯亞胺薄膜3 j 的電纜對應部分31B是在電纜部B的部分中，藉由層間 黏接薄片2 1的電纜對應部分2 1 B被緊密地黏貼於內層 φ CCL10的上面。又，下側層積板48的聚醯亞胺薄膜41( 電纜對應部分41B)是在電纜部B的部分中，藉由層間黏 接薄片22的電纜對應部分22B被緊密地黏貼於內靥 CCL10的下面。 之後，如第6(c)圖所示地，開設貫通多層部A的靥 間導通穴6 1、6 2。又，視需要進行部分層間導通用的表 層導孔用穴63、64的穴加工。 然後，如第6(d)圖所示地，進行鍍銅，藉由鍍銅層 # 65、66得到層間導通穴61、62，表層導孔用穴63、64的 層間導通。 之後，如第7(e)圖所示地，蝕刻上側層積板38的銅 箔34，鍍銅層65，而形成上側最外層的導體圖案32，同 時鈾刻下側層積板3 8的銅箔45，鍍銅層6 6而形成下側 最外層的導體圖案42。與此同時地，完成多層部A的層 間導通用電鍍通孔25、26，表面層導孔27、28。 上側層積板38的銅箔34與鍍銅層65，下側層積板 38的銅箔45與鍍銅層66是在電纜部B中都被除去。由 -16- (13) 1302080 此，在電纜部B，留下聚醯亞胺薄膜31、41，聚醯亞胺薄 膜31、41成爲保護被覆電纜部B的覆蓋薄膜，而確保電 纜部B的可撓性。 之後，如第7 (f)圖所示地，藉由永久抗蝕劑層5 1、 52被覆最外層表面，進行露出部分所必須的表面處理， 以完成剛性-撓曲6層基板。 以此種構成所製作的剛性-撓曲基板，是電纜部B兩 φ 面構造的情形，可減薄CLX2枚分量，同時可抑制對於層 間黏接薄片21、22的境界部C的滲出，而可提高境界部 的可撓性。 (實施例） 針對於如下述地所製作的基板，進行評價特性。評價 特性是針對於黏接劑對於電纜部的滲出量，可撓性層連接 可靠性，耐移動性加以進行。 # 可撓性的評價是實施耐折性試驗（JISC5016)。以極率 半徑3mm在多層部與電纜部的境界，測定斷線的次數。 此爲，將比較例2的次數作爲1的相對評價。層間連接可 靠性的評價是實施氣相耐震試驗（-25°C · 125°C/60分週X 1000次）。在貫通通孔部的導體電阻測定觀察無斷線的情 形。耐移動性的評價是在高溫高濕直流電壓施加試驗（85 〇C/85RH%/DC50Vxl000 小時）Ι^ = 100μηι/100μηι 的梳齒電 極圖案（電路總長2m)，作爲絕緣電阻測定10ΜΩ以上。 -17- (14) 1302080 (實施例1) 構造：表示於第i圖的剛性-撓曲6層基板 所使用的材料構成 •永久抗蝕劑層：鹼顯像型乾薄膜型抗焊劑（3 8 μιη厚） •內層CCL :電解銅箔（12μπι厚），聚醯亞胺基材（25μιη 厚） •預浸材：環氧系預浸材（6〇μιη厚） 0 •層間黏接薄片^環氧系預浸材（25μιη厚） •內層CCL·輥軋銅范（124111厚），聚醯亞胺基材（25μπι 厚） •層間連接：鑛銅（25μπι厚） (實施例2) 構造：由表示於第i圖的剛性-撓曲6層基板除掉預 浸材的FPC6層基板 所使用的材料構成 •永久抗蝕劑層：與實施例1相同 •內層CCL:與實施例1相同 •層間黏接薄片：環氧系預浸材（4〇μιη厚） •內層CCL :與實施例i相同 •層間連接：與實施例1相同 (實施例3) 構造：由表示於第1圖的剛性-撓曲6層基板僅多層 -18- (15) 1302080 ^^除掉層間黏接劑層的剛性-撓曲6層基板 •永久抗蝕劑層：與實施例1相同 •外層CCL :與實施例1相同 •內層CCL :與實施例1相同 同 同相 相 1 1 例 例施 施實 實與 與： : 接 材連 浸間 預層 •(比較例1):表示於第8圖的剛性-撓曲6層基板 所使用的材料構成 •永久抗蝕劑層：與實施例1相同 •外層CCL :與實施例1相同 •預浸材：與實施例1相同 •層間連接薄片：與實施例1相同 • CL :環氧系黏接劑（25μπι厚），聚醯亞胺基材（25μπι厚） •內層CCL :與實施例1相同 © •層間連接：與實施例1相同 (比較例2):由表示於第8圖的剛性-撓曲6層基板除掉預 浸層的FPC6層基板 所使用的材料構成 •永久抗蝕劑層：與實施例1相同 •外層CCL :與實施例1相同 •層間連接薄片：與實施例1相同 • CL :與實施例1相同 -19- (16) 1302080 •內層CCL :與實施例1相同 •層間連接：與實施例1相同 將實施例1〜3與比較例i、2的評價結果表示於表i [表1] 基板 厚度 黏接劑對於電 纜部的滲出量 可撓性 層間連接 可靠性 耐移動 性 實施例1 4 20 μπι 1.4 〇 〇 實施例2 3 3 0 μιη Μ j\\\ 1.8 〇 〇 實施例3 3 70 μπι 並 1.3 〇 〇 比較例1 5 20 μιη 約 1mm 0.5 〇 〇 比較例2 400 μπι 約 0 · 3 m m 1 〇 〇 由表1可知，在實施例1〜3，與比較例1、2相比較 ，則基板厚度（多層部的厚度）變薄，黏接劑不會滲出至電 纜部，而在多層部的境界改善折彎性（可撓性）。針對於層 間連接可靠性與耐移動性，在實施例1〜3與比較例1、2 ，得到同等性能。 (發明的效果） 依本發明的印刷配線板，是在一體形成多層部與電纜 部的印刷配線板中，藉由將構成多層部的絕緣性薄膜予以 延伸以進行電纜部的保護被覆，排除電纜部的保護被覆的 -20- (17) 1302080 覆蓋襯墊，刪減覆蓋襯墊份量的材料成本，實現低成本化 ，並將基板薄型化作成容易，而且成爲也可達成防止樹脂 從多層部流出至電纜部的構造。 【圖式簡單說明】 第1圖是表示將本發明的印刷配線板適用作爲剛性-撓曲6層基板的一實施形態的斷面圖。 # 第2(a)，（b)圖是表示本實施形態的剛性-撓曲6層基 板的製造過程例（製造基層基板）的工程圖。 第3(a)圖至第3(e)圖是表示本實施形態的剛性-撓曲6 層基板的製造過程例（製造上側多層化用的層積板）的工程 圖。 第4(a)圖至第4(e)圖是表示本實施形態的剛性-撓曲6 層基板的製造過程例（製造下側多層化用的層積板）的工程 圖。 φ 第5(a)圖及第5(b)圖是表示本實施形態的剛性-撓曲 6層基板的製造過程例（層積）的工程圖。 第6(c)圖及第6(d)圖是表示本實施形態的剛性-撓曲 6層基板的製造過程例（層積）的工程圖。 第7(e)圖及第7(f)圖是表示本實施形態的剛性-撓曲6 層基板的製造過程例（層積）的工程圖。 第8圖是表示剛性-撓曲6層基板的習知例的斷面圖 -21 - 1302080 (18) 【主要元 10 :內層 11 :聚醯 12 、 13 ： 14 、 15 ： 19 :兩面 21、22 ： φ 23 、 24 : 25 、 26 ： 27 、 28 : 3 0 :外層 3 1 :聚醯 32 、 33 ： 34 、 35 : 38 :層積 Φ 39 :兩面 4 0 :外層 41 :聚醯 42 、 43 ： 44、4 5 ·· 48 :層積 49 :兩面 51、52 ： 61 、 62 ： 件符號說明】[Technical Field] The present invention relates to a printed wiring board and a method of manufacturing the same, and more particularly to a printed wiring having a multilayer portion in a partial region of a base substrate, such as a rigid/flexible substrate. Board and its manufacturing method. [Prior Art] As one type of printed wiring board used in an electronic device, a rigid-flexible substrate having the following configuration is known. In other words, the rigid-flex substrate is a base substrate having a conductive layer formed of a copper foil or the like on at least one surface of an insulating base film such as a polyimide film, and is on the conductor layer side of the base substrate. In order to laminate a part of the field, a laminated board having a conductor layer is laminated on at least one side of the insulating film, and the conductor layer of the base substrate and the conductor layer of the laminated board are formed. The flexible multilayer portion is formed with a flexible cable portion for conducting connection formed by the conductor layer of the base substrate. Such a rigid-flex substrate is described in the CMK start page of Japan [October 2004, search] Internet URL: http://www.cmk-corp.com/html/product/prod_rf__idx.html ' http ://www.crnk-corp.com/pdf/products/RigidFlex0306.pdl (Non-Patent Document 1) and Japan Meikelun starting page [Search for October 1, 200] Internet URL: http:/ /www.mektron.co.jp/fb/index.html, http://www.mektron.co.jp/fbb/index.html (Non-Patent Document 2), etc. (2) 1302080 Referring to Figure 8 Specific Example of Rigid-Flexible Substrate (6 Layers) As shown in Fig. 8, the conventional rigid-flex 6-layer substrate is viewed in the center (center of the stacking direction) as The base layer substrate is disposed on the inner layer CCL (copper-clad laminate) 100 for FPC, that is, on both sides of the polyimide film 101 having the conductor patterns 102 and #103 produced by the copper foil. The layer CCL100 is provided with CL (covering pads) 110, 120 on both sides thereof. CL110 and 120 have adhesive layers 112 and 122 on one side of the cover films 111 and 120 caused by polyimide, etc., and are adhered to the surface of the CCL 100 by the adhesive layers 112 and 122, respectively. Some of the outer (outer layer side) regions (see the left and right sides in the cross-sectional view) are laminated with the prepreg 133, 134 via interlayer bonding sheets (interlayer adhesives) 1 3 1 and 1 3 2 The outer layer of copper is CCL140, _ 15〇. The outer layer CCLs 140 and 150 are formed with conductor patterns 142, 143, 152, and 153 formed of copper foil on both surfaces of the insulating films 141 and 151, respectively. This constitutes the multilayer portion A produced by the inner layer CCL100, the layer CCL 140, 150, and the flexible cable portion B which is electrically connected by the inner layer CCL100. Further, interlayer conduction plating vias 135 and 136 are formed in the multilayer portion A. Further, permanent circuit layers (insulating layers) 137 and 138 for circuit protection are formed on the outermost layer. The rigidly deflected 6-layer substrate is manufactured as follows. -6 - 1302080 (3) (1) As a base substrate disposed in the center, a circuit is formed on both sides of the inner layer CCL1 00 for FPC (formation of conductor patterns 1〇2 and 103), and CCL110 and 120 are bonded to both sides thereof. . (2) In the outer layers CCL 140, 150, circuits (conductor patterns 142, 152) on the side of the inner layer CCL 100 are formed, and the outer layers CCL 140, 150 are interposed with the prepreg 133, 134 via the interlayer bonding sheets 131, 132 ( 1) The inner layer CCL100 formed is pasted. Thereby, the multilayer portion A is formed. # (3) In order to obtain the mutual conduction of the interlayer circuits of the multilayer portion A, the through holes are opened, and copper plating is performed on the surface of the copper foil and the through holes to form plated through holes 135 and 136 ° (4) to be produced by the outer layers CCL 140 and 150. The outermost circuit is formed (formation of the conductor patterns 143, 153), and further, a permanent resist layer (solder resist layer) 137, 138 is provided to complete the rigid-deflected 6-layer substrate. Further, in the case of rigid-deflection of the six-layer substrate, the prepregs 133 and 134 are omitted, and lamination can be performed only via the interlayer adhesive sheets 131 and 132. Further, in the case of the Φ FPC multilayer substrate, the prepregs 133 and 134 are omitted, and as the outer layers CCL 140 and 150, the same FPC users as the inner layer CCL 100 are used. Such a multilayer substrate is characterized in that the multilayer portion A and the cable portion LB are integrally provided, and the cable portion B has flexibility. As described in the above process, the multilayer substrates are laminated by an interlayer adhesive, a prepreg or the like, but it is necessary to suppress the bleeding of the adhesive of the multilayer portion A and the boundary portion C of the cable portion B. The interlayer adhesive is preferably one in which the multilayer portion A must ensure circuit filling, and the melt viscosity is lower when it is not hardened. However, if the melt viscosity of the interlayer adhesive is too low, the amount of bleeding of the multilayer portion 1302080 (4) A and the boundary portion C of the cable portion B during lamination is large, and the flexibility of the cable portion B is impaired. . For this reason, a method of ensuring circuit chargeability, suppressing resin flow, adjusting the melt viscosity of the adhesive or the prepreg, or a combination of cushioning materials used for pasting is generally employed. Further, it is also proposed to provide a dummy pattern in the boundary portion or to arrange a bank material for preventing resin flow in the boundary portion to prevent the resin from flowing out to the cable portion. Such a proposal is described in Japanese Laid-Open Patent Publication No. 2001-156445 (Patent Document 1) and JP-A-2001-185854 (Patent Document 2). However, in order to prevent the resin from flowing out of the multilayer resin to the cable portion, a virtual pattern is set in order to adjust the viscosity of the resin, and a bank material or the like is provided. In any case, it is necessary to have a process different from the general one, and there is a main cause of cost increase. The problem. On the other hand, with the miniaturization of the electronic device and the reduction in thickness, the printed circuit board mounted on the electronic device is required to be thinner, and there is a limit in the conventional multilayer substrate structure. In the conventional construction, in order to make the substrate thinner, it is necessary to make the material used thin. For example, the material used for the multilayer substrate is as follows: (1) CCL (polyimine film and circuit copper foil) Polyimide film is used in a material of 25 μm thick (lmil) in general. The copper case is also used as a thin substrate, and is 35 μm (1 〇ζ) as a standard, and has iwm (i/2〇z), ι2μηη (1/3〇ζ), (5) 1302080 9μηι (1/4οζ), and the like. For example, a polyimide film is used as iamil, and a copper foil is used as 1 / 4 ο z ' to achieve a total thickness of 2 1 · 5 μm CCL, but a thin copper box is expensive, and it is difficult to manufacture CCL, so that the material cost Becomes high. Moreover, since it is not easy to handle, it is easy to break in the manual work, and the crepe is not good. (2) CL (polyimine film and adhesive layer) Φ Like the CCL, the polyimide film is commonly used as a material of imii, but it is also used as a thin substrate. The adhesive can be processed to any thickness, and it is more desirable than the copper foil of the circuit in order to fill the circuit. (3) Glass fiber reinforced epoxy resin sheet (GE sheet) A thin substrate having a thickness of about 60 μm is limited because the glass fiber is sandwiched at the center. (4) The adhesive used for bonding between layers can be processed to any thickness similarly to the adhesive for CL, and is thicker than the copper case for the circuit. (5) Copper plating for connecting layers To ensure connection reliability, there is a limit to thinning. The thickness of the boundary is also dependent on the material or thickness of the substrate, and the quality of the hole. Generally, if the substrate is thinned, the plating thickness can be made thinner. -9- (6) 1302080 (6) Surface permanent resist layer In order to protect the circuit, a certain thickness is required, depending on the thickness of the circuit. However, any material is required to have a certain thickness or more in order to ensure productivity, cost, and performance, and there is a limit in making a thinner form. SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a re-recognition structure to make a thinner structure, and also to realize a printed wiring for preventing resin from flowing out of a multilayer portion to a cable portion. Board and its manufacturing method. The printed wiring board according to the present invention belongs to one side of the conductor layer side of the base substrate having at least one surface of the insulating base film, and is formed on at least one side of the insulating film in order to form a plurality of layers thereof. a laminated board having a conductor layer, a multilayer portion formed by the conductor layer of the base substrate and the conductor layer of the laminated board, and a cable portion for conductive connection by the conductor layer of the base substrate. The insulating film of the laminated board used for multilayering is extended to the cable portion of the base substrate, and the extending portion of the insulating film has a function of protecting a cover film covering the conductor layer of the cable portion. In the printed wiring board according to the present invention, it is preferable that the insulating film of the laminated board of the laminated board is adhered to the conductor layer side of the base substrate by the adhesive layer in the cable portion. In the printed wiring board according to the present invention, it is preferable that the insulating film of the base film and the laminated film of the above-mentioned base substrate are composed of a flexible resin film. According to the printed wiring board of the present invention, it is preferable that the prepreg is laminated on the multilayer material. According to the method of manufacturing a printed wiring board of the present invention, the insulating base film has one surface on the side of the conductor layer of the base substrate having the conductor layer on at least one side of the insulating base film, and the insulating layer is formed in a plurality of layers. • a laminated board having a conductor layer adhered to at least one side of the film, wherein the conductor layer of the base substrate and the conductor layer of the laminated board form a multilayer portion, and the other portion is formed as described above by the base substrate a layer-hardening process of the cable portion for conduction connection by the conductor layer; the insulating film of the laminate plate is extended to the cable portion of the base substrate, and the extending portion of the insulating film is pasted by the laminate hardening process In the cable portion, the conductor layer covering the cable portion is protected by the extending portion. [Embodiment] The novel features of the present invention are described in the patent application. The invention itself, as well as other features and advantages, are more readily understood by reference to the detailed description of the embodiments. An embodiment in which the printed wiring board according to the present invention is applied as a rigid-flex 6-layer substrate will be described with reference to Fig. 1. As shown in Fig. 1, the rigid and flexed six-layer substrate 'in the present embodiment is viewed from the center in the cross-sectional view (the center in the stacking direction), and serves as the base layer -11 - 1302080 (8) plate, and has FPC. The inner layer CCL (copper laminated board) 10 is used. The inner layer CCL10 is formed of a conductor pattern 12, 13 made of a copper foil on both sides of a polyimide film (polyimine substrate) 11 of a flexible resin film. In the partial fields on both sides of the inner layer CCL10 (the viewing cross-sectional view is the left and right sides), the interlayer bonding sheets 21 and 22 produced by the epoxy-based adhesive are laminated with the prepreg 23, 24 of the epoxy system. The outer layers of copper are CCL30, 40 on both sides. Φ outer layer CCL30, 40 is a copper-clad laminate for multilayering, and is formed of a copper foil on both sides of the insulating flexible resin film (polyimide substrate 3 1 , 41) The generated conductor patterns 32, 33, 42, and 43 are formed of a multilayer portion A produced by the inner layer CCL10, the outer layers CCL30, 40, and a flexible cable portion B for conduction connection by the inner layer CCL10. Interlayer conductive plating vias 25, 26 or surface via holes 27, 28 are formed in the multilayer portion A. Further, permanent resist layers (insulating layers) 51, 52 for circuit protection are formed on the outermost layer. The polyimide film 31, 41 of the outer layer CCL3 0, 40 is a cable portion B extending to the inner layer CCL 10 serving as a base substrate, and cable-corresponding portions (extension portions) 31B, 41B of the polyimide film 31, 41, Adhered to the surface of the cable corresponding portions 21B, 22B of the interlayer adhesive films 21, 22 provided on both sides of the inner layer CCL 10. Thereby, the cable corresponding portions of the polyimide films 31, 41 of the outer layers CCL3 0, 40 ( Extension) 3 1 B, 4 1 B 'with -12-1302080 Ο) conductor protecting the covered cable portion B Case (conductive layers) 12 and 13 covering the functional film. The rigid-flex substrate of this structure is a CL (covering liner) which does not require a conductor pattern for protecting the covered cable portion B. That is, the conventional rigid-flex substrate shown in Fig. 8 can be omitted. The layers 110 and 120 of the multilayer portion A and the cable portion B are laminated in the same manner, and the multilayer portion A can be made thinner only for the portion. Compared with the conventional example, for example, a polyimide film #25μπχ is used. In the case where the adhesive layer has a CL of 25 μm, in this embodiment, the total thickness of the multilayer portion can be made thinner by a total of 100 μm on both sides. Further, if CL is not required, it is of course possible to reduce the cost of the material. Since the adhesive sheets 21 and 22 are disposed inside the outer layers CCL 30 and 40 and are not exposed to the outside of the substrate, the boundary portion C of the interlayer adhesive sheets 21 and 22 can be suppressed under normal lamination conditions. The bleed out can improve the flexibility of the boundary portion. The prepregs 23 and 24 are used when the mechanical strength of the multilayer portion A is required (rigid), and can be made thinner if necessary. ° or do not use the interlayer of the multi-layer A Only the prepregs 23 and 24 may be joined to the sheets 21 and 22, and only the interlayer adhesive sheets 21 and 22 (only the portions 21B and 22B) for adhering the polyimide films 31 and 41 may be provided on the cable portion B. Hereinafter, an example of a manufacturing process of the rigid-scratched six-layer substrate of the present embodiment will be described with reference to FIGS. 2 to 7. (Production of a base substrate) -13 - (10) 1302080 As shown in Fig. 2(a) The two-side copper-clad laminate 19 having the copper foils 14 and 15 is used as a starting material on both sides of the polyimide film 11, and the uranium-etched copper foils 14, 15 are formed as conductors as shown in Fig. 2(b). Patterns 12 and 13 complete the inner layer CCL10 as a base substrate. (Production of the upper multilayer laminate) As shown in Fig. 3(a), the both sides of the polyimide film 31 have φ The copper-clad laminates 39 on both sides of the copper foils 34 and 35 are used as a starting material, and as shown in Fig. 3(b), the urethane is inscribed on the side copper foil 35 to form the conductor pattern 33. The double-sided copper-clad laminate 39 has The double-sided copper-clad laminate 19 for the base substrate is simultaneously sized, and the conductor pattern 33 of the double-sided copper-clad laminate 39 is formed only in the multilayered corresponding portion Aa, and the cable pair The copper foils 35 of the partial Ba are all removed. Then, as shown in Fig. 3(c), the side of the conductor pattern 33 of the multilayered corresponding portion Aa of the double-sided copper-clad laminate 39 is superposed to be multilayered. The prepreg 23 of the size of the Φ portion Aa. The prepreg 23 is present only in the multilayered corresponding portion Aa. Thereafter, as shown in the third (d), (e), the copper layer is applied on both sides. The side of the prepreg 23 of the laminated board 39 is laminated to the same size as the double-sided copper laminated board 39, in other words, the interlayer bonding sheet 21 of the same size as the double-sided copper laminated board for the base substrate. Further, the interlayer adhesive sheet 21 may be laminated on the side of the conductor pattern 12 of the inner layer CCL10. (Production of laminated board for multilayering of lower layer) -14- (11) 1302080 As shown in Fig. 4(a), both sides of the copper foil 4 4, 45 are formed on both sides of the polyimide film 41 The copper laminated board 4 9 is used as a starting material, and as shown in Fig. 4(b), the urethane is engraved with the upper side copper foil 44 to form the conductor pattern 42. The double-sided copper-clad laminate 49 also has the same size as the double-sided copper-clad laminate 19 for the base substrate, and the conductor pattern 42 of the double-sided copper-clad laminate 49 is formed only in the multilayered corresponding portion Ab, and the cable corresponds to The copper foil 44 of the portion Bb is removed. Φ Then, as shown in Fig. 4(c), the prepreg 24 conforming to the size of the multilayered corresponding portion Ab is superposed on the side of the conductor pattern 42 of the multilayered corresponding portion Ab of the double-sided copper-clad laminate 49. . The prepreg 24 is only present in the multilayered corresponding portion Ab. Further, the multilayered corresponding portions Aa and Ab are the same size. Thereafter, as shown in the fourth (d) and (e), the prepreg 24 side of the double-sided copper laminated board 49 is laminated and the same size as the double-sided copper laminated board 49, that is, the base substrate. The two-sided copper laminated board used is a layer of the same size of the same. Further, the interlayer adhesive sheet 22 may be laminated on the side of the conductor pattern 13 of the inner layer C CL10. (Layer) As shown in Fig. 5(a), the laminate plate 38 of the third (e) diagram is disposed on the upper side of the inner layer CCL10, and the fourth (e) diagram is disposed on the lower side of the inner layer CCL10. The laminated board 48 is collectively hardened as shown in Fig. 5(b). The layer hardening is performed by using a hot press to heat, pressurize the laminated board 38, the inner layer CCL10, and the laminated body of the laminated board 48, so that the interlayer adhesion -15-(12) 1302080 is connected to the sheets 21, 22, The prepregs 23, 24 are hardened to the C-stage state. Thereby, the multi-layer portion A' produced by the inner layer CCL10, the laminated plates 38, 48, and the conductive connecting portion B for conduction connection generated by the inner layer CCL10 are formed. With this laminate hardening, the cable corresponding portion 31B of the polyimide film 3j of the upper laminated board 38 is in the portion of the cable portion B, and the cable corresponding portion 2 1 B of the interlayer bonding sheet 2 1 is Tightly adhered to the top of the inner layer φ CCL10. Further, the polyimide film 41 (the cable corresponding portion 41B) of the lower laminate 48 is in the portion of the cable portion B, and the cable corresponding portion 22B of the interlayer bonding sheet 22 is closely adhered to the inner crucible CCL10. Below. Thereafter, as shown in Fig. 6(c), the inter-turn conduction holes 6 1 and 6 2 penetrating the multilayer portion A are opened. Further, the hole machining of the surface guide hole holes 63 and 64 which are used for partial interlayer conduction is performed as needed. Then, as shown in Fig. 6(d), copper plating is performed, and interlayer conduction holes 61 and 62 are obtained by the copper plating layers #65 and 66, and the layers of the surface via holes 63 and 64 are electrically connected. Thereafter, as shown in Fig. 7(e), the copper foil 34 of the upper side laminated plate 38 is etched, and the copper layer 65 is plated to form the conductor pattern 32 of the uppermost outer layer, while the uranium is engraved with the copper of the side laminated plate 38. The foil 45 is plated with a copper layer 66 to form a conductor pattern 42 of the lowermost outermost layer. At the same time, the interlayer conduction via holes 25, 26 and the surface layer via holes 27, 28 of the multilayer portion A are completed. The copper foil 34 of the upper laminated board 38 and the copper plating layer 65, and the copper foil 45 and the copper plating layer 66 of the lower laminated board 38 are removed in the cable portion B. From -16-(13) 1302080, in the cable portion B, the polyimide film 31, 41 is left, and the polyimide film 31, 41 serves as a cover film for protecting the covered cable portion B, and the cable portion B is secured. Flexible. Thereafter, as shown in Fig. 7(f), the outermost surface is covered by the permanent resist layers 51, 52, and the surface treatment necessary for the exposed portion is performed to complete the rigid-deflected 6-layer substrate. The rigid-flexible substrate produced in such a configuration is a structure in which the cable portion B has two φ plane structures, and the two components of the CLX can be thinned, and the bleed out of the boundary portion C of the interlayer adhesive sheets 21 and 22 can be suppressed. It can improve the flexibility of the boundary. (Example) Evaluation characteristics were performed on a substrate produced as follows. The evaluation characteristics are based on the amount of penetration of the adhesive to the cable portion, the reliability of the flexible layer connection, and the resistance to mobility. #Flexibility evaluation is the implementation of the folding endurance test (JISC5016). The number of disconnection was measured at the boundary of the multilayer portion and the cable portion with a radius of 3 mm. This is the relative evaluation of the number of times of Comparative Example 2 as 1. The reliability of the interlayer connection was evaluated by performing a gas phase seismic test (-25 ° C · 125 ° C / 60 minutes X 1000 times). The conductor resistance in the through-hole portion was measured to observe the fact that there was no disconnection. The resistance to mobility was evaluated in a high-temperature, high-humidity DC voltage application test (85 〇C/85RH%/DC50Vxl000 hours) 梳^ = 100μηι/100μηι comb-tooth pattern (total length 2m), and the insulation resistance was measured to be 10 Ω or more. -17- (14) 1302080 (Example 1) Structure: Material composition used for the rigid-deflection 6-layer substrate of Fig. i • Permanent resist layer: Alkali-developing dry film type solder resist (3 8 μιη thick) • Inner layer CCL: electrolytic copper foil (12μπι thick), polyimide substrate (25μιη thick) • Prepreg: epoxy prepreg (6〇μηη thick) 0 • Interlayer bonding sheet ^Epoxy prepreg (25μιηη) • Inner layer CCL·Rolled copper vane (124111 thick), Polyimide substrate (25μπι thick) • Interlayer connection: Mineral copper (25μπι thick) (Example 2) Structure: Material composition used for the FPC6 layer substrate from which the prepreg was removed by the rigid-deflection 6-layer substrate shown in Fig. i. • Permanent resist layer: same as in the first embodiment. • Inner layer CCL: and examples 1 same • interlayer bonding sheet: epoxy prepreg (4 μm thick) • inner layer CCL: same as in example i • interlayer connection: same as in example 1 (example 3) structure: 1 rigid-deflected 6-layer substrate with only multiple layers -18- (15) 1302080 ^^ Remove the rigid-flex 6-layer substrate of the interlayer adhesive layer • Permanent resistance Etchant layer: same as in Example 1 • Outer layer CCL: same as in Example 1 • Inner layer CCL: same as in the same embodiment as in Example 1 1 Example of application and comparison: : Joint immersion pre-layer (Comparative Example 1): Material composition used for the rigid-deflection 6-layer substrate shown in Fig. 8 • Permanent resist layer: same as in Example 1 • Outer layer CCL: same as in Example 1 • Prepreg : The same as Example 1 • Interlaminar connecting sheet: same as in Example 1 • CL: epoxy-based adhesive (25 μm thick), polyimide substrate (25 μm thick) • inner layer CCL: same as in Example 1. © • Interlayer connection: same as in the first embodiment (Comparative Example 2): Material composition used for the FPC6 layer substrate from which the prepreg layer was removed by the rigid-deflection 6-layer substrate shown in Fig. 8 • Permanent resist layer : Same as Example 1 • Outer layer CCL: same as in Example 1 • Interlayer connection sheet: same as in Example 1 • CL: same as Example 1 -19- (16) 1302080 • Inner layer CCL: same as in Example 1. • Inter-layer connection: The evaluation results of Examples 1 to 3 and Comparative Examples i and 2 are shown in Table i in the same manner as in Example 1 [Table 1 Substrate thickness Adhesion of the cable to the cable portion Flexible inter-layer connection reliability Resistance to movement Example 1 4 20 μπι 1.4 〇〇 Example 2 3 3 0 μηη Μ j\\\ 1.8 〇〇 Example 3 3 70 μπι and 1.3 〇〇Comparative Example 1 5 20 μηη About 1 mm 0.5 〇〇Comparative Example 2 400 μπι About 0 · 3 mm 1 〇〇 From Table 1, it can be seen that in Examples 1 to 3, compared with Comparative Examples 1 and 2. Further, the thickness of the substrate (thickness of the multilayer portion) is reduced, and the adhesive does not bleed out to the cable portion, and the bendability (flexibility) is improved at the boundary of the multilayer portion. For the interlayer connection reliability and the mobility resistance, the same performance was obtained in Examples 1 to 3 and Comparative Examples 1 and 2. (Effect of the Invention) According to the printed wiring board of the present invention, in the printed wiring board in which the multilayer portion and the cable portion are integrally formed, the insulating film constituting the multilayer portion is extended to protect the cable portion, and the cable is removed. The -20-(17) 1302080 cover of the protective cover covers the cost of the material covering the amount of the liner, reduces the cost, and makes the substrate thinner, making it easier to prevent the resin from flowing out of the multilayer. To the construction of the cable section. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing an embodiment in which a printed wiring board of the present invention is applied as a rigid-deflection six-layer substrate. #2(a) and (b) are drawings showing an example of a manufacturing process (manufacturing of a base substrate) of the rigid-flex 6-layer substrate of the present embodiment. 3(a) to 3(e) are drawings showing an example of a manufacturing process of the rigid-flex 6-layer substrate of the present embodiment (a laminated board for manufacturing an upper multilayer). 4(a) to 4(e) are drawings showing an example of a manufacturing process of the rigid-deflection 6-layer substrate of the present embodiment (a laminated board for manufacturing a lower-side multilayer). φ 5(a) and 5(b) are drawings showing a manufacturing process example (layering) of the rigid-deflection 6-layer substrate of the present embodiment. Fig. 6(c) and Fig. 6(d) are drawings showing an example (layering) of a manufacturing process of the rigid-flex 6-layer substrate of the present embodiment. 7(e) and 7(f) are drawings showing an example (layering) of a manufacturing process of the rigid-deflection 6-layer substrate of the present embodiment. Figure 8 is a cross-sectional view showing a conventional example of a rigid-deflection 6-layer substrate - 21 to 1302080 (18) [Main element 10: inner layer 11: polyfluorene 12, 13: 14, 15: 19: two sides 21 22: φ 23 , 24 : 25 , 26 : 27 , 28 : 3 0 : outer layer 3 1 : poly 醯 32 , 33 : 34 , 35 : 38 : layer Φ 39 : two sides 4 0 : outer layer 41 : poly 醯 42 , 43 : 44, 4 5 ·· 48 : Lamination 49 : Both sides 51, 52 : 61 , 62 : Description of the symbols
CCL 亞胺薄膜 導體圖案 銅箔CCL imine film conductor pattern copper foil
貼銅層積板 層間黏接薄片 預浸材 電鍍通孔 表層導孔 CCL 亞胺薄膜 導體圖案 銅箔 板 貼銅層積板Copper laminated board Interlayer bonding sheet Prepreg Plated through hole Surface guide hole CCL Imine film Conductor pattern Copper foil plate Copper laminated board
CCL 亞胺薄膜 導體圖案 銅箔 板 貼銅層積板 永久抗蝕劑層 層間導通穴 -22 (19)1302080 63、64:表層導孔用穴 65、66 :鍍銅層CCL imine film conductor pattern copper foil plate copper laminated board permanent resist layer interlayer conduction hole -22 (19)1302080 63, 64: surface guide hole 65, 66: copper plating
-23-twenty three