1296791 九、發明說明： 【發明所屬之技術領域】 本發明係關於用於（例如）諸如主動式矩陣液晶顯示器 (AMLCD)之主動式矩陣顯示裝置之基板，在該等顯示裝置 中，每一像元均具有諸如多晶石夕薄膜電晶體（TFT)之開關元 件。具體而言，本發明係關於一基板，在該基板上配備有 測試構件心駭„元件是否正常運作。其亦關於一種 含有此類基板之顯示裝置。 【先前技術】 圖1說明一種典型的主動式矩陣液晶顯示裝置。該裝置係 形成於i處所圖示之顯示基板上’且包括連接至輸入端玥 以接收定時及控制訊號以及待顯示之影像資料的定時及控 制電路2。電路2將適當訊號供應至以顯示源極驅動器4的形 式存在之貝料訊戒產生器及以閘極驅動器$的形式存在之 掃描訊號產生器。 顯示源極驅動器4具有複數個輪出端，其連接至充當螅 所:之像:（像素）之主動式矩陣的行資料線（或”源極線"） 敕獲數個4T^Sl、s2...Sm。該等行電極在主動式矩陣6之 正個高度上延伸，且每―㈣極均連接 ，入端。類似地，驅動器5具有連接至在矩陣6 = 度上延伸的列電極Gl、〇2..几之複數個輸出端。每一列電 ^充當-列掃描線（或，，閘極線”）1係連接至各自列像素 之和描輸入端。 且其為標準的主動式矩 —像素在7處得以更詳細地說明， 9427l.d〇c -5- 1296791 陣液晶類型…像素包括（例如）多晶㈣膜電晶體形式之電 子開關8，其源極連接至第i行電極&，且其閘極連接至第】 列電極Gj。因此’該像素標記為ρ"·。開關8线極連接至形 成液晶像素影像產生元件9之一部分的像素電極11，且亦連 接至並聯儲存電容器1G。影像顯示元件9係由像素電極u、 與該像素f極相對設置之反電極13及設置於像素電極⑽ 反電極13之間的液晶層12形成。 提及列與行並無意欲限於水平列與垂直行，而是指逐列 輸入影像資料之標準的熟知方式。儘f在顯示器中，像素 列通常係水平地配置且像素行係垂直地配置，但此並非必 需，且列可(例如)同樣良好地垂直配置，於是行就水平地配 置。 在使用中，用於顯示之影像資料係由任何合適之源供應 至該配置之輸人端3,且係由像素主動式矩陣6依據驅動器4 與5之運作來顯示。為將資料寫入至特定像素中，將"啓用" 電Μ施加至連接至該像素之„元件之列掃描線，因°此， 為將資料寫人至像素Pij中，將，，啓用”電塵施加至列掃描線 Gj以接通開關元件8，藉此允許開關元件8之源極與汲極之 間導電。(向列掃描線Gj施加啓用電壓亦將接通所有其它連 接至列掃描線Gj之開關元件。）因此，像素電極及儲存電容 益電連接至行電極Si，且施加至行電極n㈣人至液晶 像素影像產生元件9之像素電極llf，且亦寫人至儲存電容 器10中。接著，自列掃描線Gj移除啓用電a，藉此斷開開 關元件。此使得像素與行電極&電切斷以使得隨後的行電 94271.doc -6- 1296791 極Si中之電壓變化不會影響儲存於像素匕中之電壓。 -般而言，圖1所示類型之顯示器係逐列更新。連續供應 像素影像資料以作為影像圖Μ，以_圖_步脈職Μ 一圖框更新循環的開始。將像素影像資料列逐一輸Ζ至顯 示源極驅動器4中’且向適合之列掃描線供應啓用訊號以1 許將影像資料健存於適合的像素列中。因&，藉由閑極驅 動器5通常-次一列地供應啓用訊號’自頂部列開始且在底 部列結束時圖框更新循環完成而得以—次_列地更新矩陣 6之像素列。1296791 IX. Description of the Invention: [Technical Field] The present invention relates to a substrate for, for example, an active matrix display device such as an active matrix liquid crystal display (AMLCD), in which each image The element has a switching element such as a polycrystalline silicon thin film transistor (TFT). In particular, the present invention relates to a substrate on which a test member is provided with a function of a component. It is also related to a display device including such a substrate. [Prior Art] FIG. 1 illustrates a typical initiative. a matrix liquid crystal display device. The device is formed on the display substrate shown at i' and includes a timing and control circuit 2 connected to the input terminal to receive timing and control signals and image data to be displayed. Circuit 2 will be appropriate The signal is supplied to a bedding signal generator in the form of a display source driver 4 and a scan signal generator in the form of a gate driver $. The display source driver 4 has a plurality of wheel terminals that are connected to act as螅所: Image: (pixel) active matrix row data line (or "source line") seized several 4T^Sl, s2...Sm. The row electrodes extend over a positive height of the active matrix 6 and are connected to each of the (four) poles. Similarly, the driver 5 has a plurality of outputs connected to the column electrodes G1, 〇2.. which extend over the matrix 6 = degrees. Each column acts as a - column scan line (or, gate line) 1 is connected to the sum input of the respective column of pixels. And it is a standard active moment - the pixel is explained in more detail at 7 9427l.d〇c -5 - 1296791 array liquid crystal type... the pixel comprises, for example, an electronic switch 8 in the form of a polycrystalline (tetra) film transistor, the source of which is connected to the ith row electrode & and the gate thereof is connected to the first] The column electrode Gj. Therefore, the pixel is labeled as ρ". The switch 8 line is connected to the pixel electrode 11 forming part of the liquid crystal pixel image generating element 9, and is also connected to the parallel storage capacitor 1G. The image display element 9 is composed of pixels. The electrode u, the counter electrode 13 disposed opposite to the pixel f pole, and the liquid crystal layer 12 disposed between the counter electrode 13 of the pixel electrode (10) are formed. Reference to columns and rows is not intended to be limited to horizontal columns and vertical rows, but refers to A well-known way of entering the standard of input image data. In the display, the pixel columns are usually arranged horizontally and the pixel rows are arranged vertically, but this is not necessary, and the columns can be arranged, for example, equally well, so that Water In use, the image data for display is supplied to the input terminal 3 of the configuration by any suitable source, and is displayed by the pixel active matrix 6 according to the operation of the drivers 4 and 5. Write to a specific pixel, and apply "Enable" to the column scan line connected to the pixel, because the data is written to the pixel Pij, and the "on" is enabled. It is applied to the column scan line Gj to turn on the switching element 8, thereby allowing conduction between the source and the drain of the switching element 8. (Applying an enable voltage to the column scan line Gj will also turn on all other connections to the column scan line Gj. The switching element is.) Therefore, the pixel electrode and the storage capacitor are electrically connected to the row electrode Si, and are applied to the row electrode n(4) to the pixel electrode 11f of the liquid crystal pixel image generating element 9, and are also written to the storage capacitor 10. The enable line a is removed from the column scan line Gj, thereby turning off the switching element. This causes the pixel and the row electrode &erage to be electrically cut so that the voltage in the subsequent row current 94271.doc -6 - 1296791 pole Si does not change. Will affect the storage in pixels匕Voltage - In general, the display of the type shown in Figure 1 is updated column by column. The pixel image data is continuously supplied as an image map, and the pixel image is updated at the beginning of the loop. The data columns are outputted one by one to the display source driver 4' and the enable signals are supplied to the appropriate column scan lines to enable the image data to be stored in the appropriate pixel column. Because &, by the idler driver 5 normally - The next row of supply enable signals 'starts from the top column and the frame update cycle is completed at the end of the bottom column, and the pixel columns of the matrix 6 are updated.
由上文可見，主動式矩陣顯示裝置之正常運作取決於開 元件正常起作用以視需要使—像素電極與該像素電極之 相關行電極絕緣或將兩者連接在—起。若開關元件未正常 起作用’則不可能以所要方式定址相關像素。_元件之 ，種最普遍的失效模式為：⑷成為永久性開路，使得不管 是否向相關列掃描線施加啓用電壓，像素電極都永久性地 與相關行電極絕緣；或（b)成為永久性短路，使得不管是否 向相關列掃描線施加啓用電壓，像素電極都永久性地連接 至相關行電極。在⑻情形下，不可能將新資料寫人至像素 中，而在（b)情形下，每次相關行資料線之電壓改變，儲存 於該像素上之資料亦會改變。 在主動式矩陣顯示裝置之製作過程中，可能會發生開關 元件之故卩早。需要在顯示裝置之製作的早期階段偵測故障 1關元件因為此允命採取矯正措施或甚至若存在太多故 障則將該顯示器廢棄。在前一情形下，可藉由修復否則故 9427I.doc 1296791 障之顯示器來節省此士 障顯示器之其它製作且在後一情形下，可藉由消除故 、、1作步騾來節省成本。 之習知顯""裝置之製作過財偵測故障開闕元件 =方法㈣i用外部測試設備來將固定電荷寫入至每一 像素中。此電荷儲存 + R像素錯存電容器中，且在-設定時 間#又後頃回。藉由蔣綠 3由將-回的電荷量與寫入的電荷量進行比 較’可查明主動式矩陣中 /JS 早中之母一像素開關的完好性。用於 偵測故障之外部設備價格 用於 ，貝且便用耗日守，且必須為每一 不同設計之顯示器會蕲鈿能 重新組悲。此類習知方法之一實例由 US-A-5 377 030給定。 見 J 由 WO 92/11560揭示一種主動式 飞陣竑置，其中測試電路安 衣於基板上。兩個測試電路遠桩 电路遷接至母一掃描線或資料線， 厂測試電路連接至-線端。在運作中，—測試電路向其所 連接之掃描線或資料線施加電壓，且位於該掃描線或資料 線之另-端上的測試電路量測所得電壓，藉此能夠確定法 經該線路之電流。流經料線路之電流提供了關於該線2 中是否具有短路或斷開之指示。 US-A-5 774 HK)揭示了一種主動式矩陣液晶顯示裝置， 其具有一由一行測試電晶體組成之”測試區"。在運作中， 驅動電路將訊號供應至掃描線或資料線，且該掃描/資料 上之所得輸出電壓位準及該電壓位準穩定所需之時間得、以 確定。 US-A-5 576 730係關於一種主動式矩陣基板，其具有 於測試該主動式矩陣基板之端子。然而，在該主動/式矩1 1296791 基板上未配備任何測試電路。”檢測訊號”係由外部源提 供，且結果係藉由與該主動式矩陣基板分離且位於其外部 之類比/數位轉換器及電腦讀取。 【發明内容】 本發明之第一態樣提供一種基板，其包括：一顯示像元 電極；一開關元件，該開關元件具有一連接至該像元電極 之第一端子、一連接至一資料線之第二端子、及一用於接 收一啓用訊號以選擇性地啓用該開關元件並藉此將該第一 端子連接至該第二端子之第三端子；及用於獲得關於該開 關元件之運作之資訊的測試構件；其中，該測試構件在使 用中為該開關元件之兩種假定不同之狀態獲得關於資料線 之電容之資訊。 由於測試構件係整合於基板上，所以不需要昂貴的外部 測試設備。開關元件之正常運作可在基板製作之早期階段 檢查，舉例而言，可在製作好開關元件後立即檢查。不必 在測試開關元件前將基板併入完整的裝置中。 基板可進-步包括控制構件，其控制用以獲得關於開關 元件之運作的資訊之測試構件。 控制構件可在第一時間段内禁止將啓用訊號施加至開關 元件之第二端子，藉此測試構件獲得t禁止施加啓用訊號 時關於資料線之電容值之第一資訊。 控制構件可在第二時間段内允許將啓用訊號施加至開關 70件之第—端子’藉此測試構件獲得當將啓用訊號施加至 開關元件之第二端子時關於資料線之電容值之第二資訊。 94271.doc -9- 1296791 ’則武構件可調適成用於確定資料線之電容與參考電容器 之電容之間的差值。 測甙構件可包括一感應放大器。 測試構件可包括分析構件，其用於自關於資料線之電容 資1^獲彳于關於開關元件之運作之資訊。 77析構件可調適成將關於資料線之電容值之第一資訊與 關於貝料線之電容值之第二資訊進行比較。 析構件可調適成將關於資料線之電容值之第一及/或 第—身訊與一預定臨限值進行比較。 基板可包括：按列及行排成陣列之複數個顯示像元電 1，複數個資料線，每一資料線均與各自行像元電極相關 如，及複數個開關元件，每一開關元件均具有一連接至一 各自像7L電極之第一端子、一連接至與該各自像元電極相 ,ρ之貝料線的第二端子、及—用於接收啓用訊號以選擇 =啓用開關it件並藉此將第—端子連接至第二端子之第 山A 控制構件，其可調適成在使用中控制用以獲得 關於母-開關it件之運作的資訊之測試構件。 本發明亦提供—人 . 及—分析m 、’’ 5 ’ /、包括：如上所界定之基板； ，其用於接收來自測試構件之輸出且用於自 該來自測試構件之輸出獲得關 輸出且用於自 訊。將來自測試構件之二：或母一開關元件之資 因此不必將分析構件整合於基板上。之刀析構件， 本發明之第二態樣提供—種顯 之第一態樣所界定之基板。 "，/、匕括如本發明 9427l.d〇c -10- 1296791 該顯示褒置可包括：如本發明之第一態樣所界定之基 板；與該基板相對設置之反向基板；及設置於該基板鱼： 反向基板之間的液晶材料。 本發明之第三態樣提供一種用於測試基板之開關元件的 方法，該開關元件具有一連接至像元電極之第一端子、一 連接至資料線之第二端子、及一用於接收啓用μ號以選擇 性地啓用開關元件並藉此將第一端子連接至第二端子之第 三端子；其中用於測試開關元件之該方法包括為開關元件 之兩種假定不同之狀態獲得關於資料線之電容之資訊。 本發明之測試方法之原則為：若開關元件正常運作，則 向開關元件施加啓用訊號應改變行電極（資料線）之電容。當 連接至行電極之所有開關元件均斷開時，對行電極的電容 之量測將僅量測該行電極之電容。然而，當與該行電極相 關聯之像素的開關元件為閉合時，對該行電極的電容之量 測將不僅量測該行電極之電容而且亦量測像素電容（即，儲 存電容器及像素電極之電容）。因此，對行電極的電容之量 測提供了 一種用於檢查（例如）主動式矩陣基板之開關元件 是否正常運作之快速且簡單的方法。 該方法可進一步包括獲得當未向開關元件之第二端子施 加啓用電壓時關於資料線之電容值的第一資訊。 該方法可進一步包括獲得當向開關元件之第二端子施加 啓用電壓時關於資料線之電容值的第二資訊。 該方法可進一步包括將關於資料線之電容值之第一資气 與關於資料線之電容值之第二資訊進行比較。 9427l.doc -11 - 1296791 該方法可進一步包括將關於貧料線之電容值之第一及/ 或第二資訊與預設臨限值進行比較。 若關於資料線之電容值之第一資訊與關於資料線之電容 值之第二資訊大體上類似，則該方法可包括將關於資料線 之電容值之第一及第二資訊與預定臨限值進行比較之另一 步驟。 該方法可進一步包括確定資料線之電容與參考電容器之 電容之間的差值，以作為關於資料線之電容值的資訊。 該方法可進一步包括產生具有同資料線之電容與參考電 容器之電容之間的差值成比例之量值的電壓。 本發明之第四態樣提供一種測試主動式矩陣基板之方 法，該主動式矩陣基板包括：按列與行排成陣列之複數個 顯示像元電極；複數個資料線，每一資料線均與各自行像 元電極相關聯；及複數個開關元件，每一開關元件均具有 一連接至一各自像素電極之第一端子、一連接至與該各自 像素電極相關聯之資料線的第二端子、及一用於接收啓用 訊號以選擇性地啓用開關元件並藉此將第一端子連接至第 一端子之第三端子；其中該方法包括如下步驟：獲得當未 向任何開關元件施加啓用訊號時關於每一資料線之各自带 谷之第一資訊；將啓用訊號施加至所選第一列中之每一門 關元件，而未將啓用訊號施加至其它列中之開關元件；^ 得當將啓用訊號施加至所選第—列中之開關元件時關於^ -資料線之各自電容的第二資訊；及自關於每一資料線之 各自電容的第-及第二資訊獲得關於所選第—列中之開關 9427l.doc -12- 1296791 元件之資訊。 該方法可進一步包括：將啓用訊號施加至所選第二列中 之每一開關元件，而未將啓用訊號施加至其它列中之開關 元件；獲得當將該啓用訊號施加至所選第二列中之開關元 件時關於每-資料線之各自電容的第三資訊；&自關於每 -資料線之各自t容的第—及第q訊獲得關於所選第二 列中之開關元件之資訊。 或者’該方法可進-步包括：獲得t未將啓用訊號施加 至任何開關元件時關於每一資料線之各自電容之第三資 訊；將啓用訊號施加至所選第二列中之每一開關元件，而 未將啓用訊號施加至其它列中之開關元件；獲得當將啓用 訊號施加至所選第二列中之開關元件時關於每一資料線之 各自電容之第四資訊；及自關於每一資料線之各自電容之 第三及第資訊^导關於所選第二歹巾之_元件的資 訊。 【實施方式】 下文將具體針對包括像元電極矩陣之主動式矩陣基板來 描述本發明，但原則上本發明並不限於此。 圖2為根據本發明一實施例之主動式矩陣基板μ之方塊 不思圖。主動式矩陣基板14包括源極驅動器4、閘極驅動器 5及形成於基板丨上之像元電極之主動式矩陣6。每一像元電 極均由一相關開關元件控制。當將基板併入一完整的顯示 裝置中時，每一像素電極都將對應於該裝置中之一像素（像 元）。 ’、 94271.doc -13- 1296791 圖2中之主動式矩陣基板14進一步包括用以測試主動式 矩陣6之開關元件是否正常運作之測試構件18。測試構件18 配備於基板1上，且可包括（例如）整合於基板丨上之多個電 路。 圖3(a)更詳細地展示圖2中之主動式矩陣基板14之組件。 主動式矩陣基板14之組件形成於由1所指示之基板上，且包 括定時及控制電路2，其連接至輸入端3用以接收定時及控 制訊號（且一旦將主動式矩陣基板14併入成品顯示裝置中 柃，亦用以接收待顯示之影像資料）。定時及控制電路2將 適當之訊號供應至以顯示源極驅動器4的形式存在之資料 訊號產生器及以閘極驅動器5的形式存在之掃描訊號產生 态。顯不源極驅動器4及掃描驅動器5可為任何適合之類 型，例如標準或習知類型，本文將不再進一步描述。顯示 源極驅動器4具有複數個輸出端，其可連接至充當6處所指 不之像元（像素）矩陣的行資料線之複數個行電極心、 S2_..Sm。定時及控制電路2控制是將顯示源極驅動器&之輸 出端電連接至資料線或是使兩者絕緣。例如，顯示源極驅 ^之輸出^只有在控制電路2啓用顯示源極驅動器4時才 、 資料線。資料線在主動式矩陣ό之整個高度上延伸， 且每-資料線均連接至各自行像素之資料輸入端。類似 地，閘極驅動器5具有連接至在矩陣6之整個寬度上延伸的 列電極G】、（^ ^ 、 2. _.〇η之複數個輸出端。每一列電極均夯♦一 列掃描線，且捸姑s^ 田一 且連接至各自列像素之掃描輸入端。 處传以更詳細地說明。由此處可見，圖3 (&)中 9427l.doc -14 - 1296791 之像素7大體上對應於圖1中之像素7，此處將不再重複描 述。然而’應注意：由於圖3(a)展示了主動式矩陣基板14 而不是完整的顯示裝置，所以圖1中之液晶層12及反電極π 並不存在，因此未在圖3(a)中展示。 在圖3(a)之實施例中，測試構件18係沿像素之矩陣6的底 部邊緣設置。測試構件丨8包括複數個感應放大器丨5，其輸 入端連接至各自的行電極。該等感應放大器係由來自定時 及控制包路2之控制訊號控制（例如，啓用）。感應放大器之 輸出供應至類比-數位轉換器區塊16，其將感應放大器15所 感應之類比值轉換成並行數位輸出。轉換器區塊16之輸出 端連接至讀出移位暫存器17，其將來自轉換器區塊“之並 仃輸出貧料轉換成串行輸出資料且將其供應給輸出線19。 測試構件18能夠獲得關於資料線&、之電容的資 訊。關於開關元件8是否正常運作之資訊可自所量測之資料 線之電各传到。在_特^較佳實施例中，關於開關元件之 運作之資訊可藉由兩次量測資料線之電容來獲得，其中當 進行兩次量測時，連接至該眘 唸貝抖線之開關兀件處於兩種假 定不同之狀態。 現將針對與資料線Si及列 測試方法之原則。 最初，定時及控制電路在 15，以使得感應放大器1 $可 一時間段内，定時及控制電 動器4電絕緣。定時及控制電 電極Gj相關聯之像素Pij描述該 第一時間段内啓用感應放大器 里測資料線Si之電容。在此第 路確保資料線Si與顯示源極驅 路2亦禁止閘極驅動器5將啓用 94271.doc -15 - 1296791 電s:把加至列掃為線Gj。實際上，^時及控制電路2禁止閑 極驅動器5將啓用電壓施加至任何列掃描線Gj。因此，於第 :時間段内對電容進行了量測，其中連接至第i行資料線之 每開關7L件8假定為斷開電路，即若開關元件正常運作則 /、為斷開電路’因此資料線&假定與儲存電容器W及第i像 素订中之每—像素的像素電極⑽緣。資料線&亦與顯示 源極驅動H4絕緣。因此，若連接至資料線之開關元件正常 運作，則在第—時間段内所量測之電容應為資料線Sl之本 質電容。 第守門奴内疋日守及控制電路指示閘極驅動器5將啓 用電魔施加至列掃描線心而未將該啓用電壓施加至任何 其它列掃描線1時及控制電路繼續使顯示源極驅動器4 保持與源極線S i絕緣，且亦繼綠你m ^ ^且亦繼縯啓用感應放大器15以量測 源極線Si之電容。由於頦徊令你主^ ^ 於現假疋像素pij之開關元件為閉合（即As can be seen from the above, the normal operation of the active matrix display device depends on the normal functioning of the open device to insulate the pixel electrode from the associated row electrode of the pixel electrode or to connect the two as needed. If the switching element does not function properly, then it is not possible to address the relevant pixel in the desired manner. The most common failure modes are: (4) becoming a permanent open circuit, such that the pixel electrode is permanently insulated from the associated row electrode regardless of whether an enable voltage is applied to the associated column scan line; or (b) becomes a permanent short circuit. The pixel electrodes are permanently connected to the associated row electrodes regardless of whether an enable voltage is applied to the associated column scan lines. In the case of (8), it is impossible to write new data to the pixel, and in the case of (b), the data stored on the pixel changes each time the voltage of the relevant data line changes. In the production process of the active matrix display device, the switching element may occur early. It is necessary to detect the fault at an early stage of the manufacture of the display device. The component is turned off because it allows the corrective action or even if there are too many faults. In the former case, other fabrications of the barrier display can be saved by repairing the display of the 9427I.doc 1296791 barrier and in the latter case, the cost can be saved by eliminating the steps and steps.知知显"" The device has been manufactured to detect faulty open components. Method (4) i uses an external test device to write a fixed charge to each pixel. This charge is stored in the + R pixel memory capacitor and is returned after the -set time #. By comparing the amount of charge of the back-back with the amount of written charge by Jiang Green 3, the integrity of the mother-pixel switch of /JS in the active matrix can be ascertained. The price of the external device used to detect the fault is used for the purpose of the day, and the display must be reconfigured for each different design. An example of such a conventional method is given by US-A-5 377 030. See J. WO 92/11560 discloses an active flying array device in which a test circuit is mounted on a substrate. The two test circuits are remotely connected to the parent scan line or data line, and the factory test circuit is connected to the - line end. In operation, the test circuit applies a voltage to a scan line or data line to which it is connected, and a test circuit located at the other end of the scan line or data line measures the resulting voltage, thereby enabling determination of the path through the line. Current. The current flowing through the material line provides an indication of whether there is a short or disconnect in the line 2. US-A-5 774 HK) discloses an active matrix liquid crystal display device having a "test zone" consisting of a row of test transistors. In operation, the driver circuit supplies signals to scan lines or data lines. And the obtained output voltage level on the scan/data and the time required for the voltage level to stabilize are determined. US-A-5 576 730 relates to an active matrix substrate having the active matrix tested. The terminal of the substrate. However, no test circuit is provided on the active/type moment 1 1296791 substrate. The "detection signal" is provided by an external source, and the result is analogous to the active matrix substrate and external to it. A first aspect of the present invention provides a substrate comprising: a display pixel electrode; a switching element having a first electrode connected to the pixel electrode a terminal, a second terminal connected to a data line, and a terminal for receiving an enable signal to selectively activate the switching element and thereby connect the first terminal to the second end a third terminal; and a test member for obtaining information about the operation of the switching element; wherein the test member obtains information about the capacitance of the data line for the two assumed different states of the switching element in use. Since the test components are integrated on the substrate, no expensive external test equipment is required. The normal operation of the switching elements can be checked at an early stage of substrate fabrication, for example, immediately after the switching elements are fabricated. The substrate is incorporated into the complete device before the component. The substrate can further include a control member that controls the test member for obtaining information about the operation of the switching element. The control member can inhibit the application of the enable signal for the first time period. And to the second terminal of the switching element, wherein the test component obtains the first information about the capacitance value of the data line when the enable signal is prohibited. The control component can allow the enable signal to be applied to the switch 70 in the second time period. - the terminal 'by means of the test component is obtained when the enable signal is applied to the second terminal of the switching element The second information on the capacitance value of the data line. 94271.doc -9- 1296791 'The component can be adjusted to determine the difference between the capacitance of the data line and the capacitance of the reference capacitor. The sensing component can include a sense amplifier The test component can include an analysis component for obtaining information about the operation of the switching component from the capacitance of the data line. The analysis component can be adapted to the first information about the capacitance value of the data line and about The second information of the capacitance value of the bead line is compared. The analyzing component is adapted to compare the first and/or the first body of the capacitance value of the data line with a predetermined threshold. The substrate may include: And a plurality of display pixel cells arranged in an array, a plurality of data lines, each data line being associated with a respective row of pixel electrodes, and a plurality of switching elements, each of the switching elements having a connection to a respective a first terminal such as a 7L electrode, a second terminal connected to the respective pixel electrode, a bead line of ρ, and - for receiving an enable signal to select = enable the switch member and thereby the first terminal even The first to the second terminal of Mountain A control member, which is adapted to be controlled to obtain information about the master in use - it switches into the operating member test piece of the information. The invention also provides - and - analysis m, '' 5 ' /, comprising: a substrate as defined above; for receiving an output from the test component and for obtaining an off output from the output from the test component and Used for self-information. The investment from the second component of the test component: or the parent-switching component does not necessarily integrate the analysis component onto the substrate. The knife-forming member, the second aspect of the invention provides a substrate as defined by the first aspect. ",/, including the present invention 9427l.d〇 -10- 1296791 The display device may include: a substrate as defined in the first aspect of the invention; a reverse substrate disposed opposite the substrate; Set on the substrate fish: liquid crystal material between the reverse substrates. A third aspect of the present invention provides a method for testing a switching element of a substrate, the switching element having a first terminal connected to the pixel electrode, a second terminal connected to the data line, and a receiving enable a μ number to selectively activate the switching element and thereby connect the first terminal to the third terminal of the second terminal; wherein the method for testing the switching element comprises obtaining a data line for two hypothetically different states of the switching element The information of the capacitor. The principle of the test method of the present invention is that if the switching element operates normally, applying an enable signal to the switching element should change the capacitance of the row electrode (data line). When all of the switching elements connected to the row electrodes are turned off, the measurement of the capacitance of the row electrodes will only measure the capacitance of the row electrodes. However, when the switching element of the pixel associated with the row electrode is closed, the measurement of the capacitance of the row electrode will not only measure the capacitance of the row electrode but also the pixel capacitance (ie, the storage capacitor and the pixel electrode) Capacitor). Therefore, the measurement of the capacitance of the row electrodes provides a quick and simple method for checking whether, for example, the switching elements of the active matrix substrate are functioning properly. The method can further include obtaining first information regarding a capacitance value of the data line when the enable voltage is not applied to the second terminal of the switching element. The method can further include obtaining second information regarding a capacitance value of the data line when an enable voltage is applied to the second terminal of the switching element. The method can further include comparing the first asset gas for the capacitance value of the data line with the second information for the capacitance value of the data line. 9427l.doc -11 - 1296791 The method can further include comparing the first and/or second information about the capacitance value of the lean line to a predetermined threshold. If the first information about the capacitance value of the data line is substantially similar to the second information about the capacitance value of the data line, the method may include first and second information about the capacitance value of the data line and a predetermined threshold Another step to compare. The method can further include determining a difference between a capacitance of the data line and a capacitance of the reference capacitor as information regarding a capacitance value of the data line. The method can further include generating a voltage having a magnitude proportional to a difference between a capacitance of the data line and a capacitance of the reference capacitor. A fourth aspect of the present invention provides a method for testing an active matrix substrate, the active matrix substrate comprising: a plurality of display pixel electrodes arranged in an array in columns and rows; a plurality of data lines, each data line being Each of the row cell electrodes is associated with each other; and a plurality of switching elements each having a first terminal connected to a respective pixel electrode, a second terminal connected to the data line associated with the respective pixel electrode, And a third terminal for receiving an enable signal to selectively activate the switching element and thereby connect the first terminal to the first terminal; wherein the method comprises the step of: obtaining when no enable signal is applied to any of the switching elements The first information of each data line is the first information; the enable signal is applied to each of the selected components in the selected first column, and the enable signal is not applied to the switching elements in the other columns; ^ the signal application is enabled Second information about the respective capacitances of the ^-data lines to the switching elements in the selected column - and - from the respective capacitances of the respective data lines Obtaining first information regarding the selected two - Information column of the switching element 9427l.doc -12- 1296791. The method may further include: applying an enable signal to each of the selected second columns without applying an enable signal to the switch elements in the other columns; obtaining when the enable signal is applied to the selected second column The third information about the respective capacitance of each data line in the switching element; & the information about the switching elements in the selected second column from the first and the second information about the respective t-content of each data line . Or 'the method can further include: obtaining a third information about the respective capacitances of each data line when the enable signal is not applied to any of the switching elements; applying the enable signal to each of the selected second columns a component without applying an enable signal to the switch elements in the other columns; obtaining a fourth information about the respective capacitances of each data line when the enable signal is applied to the switch elements in the selected second column; The third and the first information of the respective capacitances of a data line are information about the components of the selected second wipe. [Embodiment] Hereinafter, the present invention will be specifically described with respect to an active matrix substrate including a pixel electrode matrix, but the present invention is not limited thereto in principle. 2 is a block diagram of an active matrix substrate μ according to an embodiment of the invention. The active matrix substrate 14 includes a source driver 4, a gate driver 5, and an active matrix 6 of pixel electrodes formed on the substrate. Each pixel electrode is controlled by an associated switching element. When a substrate is incorporated into a complete display device, each pixel electrode will correspond to one of the pixels (pixels) in the device. The active matrix substrate 14 of FIG. 2 further includes a test member 18 for testing whether the switching elements of the active matrix 6 are functioning properly. The test member 18 is provided on the substrate 1 and may include, for example, a plurality of circuits integrated on the substrate stack. Figure 3 (a) shows the components of the active matrix substrate 14 of Figure 2 in more detail. The components of the active matrix substrate 14 are formed on a substrate indicated by 1, and include timing and control circuitry 2 coupled to the input terminal 3 for receiving timing and control signals (and once the active matrix substrate 14 is incorporated into the finished product) The display device is also used to receive image data to be displayed. The timing and control circuit 2 supplies the appropriate signal to the data signal generator in the form of the display source driver 4 and the scan signal generation state in the form of the gate driver 5. The display source driver 4 and the scan driver 5 can be of any suitable type, such as standard or conventional types, and will not be further described herein. The display source driver 4 has a plurality of output terminals which are connectable to a plurality of row electrode cores, S2_..Sm, which serve as line data lines of the pixel (pixel) matrix indicated at 6. The timing and control circuit 2 controls to electrically connect or disconnect the output terminals of the display source driver & For example, the output of the display source driver ^ is only the data line when the control circuit 2 enables the display of the source driver 4. The data lines extend over the entire height of the active matrix, and each data line is connected to the data input of the respective row of pixels. Similarly, the gate driver 5 has a plurality of output terminals connected to the column electrodes G], (^^, 2. _.〇η) extending over the entire width of the matrix 6. Each column electrode is 夯 ♦ a column of scan lines, And 捸 s 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田Corresponding to the pixel 7 in Fig. 1, the description will not be repeated here. However, it should be noted that since the active matrix substrate 14 is shown in Fig. 3(a) instead of the complete display device, the liquid crystal layer 12 in Fig. 1 And the counter electrode π does not exist and is therefore not shown in Figure 3(a). In the embodiment of Figure 3(a), the test member 18 is disposed along the bottom edge of the matrix of pixels 6. The test member 丨8 includes a plurality The sense amplifiers 丨5 have their inputs connected to their respective row electrodes. The sense amplifiers are controlled (eg, enabled) by control signals from the timing and control packet 2. The output of the sense amplifiers is supplied to an analog-to-digital converter. Block 16, which senses the sense amplifier 15 The ratio is converted to a parallel digital output. The output of converter block 16 is coupled to sense shift register 17, which converts the parallel output from the converter block into serial output data and supplies it. To the output line 19. The test component 18 is capable of obtaining information about the capacitance of the data line &, and information about whether the switching element 8 is operating normally can be transmitted from the measured data line. In the embodiment, the information about the operation of the switching element can be obtained by measuring the capacitance of the data line twice. When the measurement is performed twice, the switch element connected to the caution wire is in two assumptions. Different states. The principle of the test method for the data line Si and the column will now be used. Initially, the timing and control circuit is at 15, so that the sense amplifier 1 $ can be electrically insulated from the timing and control of the motor 4 for a period of time. The pixel Pij associated with the control electrode Gj describes the capacitance of the sense data line Si in the sense amplifier during the first time period. In this case, the circuit line Si and the display source circuit 2 are also prohibited from being gate driver 5 Enable 94271.doc -15 - 1296791 Electric s: Sweep the added column to line Gj. In fact, the control circuit 2 prohibits the idle driver 5 from applying the enable voltage to any column scan line Gj. Therefore, in the first: The capacitance is measured during the time period, wherein each switch 7L of the switch connected to the i-th data line is assumed to be a disconnected circuit, that is, if the switching element operates normally, / is a disconnected circuit 'so the data line & assume The data electrode & is also insulated from the display source driver H4. Therefore, if the switching element connected to the data line operates normally, then the first The capacitance measured during the time period should be the essential capacitance of the data line Sl. The first gatekeeper and the control circuit instructs the gate driver 5 to activate the application of the electric magic to the column scan line without applying the enable voltage to any other column scan line 1 and the control circuit continues to cause the display source driver 4 It is kept insulated from the source line S i , and is also greened by m ^ ^ and also relays the sense amplifier 15 to measure the capacitance of the source line Si. Because the commander of your main ^^ is now closed, the switching element of the pixel pij is closed (ie
右像素Pij之開關元件正堂Ah θ.ί ^ ^ η» A 乍則/、為閉合）使得源極線Si假 定連接至像素Pij，所以在繁-士 在弟一日守間奴内所量測之電容應為 像素Pij之電容與源極線\之本f電容之總和。像素電容之 主要部分為儲存電容。因此，若在（例如）製 後之，程：的某-點測試開關元件，則在第二時：段 内所里測之電谷應為儲存雷交】0 ώ 々减仔電今10與源極線Si之本質電容的 總和。 卜〜貝w Μ将田种弟一時 段内所獲得之電容與f二時間段⑽量敎電容進行比 來獲得。由於第二時間段内所量測之電容應包含儲存電 94271.doc -16- 1296791 資料線s,之本質電容，所以第二時間段内所量測之電容 應：於第—時間段内所量測之電容。因此，若比較結果顯 不弟二時間段内所量測之電容確實大於第一時間段内所量 測之電容，則此表明開關元件正常運作。然而，若比較結 果：示第一時間段内所量測之電容大約等於第二時間段内 所量測之電容，則此表示開關元件故障。此表明：開關元 久性斷開電路（因此’兩次量測均僅為資料線&之本 貝電谷之量測），或開關元件永久性閉合（因此，第一時間段 内之置測除了資料線Si之電容外還包括儲存電容㈣之總 體電容之量測）。該等兩種故障情形可藉由將於第一及第二 時間段内所量測之電容與—預設臨限值進行比較來彼此區 分。臨限值設定在大於資料線Si之預期電容但低於儲存電 ^器10之電容的水平。因此，若第—時間段内所量測之電 令大體上等於第二時間段内所量測之電容，且均低於預設 臨限值，則此表示兩次電容量測沒有一次包含儲存電容 器，因此開關元件永久性斷開。相反，若第一時間段内所 量測之電容大體上等於第二時間段内所量測之電容，且均 大於該臨限值，則此表示兩次電容量測均包含儲存電容 器’因此開關元件永久性閉合。 因此，以此方式量測電容提供了一種用於判定開關元件 疋否正常運作之直接技術。此外，其不僅提供 元件是否正常運作之資訊，且若發現開關元件故障，、： 提供了關於該故障的性質之資訊。 本發明之測試技術可在主動式矩陣基板製作過程中於該 94271.doc -17 - 1296791 基板上執行。該方法並不要求存在液晶層，因此可在將基 板併入完整顯示裝置前對其進行測試。本發明之測試方法. 可在主動式矩陣基板上製造完開關元件及儲存電容器後於. 該基板之製造過程巾之任何階段進行。Q此，可在製作豸 程之相對早期階段㈣故障’此允許對故_行校正，《 者右存在太多故障開關元件，則允許將基板廢棄。 本發明之測言式方法並不要求主動式矩陣基才反外部的重要 設備。所需之唯一外部設備為一構件（如圖3(a)中之私所 示），其用於接收來自移位暫存器17之輸出並轉換該來自#% 位暫存器之輸出以提供有用的輸出，例如"通過/失敗"指示 或任何故障開關元件之位置。（原則上’可將用於自移位暫 存17之輸出產生"通過/失敗"之指示或任何故障開關元件 之位置的構件整合於基板上，但此比利用外部構件效率 低，因為此將佔用基板面積。） 原則上，可將類比-數位轉換器區塊16及移位暫存器口併 入外部測試設備中，而不是將其整合至主動式矩陣基板14 上。此將減少測試設備在主動式矩陣基板上所佔用的空 間，但其確實具有一缺陷，即其需要與像素矩陣中之行數 一樣多的外部測試設備與面板之間的額外連接。 · 以上描述係關於感應放大器在第一及第二時間段内量測 〜 源極線之電容。儘管此在原則上可行，但在一較佳實施例 _ 中’感應放大器量測源極線之電容與整合於主動式矩陣基 板上之參考電谷器之電容之間的差值。於此實施例中，感 應放大器輸出同參考電容器之電容與源極線之電容之間的 94271.doc -18- 1296791 差值成比例的電壓訊號。類比-數位轉換器區塊產生與該電 壓訊號成比例的二進位字組。將參考電容器製作成具有與 源極線之本質電谷相專的電容。因此，在第一時間段中， 來自類比-數位轉換器區塊之輸出二進位字組（假定沒有任 何連接至源極線的開關元件永久性閉合）為零。 以上描述已提及對主動式矩陣基板之單一像素的開關元 件進行測试。當然，實際上需要測試主動式矩陣基板上之 所有開關元件，圖4說明了一種進行此測試之方法。 最初，在步驟20，量測每一資料線（源極線）之電容。對 每一資料線，在連接至該資料線之全部開關元件均處於標 稱上的斷開狀態下置測其電容。舉例而言，步驟可包括 疋4及控制電路2使每一資料線與顯示源極驅動器4絕緣、 禁止閘極驅動器將啓用電壓施加至任何列掃描線、並啓用 感應放大器15以夏測其各自資料線之電容。 在步驟20中，每一感應放大器將產生同相關資料線與參 考電容器之間的電容差值成比例之電壓訊號。在本發明之 基板的一較佳實施例中，將複數個參考電容器整合於基板 上，每一參考電容器對應於一感應放大器。在此情形下， 每一感應放大器在步驟20中產生同相關資料線與各自參考 電容器之間的電容差值成比例之第一電壓訊號。然而，原 則上，基板可具有單一參考電容器。於步驟2丨中，將每— 感應放大器所產生之第一電壓訊號儲存於22所指示之校正 資料檔案中。 原則上’該方法可包括依序量測每一資料線之電容， 9427l.doc -19- 1296791 一貧料線獲得之量測結果在量测下一义、一 儲存。然而，實際上，可^ 、’、、、、 “各刖進打 一 了月b而要在步驟20中同時量測每一 貧料線之電容，且於步驟21中 ^ 、 T u 了燔存母一 1測結果，因 二:：=所花費的時間。若連接至資料線之所有開關元 於/，則在步驟2G中獲得之資料線的電容值應等 :: 之本質電容，且可將其視為是每-資料線之校 正值0 在步驟23,將第—列掃描線設置為活動狀態 定時及控制電路2指示閉極驅動器向該第-列掃描線(例 二:列=線Gl)施加"啓用"電來完成。因此，"啓用"電 =口；連m列掃描線之每-開關元件的閘電極， 使仔第-列中之每一開關元件均接通（假定其正常運 它列掃描線在步驟23中仍保持非活動狀態，且定時及控制 電路禁止閘極驅動器5將”啓用”電壓施加至其它列掃描線。 在/驟24，感應放大器15再次量測每一資料線之 步驟2曰4為每一資料線提供第二次電容量測。步驟24可包括 依序量測每-資料線之電容，或其可包括同時量 料線之電容。 胃 扣，驟25自板正資料檔案22擷取每一資料線之第一電 η 1母資料線，將在步驟24中所量測之電容減去在 步驟21中所量測且自校正資料檔案擷取之電容。在步驟 26，將每一減法運算結果儲存於像素狀態映射檔案27^' 相對於各自列掃描線（於此實例中為仏）且相對於各自 線儲存每一減法運算結果。 、 94271.doc -20- 1296791 如上文所解釋，若開關元件正常起作用，則步驟25中之 減法運算結果應為正值，因為在步驟24中所量測之電容應 包含儲存電容，而在步驟20中所量測之電容則不應包含儲 存電容H於步驟26巾所獲得之結果提供了關於開關 兀件（第一列中）是正常運作（獲得正值）或開關元件未正常 運作（將獲得接近於零的值）之直接指示。 於步驟28，判定是否已為所有列掃描線進行了測試程 序。若步驟28得到"否，•判定，則將目前處於活動狀態之列 掃描線設置為非活動狀態，並於步驟29中將下一列掃描線 設置為活動狀態。例如，若閘極線Gi為目前活動之列掃描 線，則步驟29將包括定時及控制電路2指示閘極驅動器5自 列掃描線01移除"啓用，，電壓並將”啓用”電壓施加至列掃描 線G2。而後’對下一列掃描線重複步驟24、25及26。若於 步驟28中仍獲得"否”判定，則重複步驟29、24、25及26直 至於步驟28中獲得”是”判定。 對於主動式矩陣基板14之每一像素而言，由圖4中之方法 所產生的像素狀態檔案映射27含有關於開關元件是正常運 作還是故障之指示。若想要獲得更多關於故障像素之資 訊’則此可藉由（例如）擷取在步驟2〇中所量測之相關資料線 之電容並將其與上文所解釋之臨限值進行比較來完成。（應 注意’電容與臨限值之比較只有在基板具有少量故障開關 元件時才有效。例如，若一資料線具有多於一個永久性閉 合之開關元件或具有至少一個永久性閉合之開關元件及至 少一個永久性斷開之開關元件，則與臨限值之比較可能無 94271.doc -21 - 1296791 效。然而，當基板具有大量故障開關元件時，修復開關元 件通常不具成本效益，且在此情形下完全可將其廢棄。） 在圖4之方法中，每在測試程序中執行步驟25一次，就會 使用在步驟20中所量測之每一資料線的電容。測試實際的 主動式矩陣基板通常花費約1〇 ms，且測試過程之精確度可 能受到（例如）測試過程中之溫度變化或供應電壓之變動的 影響。因此，本發明之圖5展示了測試主動式矩陣基板之第 二種方法，其中此缺陷得以克服。 在圖5中，於步驟30將計數器初始化為^^二丨。如下文將描 述，此計數器代表列掃描線之索引。 於步驟31，在每一列掃描線均為非活動狀態下量測每一 貧料線（源極線）之電容。在步驟32，將結果儲存於校正資料 檔案33中。圖5中之步驟31及32對應於圖4中之步驟“及 21，此處不再進一步描述。 於步驟34,將第N列掃描線設置為活動狀態。由於n目前 為1，所以步驟34包括定時及控制電路2指#閘極驅動器$ 將”啓用，，電壓施加至列掃描線Gl，而未將"啓用"電壓施加至 其它列掃描線。 驟3 5中所量測之值減去該電容值 儲存於像素狀態映射檔案3 8中。 對應於圖4中之步驟24、25及26， 於步驟35，再次量測每一行資料線之電容。於步驟％， 對每一資料線，擷取在步驟31中所量測之電容值，且將步 ’並於步驟37中，將結果 圖5中之步驟35、36及37 此處不再進一步描述。 於步驟39 判定是否 已為每列掃描線進行了測試過 94271.doc -22- 1296791 程。若獲得，’否f’判定，則於步驟40中將目前活動之列掃描 線設置為非活動狀態。於此實例中，步驟4〇將包括定時及 控制電路指示閘極驅動器5中止將”啓用”電壓施加至列掃 描線Gi。 於步驟41，計數器N增加1。於此情形下，計數器之新值 將為N= 2。 接者’為列知描線G2重複步驟3 1 - 3 7。而後，重複以下步 驟直至於步驟39獲得"是，，判定：增加計數器n並為每一^^值 重複步驟31-37。 在圖5之實施例中，在將每一列掃描線設置為活動狀態之 前重複步驟3 1。因此，步驟36中所使用之"校正資料"係就 在進行步驟35之前所獲得之資料。此使得由諸如溫度或供 應電壓之量變化而產生之誤差最小。 若判定故障開關元件之數目足夠小，或若對發現故障之 開關元件進行修復或替換，則本發明之主動式矩陣基板可 併入液晶顯示裝置中。圖3(b)為含有圖3(a)之主動式矩陣基 板14的液晶顯示裝置之示意性橫截面圖，由圖可見，除了 使用本發明之主動式矩陣基板外，該液晶顯示裝置之結構 完全為習知。反向基板42與主動式矩陣基板14相對設置。 衆所熟知，一或多個反電極13配備於反向基板上（在圖3(b) 中僅展示一反電極13)。液晶層12設置於反向基板與主動式 矩陣基板之間，且其藉由密封構件43密封。反向基板、密 封構件及液晶層可為任何合適之類型，例如標準或習知類 型，此處不再描述。基板係配置成使得主動式矩陣基板之 94271.doc -23- 1296791 像素電極1 1及反向基板之反電極均與液晶層相鄰。（實際 上，層（未在圖3(b)中展示），用於對準液晶層之此等對準 層，可配備於主動式矩陣基板之像素電極U及反向基板之 反電極上。） 上文針對包含配置成列與行之矩陣之像元電極的主動式 矩陣基板描述了本發明。然而，本發明並不限於此。 【圖式簡單說明】 圖1為典型的主動式矩陣顯示器之示意圖； 圖2為根據本發明之一實施例之主動式矩陣基板之方塊 不意圖； 圖3(a)為圖2中之主動式矩陣基板圖； 圖3(b)為含有圖3(a)之主動式矩陣基板之液晶顯示裝置 之示意圖； »4為說明本發明之第一方法之方塊流程圖；及 圖5為說明本發明之第二方法之方塊流程圖。 諸圖中相同的參考數字代表相同的組件。 【主要元件符號說明】 基板 2 3 4 5 6 7 定時及控制電路 輸入端 顯示源極驅動器 閘極驅動器 主動式矩陣 像素 94271.doc -24- 1296791 8 開關元件 9 液晶像素影像產生元件/影像顯示元件 10 儲存電容器 11 像素電極 12 液晶層 13 反電極 14 主動式矩陣基板 15 感應放大器 16 類比-數位轉換器區塊 17 移位暫存器 18 測試構件 19 輸出線 42 反向基板 43 密封構件 44 構件 Gl5 G2, Gn，Gj 列掃描線 Pij 像素 Si，S2，Sm，Si 資料線The switching element of the right pixel Pij is in the state of Ah θ. ί ^ ^ η» A 乍 /, is closed) so that the source line Si is assumed to be connected to the pixel Pij, so it is measured in the day-to-day slave The capacitance should be the sum of the capacitance of the pixel Pij and the source f of the source line. The main part of the pixel capacitor is the storage capacitor. Therefore, if, for example, after the system, the test element of the test point of the process: is in the second time: the electric valley measured in the segment should be the stored thunder] 0 ώ 々 仔 电 10 10 The sum of the essential capacitances of the source line Si. Bu ~ Bei w Μ Μ 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田 田Since the capacitance measured during the second period of time should contain the essential capacitance of the stored data 94271.doc -16 - 1296791 data line s, the capacitance measured during the second period should be: within the first time period Measuring capacitance. Therefore, if the comparison results show that the measured capacitance during the second period is indeed greater than the measured capacitance during the first period, this indicates that the switching element is operating normally. However, if the result of the comparison is that the capacitance measured during the first time period is approximately equal to the capacitance measured during the second time period, this indicates that the switching element is faulty. This means that the switching element is permanently disconnected (so the 'two measurements are only measured by the data line & the local electric valley'), or the switching element is permanently closed (hence, the first time period of the test) In addition to the capacitance of the data line Si, it also includes the measurement of the total capacitance of the storage capacitor (4). The two fault conditions can be distinguished from each other by comparing the capacitances measured during the first and second time periods with the preset threshold. The threshold is set at a level greater than the expected capacitance of the data line Si but lower than the capacitance of the storage device 10. Therefore, if the electrical order measured during the first time period is substantially equal to the measured capacitance during the second time period, and both are lower than the preset threshold, this means that the two capacitance measurements do not include storage once. Capacitor, so the switching element is permanently disconnected. Conversely, if the capacitance measured during the first time period is substantially equal to the capacitance measured during the second time period and both are greater than the threshold value, this means that both capacitance measurements include the storage capacitor 'so the switch The component is permanently closed. Therefore, measuring the capacitance in this manner provides a direct technique for determining whether the switching element is operating normally. In addition, it not only provides information on whether the component is functioning properly, but if it finds that the switching component is faulty, it provides information about the nature of the fault. The testing technique of the present invention can be performed on the substrate of the 94271.doc -17 - 1296791 during the fabrication of the active matrix substrate. This method does not require the presence of a liquid crystal layer, so it can be tested before it is incorporated into a complete display device. The test method of the present invention can be carried out at any stage of the manufacturing process of the substrate after the switching element and the storage capacitor are fabricated on the active matrix substrate. Q, this can be corrected in the relatively early stage of the fabrication process (4) Faults. This allows for correction of the row, and there are too many faulty switching components on the right to allow the substrate to be discarded. The test method of the present invention does not require an active matrix base to be an important external device. The only external device required is a component (shown privately in Figure 3(a)) that receives the output from the shift register 17 and converts the output from the #% bit register to provide Useful output, such as "pass/fail" indication or the location of any faulty switching elements. (In principle, the component for generating the "pass/fail" or the position of any faulty switching element for the output of the self-shifting temporary storage 17 can be integrated on the substrate, but this is inefficient compared to the use of external components because This will occupy the substrate area.) In principle, the analog-to-digital converter block 16 and the shift register port can be incorporated into the external test device instead of being integrated onto the active matrix substrate 14. This will reduce the space occupied by the test equipment on the active matrix substrate, but it does have the drawback that it requires as many additional connections between the external test equipment and the panel as the number of rows in the pixel matrix. · The above description is about measuring the capacitance of the sense line in the first and second time periods. Although this is in principle possible, in a preferred embodiment, the sense amplifier measures the difference between the capacitance of the source line and the capacitance of the reference cell integrated into the active matrix substrate. In this embodiment, the sense amplifier outputs a voltage signal proportional to the difference between the capacitance of the reference capacitor and the capacitance of the source line, 94271.doc -18 - 1296791. The analog-to-digital converter block produces a binary block that is proportional to the voltage signal. The reference capacitor is fabricated to have a capacitance specific to the essential valley of the source line. Therefore, in the first period of time, the output binary block from the analog-to-digital converter block (assuming that no switching elements connected to the source line are permanently closed) is zero. The above description has referred to testing of a single pixel switching element of an active matrix substrate. Of course, it is actually necessary to test all of the switching elements on the active matrix substrate. Figure 4 illustrates one method of performing this test. Initially, in step 20, the capacitance of each data line (source line) is measured. For each data line, its capacitance is measured in the off state in which all of the switching elements connected to the data line are nominally off. For example, the steps may include 疋4 and control circuit 2 insulate each data line from display source driver 4, disable the gate driver from applying an enable voltage to any column scan lines, and enable sense amplifier 15 to measure its respective The capacitance of the data line. In step 20, each sense amplifier will generate a voltage signal proportional to the difference in capacitance between the associated data line and the reference capacitor. In a preferred embodiment of the substrate of the present invention, a plurality of reference capacitors are integrated on the substrate, each reference capacitor corresponding to a sense amplifier. In this case, each sense amplifier produces a first voltage signal in step 20 that is proportional to the difference in capacitance between the associated data line and the respective reference capacitor. However, in principle, the substrate can have a single reference capacitor. In step 2, the first voltage signal generated by each of the sense amplifiers is stored in the corrected data file indicated by 22. In principle, the method may include sequentially measuring the capacitance of each data line, and the measurement result obtained by the 9427l.doc -19- 1296791 a lean line is measured and stored. However, in fact, ^, ',,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, If the switch is connected to the data line, the capacitance value of the data line obtained in step 2G should be equal to: the essential capacitance, and It can be regarded as the correction value of each data line. In step 23, the first column scan line is set to the active state timing and the control circuit 2 instructs the closed circuit driver to the first column scan line (example 2: column = Line Gl) applies "Enable" to complete. Therefore, "Enable"Electric=port; even the gate electrode of each of the m-scan scan lines, so that each of the switching elements in the first column Turning on (assuming that its normal scan line remains inactive in step 23, and the timing and control circuitry disables the gate driver 5 from applying an "enable" voltage to the other column scan lines. / / 24, sense amplifier 15 Steps to measure each data line again 2曰4 Provide a second capacitance measurement for each data line Step 24 may include sequentially measuring the capacitance of each data line, or it may include the capacitance of the same material line. Stomach buckle, step 25 from the board data file 22, taking the first electric η 1 mother of each data line For the data line, the capacitance measured in step 24 is subtracted from the capacitance measured in step 21 and extracted from the self-correcting data file. In step 26, each subtraction result is stored in the pixel state mapping file 27^ 'relative to the respective column scan lines (仏 in this example) and store each subtraction result relative to the respective line., 94271.doc -20- 1296791 As explained above, if the switching element is functioning normally, step 25 The result of the subtraction operation should be a positive value, because the capacitance measured in step 24 should contain the storage capacitor, and the capacitance measured in step 20 should not include the result obtained by the storage capacitor H in step 26. Provides a direct indication that the switch element (in the first column) is functioning normally (gaining a positive value) or that the switching element is not functioning properly (a value close to zero will be obtained). In step 28, it is determined whether all columns have been scanned. Line Test procedure. If step 28 gets "No,•determination, the current active column scan line is set to inactive, and the next column scan line is set to active state in step 29. For example, if the gate Line Gi is the currently active scan line, then step 29 will include timing and control circuit 2 indicating that gate driver 5 is removed from column scan line 01 " enable, voltage and "enable" voltage is applied to column scan line G2 Then, steps 24, 25, and 26 are repeated for the next column of scan lines. If the "NO" is still obtained in step 28, steps 29, 24, 25, and 26 are repeated until a "YES" decision is obtained in step 28. For each pixel of the active matrix substrate 14, the pixel state file map 27 produced by the method of Figure 4 contains an indication of whether the switching element is operating normally or not. If you want to get more information about the faulty pixel', you can do this by, for example, taking the capacitance of the relevant data line measured in step 2〇 and comparing it to the threshold explained above. To be done. (It should be noted that the comparison of capacitance and threshold is only effective when the substrate has a small number of faulty switching elements. For example, if a data line has more than one permanently closed switching element or has at least one permanently closed switching element and At least one permanently disconnected switching element may have no effect with the threshold value of 94271.doc -21 - 1296791. However, when the substrate has a large number of faulty switching elements, repairing the switching element is generally not cost effective and is here It can be completely discarded in the case.) In the method of Figure 4, each time the step 25 is performed in the test procedure, the capacitance of each data line measured in step 20 is used. Testing an actual active matrix substrate typically takes about 1 〇 ms, and the accuracy of the test process can be affected, for example, by temperature changes during the test or variations in supply voltage. Thus, Figure 5 of the present invention shows a second method of testing an active matrix substrate in which this defect is overcome. In Figure 5, the counter is initialized to ^^二丨 in step 30. As will be described below, this counter represents the index of the column scan line. In step 31, the capacitance of each of the lean lines (source lines) is measured while each column of scan lines is inactive. At step 32, the results are stored in the calibration data file 33. Steps 31 and 32 in FIG. 5 correspond to steps "and 21 in FIG. 4, which are not further described herein. In step 34, the Nth column scan line is set to the active state. Since n is currently 1, step 34 Including the timing and control circuit 2 means that the #gate driver $ will be enabled, the voltage is applied to the column scan line G1, and the "enable" voltage is not applied to the other column scan lines. The value measured in step 3 5 minus the value of the capacitor is stored in the pixel state map file 38. Corresponding to steps 24, 25 and 26 in Fig. 4, in step 35, the capacitance of each row of data lines is measured again. In step %, for each data line, the capacitance value measured in step 31 is taken, and step 'and step 37 is performed, and the results in steps 35, 36 and 37 in FIG. 5 are no further here. description. In step 39, it is determined whether each column of scan lines has been tested 94271.doc -22- 1296791. If the decision is made, 'no f', the currently active column scan line is set to the inactive state in step 40. In this example, step 4A will include a timing and control circuit instructing the gate driver 5 to suspend the application of the "enabled" voltage to the column scan line Gi. At step 41, the counter N is incremented by one. In this case, the new value of the counter will be N=2. The receiver' repeats steps 3 1 - 3 7 for the line M2. Then, the following steps are repeated until "Yes" is obtained in step 39, and it is determined that the counter n is incremented and steps 31-37 are repeated for each value. In the embodiment of Figure 5, step 31 is repeated before each column of scan lines is set to the active state. Therefore, the "correction data" used in step 36 is the data obtained prior to performing step 35. This minimizes errors caused by changes in the amount of temperature or supply voltage. The active matrix substrate of the present invention can be incorporated into a liquid crystal display device if it is determined that the number of fail-switching elements is sufficiently small, or if the switching element found to be faulty is repaired or replaced. 3(b) is a schematic cross-sectional view of a liquid crystal display device including the active matrix substrate 14 of FIG. 3(a), and it can be seen that the structure of the liquid crystal display device is used except for using the active matrix substrate of the present invention. It is completely customary. The reverse substrate 42 is disposed opposite to the active matrix substrate 14. As is well known, one or more counter electrodes 13 are provided on the counter substrate (only one counter electrode 13 is shown in Fig. 3(b)). The liquid crystal layer 12 is disposed between the counter substrate and the active matrix substrate, and is sealed by the sealing member 43. The counter substrate, sealing member and liquid crystal layer can be of any suitable type, such as standard or conventional types, and will not be described here. The substrate is configured such that the pixel electrode 11 of the active matrix substrate and the counter electrode of the reverse substrate are both adjacent to the liquid crystal layer. (Actually, the layers (not shown in Figure 3(b)), which are used to align the alignment layers of the liquid crystal layer, may be provided on the pixel electrode U of the active matrix substrate and the counter electrode of the reverse substrate. The invention has been described above with respect to an active matrix substrate comprising pixel electrodes arranged in a matrix of columns and rows. However, the invention is not limited thereto. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a typical active matrix display; FIG. 2 is a block diagram of an active matrix substrate according to an embodiment of the present invention; FIG. 3(a) is an active FIG. 3(b) is a schematic diagram of a liquid crystal display device including the active matrix substrate of FIG. 3(a); FIG. 4 is a block flow diagram illustrating the first method of the present invention; and FIG. 5 is a view of the present invention A block flow diagram of the second method. The same reference numbers in the figures represent the same components. [Main component symbol description] Substrate 2 3 4 5 6 7 Timing and control circuit input terminal display source driver gate driver active matrix pixel 94271.doc -24- 1296791 8 Switching element 9 Liquid crystal pixel image generating component / image display component 10 storage capacitor 11 pixel electrode 12 liquid crystal layer 13 counter electrode 14 active matrix substrate 15 sense amplifier 16 analog-digital converter block 17 shift register 18 test member 19 output line 42 reverse substrate 43 sealing member 44 member Gl5 G2, Gn, Gj column scan line Pij pixel Si, S2, Sm, Si data line
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