TWI290733B - The mask layout and exposing method for reducing diffraction effects by using a single mask in the process of semiconductor production - Google Patents

Abstract

The invention discloses appropriate layout design of a single mask and proper operation of exposing device in the process of semiconductor production for reducing diffraction effects caused by tiny pattern in exposing process, which effectively enhances the resolution in exposing process, and therefore increases the yield.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask layout and exposure apparatus in a semiconductor process, and more particularly to a symmetric layout using a single mask pattern and an exposure method thereof. 5 - 2 Background of the Invention % In recent years, due to the development of the wireless communication industry, the electromagnetic wave frequency band used has also increased to the microwave frequency band (300 MHz to 300 GHz). At the same time, under the trend of product miniaturization, microwave components such as micro filter (fi 11 er), surface acoustic wave device (SAW) and spiral inductors on some active components (sp i ra 1 i) are prepared. Nductor) and other 'integrated demand increases. This trend, driven by the rapid development of semiconductor process technology, has enabled microwave components to quickly reach mass production and low-cost commercialization needs. However, as microwave components are increasingly moving to higher frequency bands, the cost of product integration and product equipment has made the microwave components work in the lithography process of the manufacturing process. One of the most difficult problems to overcome is some of the diffraction effects that occur during the exposure process. If the diffraction effect is generated in the process, due to the exposure machine (exP〇ser

Page 4 1290733 V. Description of the invention (2) The energy source emitted by the singer Wang Jing & ^ ^ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ ώ 光源 光源 光源The + ^ 瘵 method converges within the specification, which in turn causes the energy of the light source to spread, and finally results in insufficient spectroscopy. Therefore, when the micrograph is exposed to the η system, the photoresist on the wafer will be incompletely exposed, and at the same time, due to the diffusion of the light source energy, the photoreceptor is not required to be exposed. The photoresist layer also produces chemical changes, which result in 'easy to produce organic residues (orgaruc residue) or unable to form a complete overhanging overhang shape after the development process is completed. Or the T-shaped top (T~T〇p), thus affecting the subsequent evaporation of the metal film (the process, causing the metal film layer to fall due to organic residues: focus on the metal Film peeling or peeling is incomplete and the metal film remains. These phenomena can cause short-circuit or poor contact of the components, resulting in defective products. The most simple surface acoustic wave component in a process (Surf The ace Acoustic Wave Device; SAW) is an example. The surface acoustic wave element (SAW) is an elastic wave propagating along a solid surface, which is composed of longitudinal waves and longitudinal waves. The shear wave is combined to form an expanded circular trajectory whose amplitude is the largest on the solid surface and decays exponent ia 1 , so that 90% of the mechanical energy transmitted is concentrated at about one wavelength. Depth. The basic working principle is to use the input finger electrode (Interdigital Transducer; IDT) via the inverse

Page 5 1290733 V. Description of invention (3)

The voltage effect converts the input electrical signal into an acoustic signal. The acoustic signal is transmitted along the surface of the piezoelectric substrate. Finally, the output finger electrode (IDT) passes the positive piezoelectric effect, and the sound wave is 5 Converted into an electrical signal output, the surface acoustic wave element (SAW) is processed on the piezoelectric substrate using the characteristics of the acoustic-electric energy conversion principle. The characteristic response of the surface acoustic wave element (SAW) basically corresponds to the geometry of the finger electrode (IDT), and its center frequency depends on the width of the periodic finger electrode (IDT) pitch, and its phase (phase) corresponds to the position of the finger electrode (ΐ)) τ), and the amplitude (am ρ itude) corresponds to the length of the finger-shaped overlap in the finger electrode (IJ) τ ). The focus is then placed on the discussion of the spacing of adjacent finger electrodes (丨 DT). The center frequency of the surface acoustic wave element (SAW) described above depends on the pitch of the finger electrodes (IDT), and can generally be determined by the following equation

V Λ 氺 in the number of the material of the material base voltage; in order to rate its frequency, the heart rate of the mid-speed wave sound surface table is V ο f

Page 6 !29〇733 ----_____ V. Description of the invention (4) λ is the wavelength of the surface acoustic wave. ^ When a surface acoustic wave device is used as the filter, if the center frequency is sag 2. 5 GHz, and if the piezoelectric substrate of the surface acoustic wave filter is Lithium Tantalate, the wave velocity is about 40 0 0 m / s (m / s), so according to the above formula, the wavelength (λ) of the surface acoustic wave filter can be found to be 1.6 μm (um); and the adjacent finger electrode U on the surface acoustic wave filter The distance (d) between DT) is generally designed to be a quarter wavelength (λ / 4 ), so that the spacing between adjacent finger electrodes can be further determined to be 〇·4 μm.

If a higher center frequency is to be designed, for example, when the center frequency is 5 GHz, the spacing between adjacent finger electrodes of the surface acoustic wave filter will be reduced to 〇 2 μm under the condition that the above conditions are unchanged. Um). In the actual process, if the I-Line exposure machine is used for exposure, the I-Line exposure machine typically has an optimum value of 〇4 to 7.7 μm (um) in the exposure line width resolution. Therefore, if I- When the L ine exposure machine is used to fabricate a surface acoustic wave filter with a center frequency of 2.5 GHz, it will produce a diffraction effect during exposure, which reduces the yield of the product (yie 1 d). In order to solve this practical problem, a method of "Method of Making Surface Wave DeVices" has been disclosed in the U.S. Patent No. 5,9,7,5,6,6, which is characterized in that surface acoustic waves are used. The finger electrode (IDT) is divided into two parts and fabricated on the same mask or reticle, and the manufacturing method is divided into three.

1290733

V. Inventive Note (5) For the species, please refer to the 1st to the 1st 0th diagram. Generally speaking, in the operation mode of the phot obay, a wafer is divided into a plurality of holes. The exposure machine can perform exposure along the X-axis or the Y-axis while performing exposure, and performs exposure once in projection after each movement of one hole. Therefore, in the manufacturing method of the first drawing, when the exposure is performed, the second portion (reticle part 2) on the mask is first covered, and then the first portion on the mask is used.

The private electrode pattern is exposed by one hole position (sh〇t) followed by one hole position (sh〇t). After the exposure of all the shots is completed, the exposure opportunity f is to the starting position, and then the mask on the mask is replaced with the first portion, and then the exposure machine is in the second portion of the finger electrode pattern, again One hole position (shoi^ followed by one hole position (sh〇t) is exposed, and finally the pattern of the surface acoustic wave finger electrode is completed, and then the process is performed. The pattern on the cover is indicated by The electrode is symmetrically divided into two parts, so the distance between the finger electrode patterns on the first part and the second part of t is 0.8 μm (um). Since the distance between the patterns is increased,

The low-wound effect...when it pays twice the exposure time. ^ Bu: Although the patent emphasizes that this method can have accurate alignment (al丄gnment) without overlapping (〇=光: in the real process, it is in the first part of the exposure, part of the exposure Therefore, at the fixed point! ^Return to the starting position to prepare" The two parts of the exposure process are connected; ^The error of the displacement; plus ^ κ to execute, the process is not in the middle

1290733 V. Description of the invention (6) The development process, so there is no alignment key on the wafer for the alignment of the exposure machine, so in the manufacturing process of the first figure, When the patterns of the first part and the second part are exposed, the relative overlap (〇verlay) position is completely uncontrollable during the exposure process. Perhaps this is the reason. The patent proposes another method for controlling the relative overlap of the two portions of the pattern. Please refer to Figure 丨b. The biggest difference between the lb diagram and the ia diagram is that the development process is performed after the exposure of the first P-spray on the reticle is completed. Therefore, an alignment mark (aHgnment key) is generated on the day-to-day film. After the exposure operation of the first part of the pattern is returned to the starting position, the alignment correction is performed according to the alignment mark, and then the exposure of the second partial pattern is performed. Therefore, Figure 1b has a more accurate exposure result than the 丨&, but the process time is more than the first picture, and the actual time of one development and one exposure/exit is also increased. It is equivalent to adding a process item. In addition, the law is also proposed in the 5 Xuan patent, please refer to Figure 1 c. After the exposure of the first partial pattern to the vapor deposition of the metal film, the 曰 1 ^ 图案 pattern is exposed. Due to the process of developing in the first part, the subsequent process can be continued on the wafer after the difference between the first manufacturing method and the first drawing and the first drawing, and the subsequent process is continued until the film is returned to the exposure machine. In the process of exposure of the two-part pattern, the alignment mark has been left (al ignment)

1290733 V. Inventive Note (7) key), so before the wafer re-exposure machine performs the exposure operation of the second partial pattern, the alignment correction is performed first, and then the subsequent process is performed. Although the results of Figure 1c can also result in more accurate alignment and overlap results, they are paid for a mask process, that is, at least eight process items are added. Obviously, in the manufacturing method disclosed in the above patent for reducing the diffraction effect, although the result of reducing the diffraction effect can be achieved, the method of pattern & alignment and the time of the process are greatly improved. space. 5 - 3 OBJECT AND SUMMARY OF THE INVENTION _ In view of the above-mentioned background of the invention, regarding the shortcomings of the diffraction effect caused by the fine pattern in the exposure process, the present invention proposes a reticle using a single reticle to reduce the diffraction effect in the semiconductor process The main purpose of the layout and its exposure method is to increase the resolution in the exposure process without increasing the number of masks and the processing time, thereby improving the yield of the product. The invention is in the semiconductor manufacturing process, by appropriate design of the reticle layout and appropriate operation arrangement of the exposure apparatus, so that the diffraction effect caused by the fine pattern can be reduced during the exposure process, and the feature is that a mask is The fine pattern on 0 is divided into two patterns by a symmetrical design and the two patterns are respectively located in two sections of the same mask aliquot, and then walked through each exposure by controlling the exposure machine. Distance makes one

Page 10 1290733 V. Description of the invention (8) The fine pattern can be achieved by stacking exposure using two wider patterns during the exposure process of the same mask, the advantage of which is that the number of masks is not increased. With almost no increase in process time and further elimination of pattern alignment, the resolution in the exposure process can be effectively improved, thereby improving the yield of the product. The present invention firstly provides a mask layout for reducing the diffraction effect in a semiconductor process, which is equally divided into two patterns having symmetrical properties on the same mask substrate and the two patterns are respectively located in the same mask. In the upper two blocks. The present invention further provides an exposure method for reducing the diffraction effect in a semiconductor process, which comprises: providing a photomask 5 which is equally divided into two blocks having pattern matching properties, and only one can be made during exposure. The light source of the specific energy emitted by the exposure machine passes through the layout pattern on the mask block; then, a wafer is exposed, the exposure program uses the mask, and the first hole position is used by the exposure machine (sh 〇t Performing an exposure such that the right half of the first shot is exposed to the pattern of the second block on the reticle; then the exposure machine is displaced by one-half of the hole position in a continuous exposure sequence ( The distance of sh 〇t ); then, re-exposing the wafer, the re-exposure procedure uses the reticle, and another exposure is performed with the exposure machine to make the right half of the first hole shot The pattern of the first block on the reticle is then exposed to complete a complete pattern.

Page 11 1290733 V. INSTRUCTIONS (9) 5-4 Detailed Description of the Invention The following is a detailed description of the present invention, and the description of the semiconductor process in the following description does not include the complete process of the exposure process and product manufacture. The prior art of the present invention is hereby incorporated by reference in its entirety for the purpose of the present disclosure. Further, the related drawings in the following text are not drawn according to actual ratios, and their functions are only for expressing the layout and method features of the present invention. The present invention firstly provides a mask layout for reducing the diffraction effect in a semiconductor process, which is equally divided into two patterns having symmetrical properties on the same mask substrate and the two patterns are respectively located in the same mask. In the upper two blocks. The exposure method of the present invention has the characteristics of the emission of the image; then the exposure machine is shot on the exposure machine; then, the cover, and the right of the shot is further improved, including the case matching The step provides a light source that provides a light-densing block of energy according to the light, the exposure of a hole (shot) is exposed to the reticle light program displacement of the right semi-continuous exposure re-exposure machine half-side and light The wafer is re-exposed to the light semi-conductor again, and the photo-exposure block is placed on the re-exposure cover on the reticle program line to expose the second exposure to the second pass. When the cover is equal, only the cloth on the cloth can use the light, and the low-diffraction effect in the block is divided into a mask for the exposure of the exposure machine, and the a pattern of holes; then the distance of the shot uses the pattern of the apertures of the light to complete

Page 12 1290733 V. Description of invention (10) A complete pattern. In order to disclose the differences between the features of the present invention and the prior art, in the following detailed description, the description will be mainly made by the finger electrode (IDT) process of a surface acoustic wave (SAW) filter. The second a diagram and the second b diagram are the 1 ay out manner of the invention on the reticle, and the halving mask becomes two blocks (sec ti on , ), including the first block and the second zone. a block in which a plurality of identical patterns are in the block and the patterns in the first block and the second block are further in a pattern having a pairing property but not the same, and the first block and the second block may be made After completing the 丨_stack exposure process, a complete pattern can be obtained. Taking the surface acoustic wave filter as an example, after completing the pattern stack exposure on the first block and the second block, a complete pattern of the finger electrodes (I DT ) can be obtained. At the same time, in the reticle layout mode of the present invention, the symmetrical pattern in each block is not limited to a rectangle (〇b 1 ο ng ), for example, when the surface acoustic wave element can have a large amplitude, the finger shape can be The shape of the electrodes is designed to be achieved with a symmetrical pattern of appropriate curvature. For example, in order to manufacture a circular or square spiral inductor on an active component (such as a power amplifier; Power Amplifier; PA), a circular or square symmetrical pattern can be designed. The third a diagram is a manufacturing procedure of the surface acoustic wave element finger electrode (I DT ) in the present invention, and the bth diagram is the detailed description of the exposure procedure 300 in the third a diagram.

Page 13 1290733 V. INSTRUCTIONS (11) Procedure, and to illustrate the exposure method of the present invention. In general, when manufacturing thin metal film layers, most of them choose to use two-layer photoresist process to achieve the process of lifting (1 i f t 〇 f f). First, the lower photoresist layer 100' is plated on the wafer to achieve the lift-off effect. Most of the lower photoresist 10 is selected from PMMA (polymethylmethacrylate) or PMGI (polymethylglutarimide), after soft-baked (pre-bake). A photoresist layer 200 is disposed on the ore, and the photoresist layer is generally positive photoresist. Then, the wafer is placed in the exposure machine and loaded to the exposure position. After determining the layout direction of the photomask, the exposure process is performed. The exposure light method is in each exposure-hole position, and the exposure is performed on the first one. The upper left half of the upper side has also been 3 2 0 steps 'distance, the side is again exposed (sho t) on the second hole program can be moved by the third exposure machine to carry the light when the 2 0 (sho t) light machine The exposure hole position (sh ο ΐ ) is exposed to the exposed surface of the photomask. The exposure machine is shown in the X# b diagram and the fourth diagram. In the platform of the exposed wafer 10 of the present invention (not shown), the displacement distance is set to "two distances per displacement". If the exposure of the finger electrodes is used as an instruction, 'the first step is to perform the 3 1 〇 step, that is, the exposure is performed first, so the first hole position (sh〇t) the pattern of the first block 31 on the cover 30, and the second right The pattern of block 3 2 . Then, 'execution, the direction shifts one-half of the shot of the mask, and the right half of the upper half of the mask has been shot again. This is the first hole position (at this time) The pattern of the right half block 3 1 of sh〇t), so that the first hole is in the complete pattern of the finger electrode (IDT), and the half side is exposed to the second block on the mask 30.

1290733 V. Description of invention (12) ' " ~~----- Pattern of one-32 · 'When the exposure machine performs the displacement to the x-axis direction again (ie, shifts to the right one-half of the hole position) ) and after exposure, on the f: side of the second hole position (sh〇t), also because the pattern f of the first block 3i on the mask 3 is exposed again, and the element is also a finger electrode. (IDT), and the pattern of the second block 32 on the mask 3 is exposed on the right half of the second hole position (sh〇t). Then, in this manner, a continuous exposure process is performed using the control precision of the displacement of the exposure machine itself. The exposure process of the finger electrode pattern on the entire wafer is completed in a manner similar to stacked exposure. Since the present invention performs the continuous exposure process using the control precision of the displacement of the exposure machine itself, the problem that the first block 图案 pattern overlaps with the pattern of the second block 32 during the exposure process can be completely solved, and at the same time, due to the exposure machine The total displacement distance at which the wafer exposure is completed does not increase, and the inter-force force is also within a controllable range. Therefore, the present invention can effectively reduce the diffraction effect in the case of solving the pattern weight alignment and without requiring a large increase in the processing time. If you look at it from another angle, you can reduce the line width of the process capability by half. This allows some process equipment to be manufactured after the mask layout and exposure = _ operation mode described in the present invention. Small line width finger electrode (IDT). / After the exposure of the wafer 10 is completed, the exposure device detects the end point signal 3 3 0, and sends the wafer 10 out of the exposure machine to complete the exposure process 34 〇, and then b the upper layer photoresist to develop the development 5 0 0 (development), tight Next, the wafer is crucible, closed to a bead ultraviolet (deep UV) aligner (a 1 igner ), and the wafer is subjected to VIII.

1290733 V. Inventive Description (13) The flood exposure process is performed. After the exposure is completed, the wafer 10 is sent to an organic solvent to be immersed to complete the development process 700. Since the diffraction effect has been solved, the upper/lower layer photoresist can be viewed through a microscope (micro croscope) or a scanning electron microscope (SEΜ) to have a good convex cantilever of the upper layer resist after completion of development. (overhang) shape or τ-type top (Τ-Top), while the lower layer of photoresist maintains an appropriate undercut distance with the upper layer of photoresist, so the thickness of the deposited layer is about 1 500 A~3 0 0 After the metal film layer of 0 A is 80 〇, the upper/lower layer photoresist is completely removed and the lift-off process is completed, so that a good finger electrode pattern is obtained on the wafer 10. In the mask layout and exposure method of the present invention, the upper layer photoresist is subjected to continuous stack exposure by using the control precision of the exposure machine itself, so there is no problem of pattern overlap alignment; and in the first a diagram, The upper photoresist is exposed twice, not only for a longer exposure time, but also for the problem of pattern overlap alignment; in the first b diagram, although the pattern overlap is overcome, The problem, but the process time is longer than the process time of the first a picture, so the invention has obvious progress and industrial utilization compared with the prior art. Although the present invention has described a method of manufacturing a specific frequency (f r e q u e n c y), a line width (1 ine width), and a surface acoustic wave element (SAW) finger electrode (I DT), the method of the present invention is not limited to these.

1290733 V. Description of invention (14) Description. The mask layout and exposure method of the present invention can also be applied to the processes of other products, and preferred examples include: a light-emitting element such as a Vertical Cavity Surface Emitted LASER (VCSEL), Laser diode (LED) or high-brightness LED (Light Emitted Diode; LED), etc., the positive and negative electrodes on the components have used the structure of the finger electrodes, in order to obtain the best The uniform current distribution, in turn, improves the luminous efficiency of the component. In addition, in the process of spiral inductance (spirai induct〇r) on the microwave component, square or round a 1 ; ^ ^ ^ XW-shaped winding method is also adopted. And a higher winding density to obtain a larger inductance 佶r ·". # m ^ ^, value (inductorvalue) and quality factor (Q factor).

The above is only the patent application of the present invention as set forth in the present invention; those skilled in the art should be able to complete the scope of the invention as described below. The preferred embodiments are not intended to be limited to the foregoing description, and are intended to be

Page 17 1290733 Simple illustration of the diagram First, the first C diagram is a diagram of the prior art. 2a and 2b are schematic diagrams of the mask layout of the present invention. FIG. 3 is a flow chart of the process of the present invention. FIG. 4B is a flow chart of the exposure of the present invention. Schematic diagram of the position of the mask The main part of the symbol 10 wafer 2 0 hole 3 0 mask 3 1 first block 32 second block fiber page 18

Claims (1)

1290733 VI. Application for Patent Scope 1. A reticle layout for reducing the diffraction effect in a semiconductor process, characterized in that it is equally divided into two blocks on the same reticle substrate, wherein a first block is arranged on the two blocks The pattern area and a second pattern area in a matching shape with the first pattern enable the pattern on the two blocks to be exposed to a specific block in a divided manner, thereby reducing the diffraction effect. 2. A reticle layout for reducing a diffraction effect in a semiconductor process as claimed in claim 1, wherein two of the two blocks on the reticle have a matching pattern in the pattern region It can be a pattern of any form with matching properties. 3. The reticle layout for reducing the diffraction effect in the semiconductor process of claim 1, wherein two of the two blocks on the reticle have matching patterns in the pattern region, An exposure method capable of reducing the diffraction effect in a semiconductor process, comprising: providing a photomask that is equally divided into two blocks having pattern matching properties When exposing, only a specific energy source emitted by an exposure machine can pass through the layout pattern on the mask block; exposing a wafer, the exposure program uses the mask, and the exposure machine is first The shot performs an exposure such that the right half of the first shot is exposed to the pattern of the second block on the reticle; the exposure machine is displaced by one-half in a continuous exposure sequence Hole position (sh 〇t) Page 19 1290733_6. The distance of the patent application range; then re-exposing the wafer, the re-exposure procedure uses the reticle, and another exposure is performed with the exposure machine to make the first hole position (sh 〇t The right half of the mask is again exposed to the pattern of the first block on the mask to complete a complete pattern. 5. A semiconductor system provides a mask with a refitting property, and the quantity of the light source is exposed to the exposure of the upper side of the first (sho t) according to the light exposure machine; again, the right half of the exposure is again The left half of the pattern 'the first half of the hole on the mask has a photomask to expose the machine and then re-exposure while reducing the winding in the second block. The mask is only exposed during the exposure. On the block, the exposure side (shot) execution side is exposed to the second area of the light, and the unequal division of the second area continuous exposure process effect allows an exposure layout to be used once on the mask. The exposure method comprises: dividing into two specific energy emitted by the patterned laser machine; and adopting the exposure to make the first hole position a block pattern, and the right pattern; shifting by two A hole position (sh ο ΐ ) of the wafer 'this exposure is performed once to expose the pattern of the first block on the reticle in the second hole. The mask is used in the mask, and the pattern of the first hole position (sho t) is completed on a complete left half side, and the Φ 6 is exposed. The semiconductor process described in claim 5 is reduced. An exposure method of a diffraction effect, wherein the exposure machine can be a stepper, Page 20 1290733 VI. Scope of Patent Application Scanner, X-Ray Scanner or E-Beam Exposer. 7. The exposure method for reducing the diffraction effect in the semiconductor process of claim 5, wherein the exposure machine can be set in the lateral direction or the longitudinal direction, and each of the two-point aperture distance is taken. Perform an exposure afterwards. 8. The exposure method for reducing a diffraction effect in a semiconductor process according to claim 5, wherein the reticle layout is equally divided into two blocks on the same reticle substrate, wherein the two A first pattern area and a second pattern area matching the first pattern are disposed on the block. 9. The exposure method for reducing a diffraction effect in a semiconductor process according to claim 8, wherein two of the two blocks on the reticle layout have matching patterns in the pattern region, Is a pattern of any form with matching properties. An exposure method for reducing a diffraction effect in a semiconductor process according to claim 8, wherein two of the two blocks on the reticle layout have a matching pattern in the pattern region, Can be matched horizontally or vertically. 11. An exposure method for reducing diffraction effect of finger electrodes in a semiconductor process Page 21 1290733 VI. The scope of application for patents, including: providing a light source of a matching nature, according to the exposure of one machine to the half of the first shot (the exposure) is exposed to the distance of shai exposure; The second half of the reticle is re-patterned; and the second reticle on the reticle, the reticle is on the block, only the cymbal on the reticle block during exposure, 5 hai exposure hole position (shot) Performing the left half of the second area machine exposed on the light mask to continuously expose the wafer after the exposure process, and then performing another exposure, so as to divide the aliquot into two patterns to allow an exposure machine The specific energy of the emission can pass; the photomask, and the one-time exposure is used in the exposure layout pattern to make the pattern of the first block on the first hole cover, and the pattern of the right block; One of the holes (sh 〇t) is exposed to the pattern of the second hole block on the reticle. The sub-exposure program uses the reticle and the first hole (shot) case to complete a complete half, and exposes the left i2 pole of the shot of the block (如): In the semiconductor process described in the eleventh, the method of reducing the finger power and the projection should be reduced, wherein the exposure machine can be a stepper, a scanner, a X-ray scanner (χ-R Scanner). Or an electron beam exposure machine (E - Beam Exp〇ser). 13. The exposure method for reducing the diffraction effect of a finger electrode in a semiconductor process according to claim 11, wherein the exposure machine can be set in a horizontal S direction or a longitudinal direction, each one-half of a hole position (Sh0t) after the distance is executed Page 22 1290733 VI. Scope of application for patents One exposure. 1 . The exposure method for reducing the diffraction effect of a finger electrode in a semiconductor process according to claim 11 , wherein the reticle layout is equally divided into two blocks on the same reticle substrate And arranging, on the two blocks, a first pattern area and a second pattern area matching the first pattern. An exposure method for reducing a diffraction effect of a finger electrode in a semiconductor process as claimed in claim 14, wherein two of the two blocks on the reticle layout have a matching shape The pattern in the area may be any form of pattern having matching properties. An exposure method for reducing a diffraction effect of a finger electrode in a semiconductor process as claimed in claim 14, wherein two of the two blocks on the reticle layout have a matching shape The pattern in the area can be matched horizontally or vertically. 1 7. An exposure method for reducing the diffraction effect of an inductive process in a semiconductor process, comprising: providing a photomask that is equally divided into two blocks having pattern matching properties, which can only be used in exposure a light source of a specific energy emitted by an exposure machine passes through a layout pattern on the mask block; exposing a wafer, the exposure program uses the mask, and the exposure is performed Page 23 1290733 Sixth, the scope of application for patents The exposure machine is displaced by a continuous exposure program; then an exposure is performed to make the first hole position The machine is exposed to the left side of the first hole position (sh 〇t ). The half side is exposed to the pattern of the second block on the mask, and the right half is one hole. (shot) re-exposing the wafer. The re-exposure process uses the reticle and performs another exposure with the exposure machine to expose the first hole position (sh〇t) & The pattern of the first block on the reticle is completed to complete a complete pattern, while at the same time on the left half of the second shot, the pattern of the second block on the reticle is exposed. 1 8 · An exposure method for reducing the diffraction effect of an inductive process in a semiconductor process as claimed in claim 17 wherein the exposure machine is a stepper, a scanner, an X-ray scanner (X-Ray Scanner) or E-Beam Exposer. 1 9 · An exposure method for reducing the diffraction effect of an inductive process in a semiconductor process as claimed in claim 7 wherein the exposure machine can be set in a lateral or longitudinal direction, one per second of a hole Perform an exposure after (shot) the distance. An exposure method for reducing the diffraction effect of an inductive process in a semiconductor process as claimed in claim 17 wherein the layout of the mask is equally divided into two blocks on the same mask substrate. , where the two blocks are clothed Page 24 1290733 VI. Scope of Application A first pattern area is provided with a second pattern area that matches the shape of the first pattern. 2 1. An exposure method for reducing the diffraction effect of an inductive process in a semiconductor process as claimed in claim 20, wherein two of the two blocks on the reticle layout have a matching shape in the pattern region The pattern may be any form of pattern having matching properties. 2 2. An exposure method for reducing an inductive process diffraction effect in a semiconductor process as claimed in claim 20, wherein two of the two blocks on the reticle layout have matching shapes in the pattern region The pattern can be matched horizontally or vertically. Page 25