TWI290350B - Device and method of bonding an image sensor chip to a glass substrate - Google Patents

Device and method of bonding an image sensor chip to a glass substrate Download PDF

Info

Publication number
TWI290350B
TWI290350B TW094144367A TW94144367A TWI290350B TW I290350 B TWI290350 B TW I290350B TW 094144367 A TW094144367 A TW 094144367A TW 94144367 A TW94144367 A TW 94144367A TW I290350 B TWI290350 B TW I290350B
Authority
TW
Taiwan
Prior art keywords
metal
glass substrate
image sensing
sensing wafer
bumps
Prior art date
Application number
TW094144367A
Other languages
Chinese (zh)
Other versions
TW200723421A (en
Inventor
Hsiang-Ming Huang
An-Hong Liu
Yi-Chang Lee
Alex Lu
Chun-Ying Lin
Original Assignee
Chipmos Technologies Inc
Chipmos Technologies Bermuda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chipmos Technologies Inc, Chipmos Technologies Bermuda filed Critical Chipmos Technologies Inc
Priority to TW094144367A priority Critical patent/TWI290350B/en
Publication of TW200723421A publication Critical patent/TW200723421A/en
Application granted granted Critical
Publication of TWI290350B publication Critical patent/TWI290350B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Abstract

A device of bonding an image sensor chip to a glass substrate is disclosed. A plurality of metal bumps and a metal extrusion ring are mounted on an active surface of the image sensor chip, the metal extrusion ring encloses a sensor region of the image sensor chip and separates the sensor region and the metal bumps. A circuit layer of the glass substrate includes a plurality of connecting pads and a metal ring. The image sensor chip and the glass substrate are thermocompressed each other to make the metal bumps bond to the connecting pads, and the embossing metal ring is bonded to the metal ring, it has effect of sealing the sensor region without contamination of sealant.

Description

1290350 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種影像感測晶片之結合技術，特別 .係有關於一種影像感測晶片與玻璃基板之結合構造及方 法。 【先前技術】 影像感測晶片與基板之結合構造係以打線或覆晶接 • 合方式完成基板與影像感測晶片之間的電性連接，近年來 感測器封裝構造係改變為破璃覆晶 封裝，t㉟晶片▼直接接合於一破璃基板上，㈣免除打 線之步驟，符合目前半導體產品輕、薄、短、小之要求， 然而為保護影像感測晶片之金屬凸塊而形成之密封膠於 點膠後烘烤的過程當中，會產生揮發性氣體而污染該光感 測區。 如第1圖所示，習知影像感測晶片與玻璃基板之結合 • 構造100係包含一影像感測晶片110、一玻璃基板120以 及一密封膠130。該影像感測晶片110之一主動面U1係 包含有一光感測區112以及在該光感測區i i 2外圍之複數 個金屬凸塊113，該玻璃基板120之一線路層121上係包 含有複數個連接墊122，將該影像感測晶片110覆晶接合 至該玻璃基板120，利用熱壓合方式使該影像感測晶片1 j 〇 之該些金屬凸塊113電性導接至該玻璃基板i2〇之線路層 121上之該些連接墊122。而底部填充膠（underfill material) 之密封膠130係形成於該玻璃基板12〇與該影像感測晶片 1290350 1 1 0之間。通常該密封膠丨3 〇須加熱烘烤以達到固化，在 烘烤該密封膠130時，該密封膠13〇會排出有毒或具刺激 性之揮發性氣體，或點膠過程中該密封膠13〇容易隨著毛 • 細現象溢流至該光感測區，使該影像感測晶片丨丨〇之該光 • 感測區U 2受到污染，造成該光感測區112内之感測元件 故障或感測靈敏度劣化。 【發明内容】 • 本發明之主要目的係在於提供一種影像感測晶片與 玻璃基板之結合構造及方法，一影像感測晶片與一玻璃基 板係相互熱壓合，使得該影像感測晶片之複數個金屬凸塊 係接合至該玻璃基板之複數個連接墊，且該影像感測晶片 之一金屬凸環係接合至該玻璃基板之一金屬環。藉由該金 屬凸環與該金屬環之接合達到氣閉密封光感測區之功效。 依據本發明，一種影像感測晶片與玻璃基板之結合構 造主要包含一影像感測晶片以及一玻璃基板❹該影像感測 • g片係具有-主動面’該主動面係包含一光烕測區，並於 該主動面上設置有複數個金屬凸塊以及一金屬凸環，該金 屬凸環係環繞該光感測區並區隔該光感測區與該些金屬 凸塊，該玻璃基板之一表面係形成有一線路層，該線路層 係包含有複數個連接塾以及-金屬環，其中，該影像感測 晶片與該玻璃基板係相互熱壓合，使得該些金屬凸塊係接 合至該些連接墊，且該金屬凸環係接合至該金屬環。 【實施方式】 凊參閱第2圖，在本發明之一具體實施例中，一種影 1290350 • 像感測晶片與玻璃基板之結合構造200主要包含一影像感 測晶片210以及一玻璃基板220。該影像感測晶片210係 具有一主動面211，該主動面211係包含一光感測區212, m • 該主動面係覆蓋有一保護層240，該保護層240係部分覆 、 蓋複數個銲墊215且顯露該光感測區212,並於該主動面 211上設置有複數個金屬凸塊213以及一金屬凸環214, 較佳地，該些金屬凸塊213與該金屬凸環214係由同一金 0 屬材質所電鍍製成，例如金凸塊與金凸環，以節省製程步 驟，該些金屬凸塊213與該金屬凸環214係形成於一凸塊 下金屬層251與一環狀金屬層252上，該金屬凸環214係 環繞該光感測區212並區隔該光感測區212與該些金屬凸 塊213。在本實施例中，每一金屬凸塊213係包含有一下 塊部213b以及一上塊部213a，該些金屬凸塊213之該些 下塊部213b係由電鍍所形成，該些金屬凸塊213之該些 上塊部213a係由打線形成之結線凸塊（stuci bump)或者是 籲 由電鍍所形成的金凸塊。較佳地，該些金屬凸塊213之該 些下塊部213b與該金屬凸環214係由同一金屬材質所電 鍍製成。在本實施例中，該些金屬凸塊2丨3之該些下塊部 213b係低於該金屬凸環214。 該玻璃基板220之一下表面221係形成有一線路層 222 ’該線路層222係包含有複數個連接墊223以及一金 屬環224，將該影像感測晶片210與該玻璃基板22〇相互 熱壓合，較佳地，可利用超音波鍵合技術使得該些金屬凸 塊213係接合至該些連接墊223，且該金屬凸環214係接 8 ,1290350 • 合至該金屬環224。在本實施例中，該些金屬凸塊213與 ”衾些連接墊223之間接合界面係為金_金鍵合，該金屬凸環 214與該金屬環224之間接合界面亦為金_金鍵合，故不會 • 排出揮發性氣體或助銲物質。此外，該影像感測晶片21 0 、 與玻璃基板220之結合構造另包含有一底部填充膠230， 其係形成於該影像感測晶片210與該玻璃基板220之間且 被該金屬凸環214限制在該光感測區2丨2之外，以保護該 φ 些金屬凸塊213。藉由該金屬凸環214與該金屬環224之 接合達到氣閉密封該光感測區212之功效，防止該底部填 充膠230於烘烤時排出有毒或具刺激性之揮發性氣體，且 在點膠過程中，該底部填充膠230不會隨著毛細現象溢流 至該光感測區212，使該影像感測晶片210之該光感測區 212不會受到污染，有效保護該光感測區2丨2内之感測元 件並避免感測靈敏度之劣化。 該影像感測晶片與玻璃基板之結合構造200之製造方 • 法請參閱第3A至3F圖。首先，請參閱第3A圖，提供一 影像感測晶片210，該影像感測晶片210係具有一主動面 211，該主動面211係包含一光感測區212，該主動面211 上係覆蓋一保護層240，在本實施例中，該保護層240係 為聚酿亞胺（polyimide)，該保護層240係部分覆蓋複數個 銲墊215且顯露出該光感測區212。接著，請參閱第3B 圖，以濺鍍、沉積或電鍍方式形成至少一金屬層250於該 保護層240上。之後，請參閱第3C圖，設置複數個金屬 凸塊213以及一金屬凸環214於該主動面211上，該金屬 1290350 凸環214係環繞該光感測區212並區隔該光感測區212與 該些金屬凸塊213，該些金屬凸塊213與該金屬凸環214 係由同一金屬材質所電鍍製成，例如金。在本實施例中， • 每一金屬凸塊213係包含有一下塊部213b以及一上塊部 213a，先電鍍形成該些金屬凸塊213之該些下塊部213b 與該金屬凸環214於該金屬層250上，即該些金屬凸塊213 之該些下塊部213b與該金屬凸環214亦由同一金屬材質 馨所電鑛製成。但該些金屬凸塊213之該些下塊部213b之 高度係低於該金屬凸環214。接著，請參閱第3D圖，利 用餘刻技術去除該金屬層250，留下電鍍有該些金屬凸塊 213之一凸塊下金屬層251及電鍛有該金屬凸環214之一 環狀金屬層252。之後，請參閱第3E圖，打線形成該些金 屬凸塊213之該些上塊部213a，再將該些金屬凸塊213之 該些上塊部213a磨平，使該些上塊部213a之高度對齊於 該金屬凸環214，以利接合至一基板。 • 接著，請參閱第3F圖，提供一玻璃基板220,該玻璃 基板220之一下表面221係形成有一線路層222 ,該線路 層222係包含有複數個連接墊223以及一金屬環224，其 中該些連接墊223及該金屬環224係一體形成於該線路層 222，將該玻璃基板220與該影像感測晶片21〇以熱壓合 方式接合’使得該些金屬凸塊213係接合至該些連接塾 223。該金屬凸環214係接合至該金屬環224。在本實施例 中，該金屬凸環2U與該金屬環224之間接合界面以及該 些金屬凸塊213與該些連接墊223之間接合界面係皆為金 1290350 • -金鍵合，較佳地，可以辅以超音波鍵合技術以利達成金· 金鍵合界面之低溫形成。最後，形成一底部填充膠230於 該影像感測晶片2 10與該玻璃基板220之間即為第2圖所 • 示之該影像感測晶片與玻璃基板之結合構造200，且該底 部填充膠230被該金屬凸環214限制在該光感測區212之 外。 本發明之保護範圍當視後附之申請專利範圍所界定 φ 者為準，任何熟知此項技藝者，在不脫離本發明之精神和 範圍内所作之任何變化與修改，均屬於本發明之保護範 圍。 【圖式簡單說明】 第 1 圖··習知影像感測晶片與玻璃基板之結合構造 之截面示意圖。 第 2 圖：依據本發明之一具體實施例，一種影像感 測晶片與玻璃基板之結合構造之截面示 • 意圖。 第3 A至3F圖：依據本發明之一具體實施例，該影像感測 晶片與玻璃基板之結合構造於製造過程 中之截面示意圖。 【主要元件符號說明】 100 影像感測晶片與破璃基板之結合構造 110 影像感測晶片 111 主動面 112 光感測區 113 金屬凸塊 120 玻璃基板 121 線路層 122 連接墊 11 J290350 130 密封膠 200 影像感測晶片與玻璃基板之結合構造 210 影像感測晶片 211 主動面 212 光感測區 213 金屬凸塊 213a 上塊部 213b 下塊部 214 金屬凸環 215 銲墊 220 玻璃基板 221 下表面 222 線路層 223 連接墊 224 金屬環 230 底部填充膠 240 保護層 250 金屬層 251 凸塊下金屬層 252 環狀金属層 12BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for combining image sensing wafers, and more particularly to a combined construction and method of an image sensing wafer and a glass substrate. [Prior Art] The combination of the image sensing wafer and the substrate is electrically connected between the substrate and the image sensing wafer in a wire bonding or flip chip connection manner. In recent years, the sensor package structure has been changed to a glass coating. Crystal package, t35 wafer ▼ directly bonded to a glass substrate, (4) eliminating the step of wire bonding, in line with the current requirements of semiconductor products light, thin, short, small, but to seal the metal bumps of the image sensing chip During the baking process of the glue, a volatile gas is generated to contaminate the light sensing area. As shown in FIG. 1, a conventional image sensing wafer is bonded to a glass substrate. The structure 100 includes an image sensing wafer 110, a glass substrate 120, and a sealant 130. The active surface U1 of the image sensing wafer 110 includes a light sensing region 112 and a plurality of metal bumps 113 on the periphery of the light sensing region ii 2 . The circuit layer 121 of the glass substrate 120 includes a plurality of connection pads 122, the image sensing wafer 110 is flip-chip bonded to the glass substrate 120, and the metal bumps 113 of the image sensing wafer 1 j are electrically connected to the glass by thermal compression bonding. The connection pads 122 on the circuit layer 121 of the substrate i2. An underfill material sealant 130 is formed between the glass substrate 12 and the image sensing wafer 1290350 1 1 0. Generally, the sealant 3 does not need to be heated and baked to achieve curing. When the sealant 130 is baked, the sealant 13 will discharge toxic or irritating volatile gas, or the sealant during dispensing. 〇 溢 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着 随着The fault or sensing sensitivity is degraded. SUMMARY OF THE INVENTION The present invention is directed to a structure and method for combining an image sensing wafer and a glass substrate. An image sensing wafer and a glass substrate are thermocompression bonded to each other such that the image sensing wafer is plural. The metal bumps are bonded to the plurality of connection pads of the glass substrate, and one of the image sensing wafers is bonded to one of the metal rings of the glass substrate. The function of the gas-tight sealing light sensing region is achieved by the bonding of the metal convex ring and the metal ring. According to the present invention, a combination of an image sensing wafer and a glass substrate mainly includes an image sensing wafer and a glass substrate, and the image sensing has an active surface. The active surface includes a light detecting area. And a plurality of metal bumps and a metal bump ring disposed around the light sensing region and surrounding the light sensing region and the metal bumps, the glass substrate a surface layer is formed with a circuit layer, the circuit layer includes a plurality of connection ports and a metal ring, wherein the image sensing wafer and the glass substrate are thermally pressed together such that the metal bumps are bonded to the surface Some of the connection pads, and the metal collar is bonded to the metal ring. [Embodiment] Referring to Figure 2, in one embodiment of the present invention, a shadow 1290350-image sensing wafer and glass substrate bonding structure 200 mainly includes an image sensing wafer 210 and a glass substrate 220. The image sensing chip 210 has an active surface 211. The active surface 211 includes a light sensing region 212. The active surface is covered with a protective layer 240. The protective layer 240 is partially covered and covered with multiple solders. The 215 is exposed to the photo sensing region 212, and a plurality of metal bumps 213 and a metal bump 214 are disposed on the active surface 211. Preferably, the metal bumps 213 and the metal bumps 214 are attached. The metal bumps and the gold bumps are formed by electroplating, such as gold bumps and gold bumps, to save the process. The metal bumps 213 and the metal bumps 214 are formed on a bump metal layer 251 and a ring metal. On the layer 252, the metal bump 214 surrounds the photo sensing region 212 and separates the photo sensing region 212 from the metal bumps 213. In this embodiment, each of the metal bumps 213 includes a lower block portion 213b and an upper block portion 213a. The lower block portions 213b of the metal bumps 213 are formed by electroplating, and the metal bumps are formed. The upper block portions 213a of 213 are stuic bumps formed by wire bonding or gold bumps formed by plating. Preferably, the lower block portions 213b of the metal bumps 213 and the metal bumps 214 are made of the same metal material. In this embodiment, the lower block portions 213b of the metal bumps 2丨3 are lower than the metal bumps 214. The lower surface 221 of the glass substrate 220 is formed with a circuit layer 222. The circuit layer 222 includes a plurality of connection pads 223 and a metal ring 224. The image sensing wafer 210 and the glass substrate 22 are thermally pressed together. Preferably, the metal bumps 213 are bonded to the connection pads 223 by ultrasonic bonding techniques, and the metal collars 214 are coupled to the metal ring 224. In this embodiment, the bonding interface between the metal bumps 213 and the connecting pads 223 is gold-gold bonding, and the bonding interface between the metal bumps 214 and the metal ring 224 is also gold-gold bonding. The image sensing wafer 210 and the glass substrate 220 are further provided with an underfill 230 formed on the image sensing wafer 210 and the glass. The metal bumps 214 are bounded by the metal bumps 214 outside the photo sensing region 2丨2 to protect the φ metal bumps 213. The metal bumps 214 and the metal ring 224 are bonded to each other. The effect of the light-sensing area 212 is sealed to prevent the underfill 230 from discharging toxic or irritating volatile gas during baking, and the underfill 230 does not follow the capillary phenomenon during dispensing. The light sensing region 212 is overflowed to the light sensing region 212, so that the light sensing region 212 of the image sensing wafer 210 is not contaminated, thereby effectively protecting the sensing elements in the light sensing region 2丨2 and avoiding sensing sensitivity. Degradation. The image sensing wafer and the glass substrate For the manufacturing method of the structure 200, please refer to FIGS. 3A to 3F. First, referring to FIG. 3A, an image sensing wafer 210 is provided. The image sensing wafer 210 has an active surface 211, and the active surface 211 is The active surface 211 is covered with a protective layer 240. In the embodiment, the protective layer 240 is a polyimide, and the protective layer 240 partially covers a plurality of solders. Pad 215 and revealing the photo sensing region 212. Next, referring to FIG. 3B, at least one metal layer 250 is formed on the protective layer 240 by sputtering, deposition or electroplating. Thereafter, refer to FIG. 3C, setting A plurality of metal bumps 213 and a metal bump 214 are disposed on the active surface 211. The metal 1290350 convex ring 214 surrounds the light sensing region 212 and separates the light sensing region 212 from the metal bumps 213. The metal bumps 213 and the metal bumps 214 are made of the same metal material, such as gold. In this embodiment, each of the metal bumps 213 includes a lower block portion 213b and an upper block portion. 213a, first forming the lower blocks of the metal bumps 213 The metal ribs 214 and the metal bumps 214 are formed on the metal layer 250, that is, the lower bump portions 213b of the metal bumps 213 and the metal bumps 214 are also made of the same metal material. The heights of the lower block portions 213b of the bumps 213 are lower than the metal bumps 214. Next, referring to FIG. 3D, the metal layer 250 is removed by a residual technique, leaving the metal bumps 213 plated. An under bump metal layer 251 and an annular metal layer 252 of the metal bump 214 are electrically forged. Thereafter, referring to FIG. 3E, the upper bump portions 213a of the metal bumps 213 are formed by wire bonding, and then The upper block portions 213a of the metal bumps 213 are flattened such that the heights of the upper block portions 213a are aligned with the metal bumps 214 to facilitate bonding to a substrate. The third substrate is provided with a circuit layer 222. The circuit layer 222 includes a plurality of connection pads 223 and a metal ring 224. The connection pads 223 and the metal ring 224 are integrally formed on the circuit layer 222, and the glass substrate 220 and the image sensing wafer 21 are joined by thermocompression bonding so that the metal bumps 213 are bonded to the wires. Connect 塾223. The metal collar 214 is joined to the metal ring 224. In this embodiment, the bonding interface between the metal bump 2U and the metal ring 224 and the bonding interface between the metal bumps 213 and the connecting pads 223 are both gold 1290350•-gold bonding, preferably, Ultrasonic bonding technology can be used to achieve low temperature formation of the gold-gold bonding interface. Finally, an underfill adhesive 230 is formed between the image sensing wafer 2 10 and the glass substrate 220, which is the combined structure 200 of the image sensing wafer and the glass substrate shown in FIG. 2, and the underfill is 230 is confined outside of the photo-sensing region 212 by the metal collar 214. The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are protected by the present invention. range. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a structure in which a conventional image sensing wafer and a glass substrate are combined. Fig. 2 is a cross-sectional view showing a combination of an image sensing wafer and a glass substrate in accordance with an embodiment of the present invention. 3A to 3F are views showing a cross-sectional view of the image sensing wafer and the glass substrate in a manufacturing process in accordance with an embodiment of the present invention. [Main component symbol description] 100 image sensing wafer and glass substrate combination structure 110 image sensing wafer 111 active surface 112 light sensing area 113 metal bump 120 glass substrate 121 circuit layer 122 connection pad 11 J290350 130 sealant 200 Image sensing wafer and glass substrate combination structure 210 image sensing wafer 211 active surface 212 light sensing area 213 metal bump 213a upper block portion 213b lower block portion 214 metal convex ring 215 pad 220 glass substrate 221 lower surface 222 line Layer 223 connection pad 224 metal ring 230 underfill 240 protective layer 250 metal layer 251 under bump metal layer 252 annular metal layer 12

Claims (1)

,1290350 十、申請專利範園： 1、 一種影像感測晶片與玻璃基板之結合構造，包含： 一影像感測晶片，其係具有一主動面，該主動面係包 • 含一光感測區，並於該主動面上設置有複數個金屬凸 • 塊以及一金屬凸環，該金屬凸環係環繞該光感測區迷 區隔該光感測區與該些金屬凸塊；以及 一玻璃基板，其一表面係形成有一線路層，該線路層 φ 係包含有複數個連接墊以及一金屬環； 其中’該影像感測晶片與該玻璃基板係相互熱壓合， 使得該些金屬凸塊係接合至該些連接墊，且該金屬凸 環係接合至該金屬環。 2、 如申請專利範圍第丨項所述之影像感測晶片與破璃歧 板之結合構造，另包含有一底部填充膠，其係形成於 該影像感測晶片與該玻璃基板之間且被該金屬凸環 限制在該光感測區之外。 • 3、如申請專利範圍第i項所述之影像感測晶片與坡璃基 板之結合構造，其中該些金屬凸塊與該金屬凸環係由 同一金屬材質所電鍍製成。 4、 如申請專利範圍第1項所述之影像感測晶片與坡璃基 板之結合構造，其中每一金屬凸塊係包含有一下塊部 以及一上塊部，該些金屬凸塊之該些下塊部與該金屬 凸環係由同一金屬材質所電鍍製成。 5、 如申請專利範圍第4項所述之影像感測晶片與破璃基 板之結合構造，其中該些金屬凸塊之該些下塊部之古 13 •1290350 度係低於該金屬凸環。 6、 如申請專利範圍第5項所述之影像感測晶片與玻璃基 板之結合構造，其中該些金屬凸塊之該些上塊部係為 . 由打線形成之結線凸塊（stud bump)或者是電鍍形成 之金凸塊。 7、 如申請專利範圍第1項所述之影像感測晶片與玻璃基 板之結合構造，其中該金屬凸環與該金屬環之間接合 0 界面係為金-金鍵合。 8、 如申請專利範圍第7項所述之影像感測晶片與玻璃基 板之結合構造，其中該些金屬凸塊與該些連接墊之間 接合界面係為金-金鍵合。 9、 一種影像感測晶片與玻璃基板之結合構造之製造方 法，包含·· 提供一影像感測晶片，該影像感測晶片係具有一主動 面’該主動面係包含一光感測區，並於該主動面上設 • 置有複數個金屬凸塊以及一金屬凸環，該金屬凸環係 環繞該光感測區並區隔該光感測區與該些金屬凸塊； 提供一玻璃基板，其一表面係形成有一線路層，該線 路層係包含有複數個連接墊以及一金屬環；以及 熱壓合該影像感測晶片與該玻璃基板，使得該些金屬 凸塊係接合至該些連接墊，且該金屬凸環係接合至該 金屬環。 10如申5青專利範圍第9項所述之影像感測晶片與玻璃基 板之結合構造之製造方法，其中在上述熱壓合步驟中 Π90350 更輔以超音波鍵結方式。 1 1、如申請專利範圍第9項所述之影像感測晶片與玻璃基 板之結合構造之製造方法，其另包含有··形成一底部 填充膠於該影像感測晶片與該玻璃基板之間且被該 金屬凸環限制在該光感測區之外。 12、 如申請專利範圍第9項所述之影像感測晶片與玻璃基 板之結合構造之製造方法，其中每一金屬凸塊係包含 _ 有一下塊部以及一上塊部，該些金屬凸塊之該些下塊 部與該金屬凸環係由同一金屬材質所電鍍製成。 13、 如申請專利範圍第12項所述之影像感測晶片與玻璃 基板之結合構造之製造方法，其中該些金屬凸塊之該 些下塊部之高度係低於該金屬凸環。 14、 如申請專利範圍第13項所述之影像感測晶片與玻璃 基板之結合構造之製造方法，其中該些金屬凸塊之該 二上塊係為由打線形成之結線凸塊bump)或 # 者是電鍍形成之金凸塊。 151290350 X. Patent application: 1. A combination of an image sensing wafer and a glass substrate, comprising: an image sensing wafer having an active surface, the active surface package comprising: a light sensing area And a plurality of metal convex blocks and a metal convex ring disposed on the active surface, the metal convex ring surrounding the light sensing region and the metal bumps; and a glass a substrate having a circuit layer formed on a surface thereof, the circuit layer φ includes a plurality of connection pads and a metal ring; wherein 'the image sensing wafer and the glass substrate are mutually thermocompressed to cause the metal bumps Attached to the connection pads, and the metal collar is bonded to the metal ring. 2. The combination of the image sensing wafer and the glass slab of claim 3, further comprising an underfill formed between the image sensing wafer and the glass substrate The metal collar is confined outside the light sensing zone. 3. The combination of the image sensing wafer and the glass substrate as described in claim i, wherein the metal bumps and the metal collar are plated from the same metal material. 4. The combination of the image sensing wafer and the glass substrate according to claim 1, wherein each of the metal bumps comprises a lower block portion and an upper block portion, and the metal bumps are The lower block portion and the metal convex ring are made of the same metal material. 5. The combination of the image sensing wafer and the glass substrate according to claim 4, wherein the lower portions of the metal bumps are lower than the metal collar. 6. The combination of the image sensing wafer and the glass substrate according to claim 5, wherein the upper portions of the metal bumps are: stud bumps formed by wire bonding or It is a gold bump formed by electroplating. 7. The combination of an image sensing wafer and a glass substrate according to claim 1, wherein the interface between the metal collar and the metal ring is a gold-gold bond. 8. The combination of the image sensing wafer and the glass substrate according to claim 7, wherein the bonding interface between the metal bumps and the connection pads is gold-gold bonding. 9. A method of fabricating a combination of an image sensing wafer and a glass substrate, comprising: providing an image sensing wafer, the image sensing wafer having an active surface comprising an optical sensing region, and Providing a plurality of metal bumps and a metal bump ring around the light sensing region, and surrounding the light sensing region and the metal bumps; providing a glass substrate Forming a circuit layer on a surface thereof, the circuit layer includes a plurality of connection pads and a metal ring; and thermally pressing the image sensing wafer and the glass substrate such that the metal bumps are bonded to the surface A pad is attached and the metal collar is bonded to the metal ring. A manufacturing method of a combination of an image sensing wafer and a glass substrate according to claim 9 of claim 5, wherein in the thermal pressing step, Π90350 is further supplemented by an ultrasonic bonding method. 1 . The manufacturing method of the combined structure of the image sensing wafer and the glass substrate according to claim 9 , further comprising forming an underfill between the image sensing wafer and the glass substrate And being constrained by the metal bump outside the light sensing region. 12. The method of manufacturing the combined structure of an image sensing wafer and a glass substrate according to claim 9, wherein each of the metal bumps comprises a lower block portion and an upper block portion, the metal bumps. The lower block portion and the metal convex ring are made of the same metal material. 13. The method of fabricating a combination of an image sensing wafer and a glass substrate according to claim 12, wherein the lower portions of the metal bumps are lower in height than the metal collar. 14. The method of manufacturing a combination of an image sensing wafer and a glass substrate according to claim 13 , wherein the two upper blocks of the metal bumps are bump bumps formed by wire bonding or # It is a gold bump formed by electroplating. 15
TW094144367A 2005-12-14 2005-12-14 Device and method of bonding an image sensor chip to a glass substrate TWI290350B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW094144367A TWI290350B (en) 2005-12-14 2005-12-14 Device and method of bonding an image sensor chip to a glass substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW094144367A TWI290350B (en) 2005-12-14 2005-12-14 Device and method of bonding an image sensor chip to a glass substrate

Publications (2)

Publication Number Publication Date
TW200723421A TW200723421A (en) 2007-06-16
TWI290350B true TWI290350B (en) 2007-11-21

Family

ID=39301423

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094144367A TWI290350B (en) 2005-12-14 2005-12-14 Device and method of bonding an image sensor chip to a glass substrate

Country Status (1)

Country Link
TW (1) TWI290350B (en)

Also Published As

Publication number Publication date
TW200723421A (en) 2007-06-16

Similar Documents

Publication Publication Date Title
JP3376203B2 (en) Semiconductor device, method of manufacturing the same, mounting structure using the semiconductor device, and method of manufacturing the same
US6661089B2 (en) Semiconductor package which has no resinous flash formed on lead frame and method for manufacturing the same
JP3550391B2 (en) Semiconductor device and manufacturing method thereof
US7129576B2 (en) Structure and method of making capped chips including vertical interconnects having stud bumps engaged to surfaces of said caps
TWI379367B (en) Chip packaging method and structure thereof
US6720206B2 (en) Method for manufacturing digital micro-mirror device (DMD) packages
TWI455263B (en) Chip package structure and chip package method
TWI601219B (en) Electronic package and method for fabricating the same
CN100580918C (en) Encapsulation structure capable of reducing encapsulation stress
US20070164447A1 (en) Semiconductor package and fabricating method thereof
JP3547303B2 (en) Method for manufacturing semiconductor device
TW201428905A (en) Semiconductor package substrate and method of forming the same
JP2012009713A (en) Semiconductor package and method of manufacturing the same
TWI290350B (en) Device and method of bonding an image sensor chip to a glass substrate
TW201608685A (en) Package structure and method of manufacture
TWI566343B (en) Chip package having protection piece compliantly attached on chip sensor surface
US20230005813A1 (en) Semiconductor apparatus
JP2005142452A (en) Semiconductor device and its manufacturing method
TWI307148B (en) Chip-on-glass sensor package for preventing its sensor region from contamination of outgassing during curing an encapsulant and method for fabricating the same
JPH0661368A (en) Flip chip type semiconductor device
JP2001007238A (en) Method of packaging wafer-level integrated circuit device
JP2004079685A (en) Method of manufacturing semiconductor device
TW201123316A (en) High air-tightness flip-chip package components and its method for forming the same.
JP4952527B2 (en) Semiconductor device manufacturing method and semiconductor device
TWI228305B (en) Structure of stacked chip packaging structure and manufacture method of the same

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees