TWI267051B - Sparse refresh double-buffering - Google Patents

Sparse refresh double-buffering

Info

Publication number
TWI267051B
TWI267051B TW092101872A TW92101872A TWI267051B TW I267051 B TWI267051 B TW I267051B TW 092101872 A TW092101872 A TW 092101872A TW 92101872 A TW92101872 A TW 92101872A TW I267051 B TWI267051 B TW I267051B
Authority
TW
Taiwan
Prior art keywords
buffering
double
producer
desirable
consumer
Prior art date
Application number
TW092101872A
Other languages
English (en)
Other versions
TW200303517A (en
Inventor
Thomas E Willis
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW200303517A publication Critical patent/TW200303517A/zh
Application granted granted Critical
Publication of TWI267051B publication Critical patent/TWI267051B/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/395—Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/04—Partial updating of the display screen

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Image Input (AREA)
TW092101872A 2002-02-19 2003-01-28 Sparse refresh double-buffering TWI267051B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/079,621 US7038689B2 (en) 2002-02-19 2002-02-19 Sparse refresh double-buffering

Publications (2)

Publication Number Publication Date
TW200303517A TW200303517A (en) 2003-09-01
TWI267051B true TWI267051B (en) 2006-11-21

Family

ID=27733054

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092101872A TWI267051B (en) 2002-02-19 2003-01-28 Sparse refresh double-buffering

Country Status (6)

Country Link
US (1) US7038689B2 (zh)
EP (1) EP1476864A1 (zh)
CN (1) CN1636238B (zh)
AU (1) AU2003208898A1 (zh)
TW (1) TWI267051B (zh)
WO (1) WO2003071517A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI455061B (zh) * 2010-03-31 2014-10-01 Intel Corp 控制框再新的技術

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US20040125283A1 (en) * 2002-12-30 2004-07-01 Samson Huang LCOS imaging device
US7019884B2 (en) * 2003-03-31 2006-03-28 Intel Corporation Light modulator with bi-directional drive
GB2417360B (en) 2003-05-20 2007-03-28 Kagutech Ltd Digital backplane
US7236150B2 (en) * 2003-12-19 2007-06-26 Texas Instruments Incorporated Transferring data directly between a processor and a spatial light modulator
WO2006000476A1 (de) * 2004-06-23 2006-01-05 Siemens Aktiengesellschaft Ansteuerung elektrochromer displays
US7995067B2 (en) * 2007-03-29 2011-08-09 Mobileye Technologies Limited Cyclical image buffer
EP1978484A1 (en) 2007-04-03 2008-10-08 MobilEye Technologies, Ltd. Cyclical image buffer
JP4776592B2 (ja) * 2007-07-09 2011-09-21 株式会社東芝 画像生成装置、画像生成方法および画像生成プログラム
WO2014030037A1 (en) * 2012-08-24 2014-02-27 Freescale Semiconductor, Inc. Display control unit and method for generating a video signal
KR102065564B1 (ko) * 2012-09-05 2020-03-02 에이티아이 테크놀로지스 유엘씨 선택적 디스플레이 리프레시 방법 및 장치
KR101727823B1 (ko) 2015-09-21 2017-04-17 엘지전자 주식회사 영상 처리 장치 및 그의 동작 방법
US10176548B2 (en) * 2015-12-18 2019-01-08 Ati Technologies Ulc Graphics context scheduling based on flip queue management
CN110191536B (zh) * 2019-05-24 2021-11-12 亿信科技发展有限公司 驱动控制电路、驱动控制芯片、集成封装器件、显示系统和稀疏驱动的方法

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JP3316592B2 (ja) * 1991-06-17 2002-08-19 サン・マイクロシステムズ・インコーポレーテッド 二重バッファ・出力ディスプレー・システム、および、第１のフレーム・バッファおよび第２のフレーム・バッファ相互間の切り換えを行う方法
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI455061B (zh) * 2010-03-31 2014-10-01 Intel Corp 控制框再新的技術
US8933951B2 (en) 2010-03-31 2015-01-13 Intel Corporation Techniques for controlling frame refresh

Also Published As

Publication number Publication date
US7038689B2 (en) 2006-05-02
TW200303517A (en) 2003-09-01
EP1476864A1 (en) 2004-11-17
WO2003071517A1 (en) 2003-08-28
CN1636238A (zh) 2005-07-06
AU2003208898A1 (en) 2003-09-09
CN1636238B (zh) 2012-07-04
US20030156083A1 (en) 2003-08-21

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees