1253696 九、發明說明： 【發明所屬之技術領土成】 本發明係有關於/種一極體封裝結構，尤其是一種應 用於無鉛焊錫製程中，有效預防短路與不良之二極體封裝 結構。 【先前技術】 按，發光二極體（LED)已被廣泛應用於各種電子產 品，其具有體積小、高可靠度、可量產、並配合需求製程 各種大型裝置，如發光效率較弱之指示燈、或高強度的資 訊產品及戶外看板、父通號遠專照明燈具。同時，發光二 極體相較於傳統光源，更具有無燈絲、耗電量小、反應速 度快、使用壽命長、無有害物質（如，水銀等）之優點。 習知發光二極體係經由沖壓複數等距相聯之一適於導電的 金屬片支架單元、支架表面電鍍銀層、將發光二極體晶片 固著於該支架上作為光源、分別以導線連接於該支架與該 晶片上形成陰、陽極接腳、再將環氧樹脂封裝於該支架上 形成透光體，以密封該晶片與該導線等程序製成。1253696 IX. INSTRUCTIONS: [Technical Territory of the Invention] The present invention relates to a one-pole package structure, and particularly to a diode package structure which is applied to a lead-free solder process to effectively prevent short circuits and defects. [Prior Art] According to the light-emitting diode (LED), it has been widely used in various electronic products. It has small size, high reliability, mass production, and various large-scale devices in line with the demand process, such as the indication that the luminous efficiency is weak. Lights, or high-intensity information products and outdoor billboards, the father's number of far-reaching lighting. At the same time, the light-emitting diode has the advantages of no filament, low power consumption, fast reaction speed, long service life and no harmful substances (such as mercury) compared with the conventional light source. The conventional light-emitting diode system is formed by electroplating a metal sheet holder unit which is suitable for conducting by stamping a plurality of equidistantly connected substrates, a silver layer is plated on the surface of the holder, and the light-emitting diode chip is fixed on the holder as a light source, and respectively connected by wires The bracket is formed by forming a cathode and an anode pin on the wafer, and then encapsulating the epoxy resin on the bracket to form a light transmitting body to seal the wafer and the wire.
然’歐盟於西元2003年2月13日公告2002/95/EC oHS 才日々（the restriction of the use of certain hazardous substances in electrical and electronic equipment，有害物質 禁用指令），明確要求自西元2006年7月1曰起電子產品 不可含有鉛、鎘、汞等重金屬及溴化物阻燃劑；影響所及， 世界各國皆已開始制訂類似禁令，無船化成為未來電子產 品基本要求，以資訊通信電子製造業而言，錫鉛焊材禁用 5 1253696 對廠商影響最為深遠，其變動包括使用無錯焊錫、電 :等工與傳零::=層_^及_牛内部接點無絡 ⑽⑽師其熔點約在⑻以心而無鉛焊錫^ 產業不同而包括有純錫、錫銀銅桿錫（SnAgCu)、錫" 錫（SnOO、錫銀焊錫（SnAg) #等，其炫點均高於習: 之錫錯焊錫，不僅製程中有關焊錫的相關溫度及 均須做相對應之改變，後續有相關測試與驗‘ 保要求，更重要的是，無料叙㈣速度亦較 錫錯焊錫為快，不但溫度紐適#控制，元件之 亦必，有相關考量；以發光二極體為例，請參閱i-二 不之g知封裝結構，呈隔絕狀態之第—與第二腳位& * :，置於該第-腳位la上之二極體晶粒如、兩兩聯繫 ^極體晶粒^與該第-腳位la以及二腳位厶之打 如與5a、以及同時職該二極體晶粒％、與該第一愈 U與2a之封裝體7a ’倘若當該封裝體％與該 因1二^或该弟二聽2a間有些微缝隙，無錯焊錫會 因其爬錫速度過快而滲人導致短路與元件不良（ 無鉛焊錫滲透至該二極體晶粒3a，或 二腳位2a呈短路狀態。 一邊乐 ^是’發明人有感上述缺失，乃潛心研究並配合學理 提出—種設計合理且廣泛且有效改善上述缺失之 【發明内容】 本發明提供-種防止短路之二極體封裝結構，可延緩 1253696 預防二極體之陰、陽極間互相短 無錯焊錫滲透速度，有效 路之情況 之腳位，有效控制 仙供—種防止短路之二極體封裝結構，係於 ㈣步驟同時形成具層次落差與分離狀. 製程效率與成本。 5 ,、ί發=供—種防止短路之二極體封裝結構，係包括 =一 粒、對應於該二極體晶粒之金屬基材、對 粒之打線、以及封裂該二極體晶粒與該金 其中該金屬基材包括設置有該二極體晶 u、以及與該第一腳位相對應之第二腳位；該 打線聯繫該，晶粒、該第-腳位與該第二腳 t ^ _位與該f二腳位係透過該絕緣材做電性隔 腳位係沿該二極體晶粒周圍凹設有至少-缺 =Γ::她有至少一溝槽;藉此形成具層次落 二二:二腳位，避免因為無料錫的滲入造成 =提供-種防止短路之二體封裝結構之製造方 法，保私括： (a)置備一金屬基板； ㈤賊金躲板㈣第度，形成缺槽與 溝槽， 〜鱼金!ί板钱刻第二預定深度形成分離之該 溝槽係成形於該第二腳位、該缺 槽係成形於该弟一腳位； ⑷設置m晶㈣_1位，形成該缺槽沿 7 1253696 η亥—極體晶粒周圍凹設； ()刀別於5亥*一極體晶粒、該第一腳位與該第-腳 位兩兩之間電性連接有複數打線；以及 ^f)封裝絕緣材以封裝該金屬基板及其該二極體晶 ^弟一與第二腳位係透過該絕緣材做電性隔絕。 =使t審查委員能更進一步瞭解本發明之 ==參:以下有關本發明之詳細說明，然而所記 y奋僅k財考與說明用，並非用來對本發明加以限制 【實施方式】 ，閱第二圖與第三圖所示，係分別為本發明提供之 n構之二_封裝結構之立體示意_側視示意 L該-極體封裝結構包括至少—二極體晶粒1G、對應於 體晶粒1G之金屬基材2G、對應於該二極體晶粒 複數打線30、以及封裝該二極體· 1()與該金屬基材 〇之絶緣材40 ;其中該金屬基材2〇包括設置有該二極體 晶粒ίο之第一腳位21、以及與該第一腳位21相對應之第 腳位22;該打線3〇係分別兩兩聯繫該二極體晶粒1〇、 該第一腳位21與該第二腳位22;該第一腳位以與該第二 腳位22係透過該絕緣材4〇做電性隔絕；該第一腳位 係沿該二極體晶粒10周圍凹設有缺槽21〇;該第二腳位22 係凹设有至少一溝槽220，其中，該第一腳位21之該缺槽 210或該第二腳位22之該溝槽22〇係可呈連續或不連續性 凹$又，其特彳政在於建立構造之該第一與該第二腳位、 22，有效預防因無鉛焊錫的爬錫速率過快而造成的短路； 8 1253696 該缺槽210或該溝槽220之形狀均可自由變化，其可呈U 形或L形之截面；此外，該絕緣材40係由環氧樹脂所製 成，該絕緣材40係可如第二圖所示呈完全包覆該金屬基板 20與該二極體晶粒10,此時，該二極體封裝結構係以該第 一腳位21與該第二腳位22之底面進行焊接；或如第二圖 所示，該絕緣材40可呈完全包覆該二極體晶粒10、以及 部分包覆之該第一與第二腳位21、22，使該第一與第二腳 位21、22外露，則以該第一腳位21與該第二腳位22之外 側面進行焊接。 請參閱第四圖與第五A圖至第五C圖所示，係分別為 本發明提供之該防止短路之二極體封裝結構之製造方法之 流程圖與狀態圖；如第四圖，該製造方法係包括： 置備一金屬基板20 (步驟S100); 於該金屬基板20蝕刻第一預定深度hi，缺槽210 與溝槽220 (步驟S102)，同時參閱第五A圖； 於該金屬基板20蝕刻第二預定深度h2，形成形成 分離之該第一與第二腳位21、22，（步驟S104)，其中該 電極塊222與該溝槽220係成形於該第二腳位22、該缺槽 210係成形於該第一腳位21，同時參閱第五B圖； 設置二極體晶粒10於該第一腳位21，形成該缺槽 21沿該二極體晶粒10周圍凹設之狀態（步驟S106); 分別於該二極體晶粒10、該第一腳位21與該第二 腳位22兩兩之間設置打線30 (步驟S108);以及 封裝絕緣材40以封裝該金屬基板20及其該二極體 晶粒10 ;該第一與第二腳位21、22係透過該絕緣材40做 9 1253696 電性隔絕（步驟S110)。 b請參閱第六圖所示，係為本發明提供之防止短路之一 =㈣結構，應用於複數個二極體日日日粒之立體示 =屬基板20,包括互相對應之第一與第二腳位21，、22，、 弟二與第四腳位23，、24，、以及第五與第六腳位25，、26，， -極體晶粒11’、12’、13’分別設置於該第一、第三與第五 腳位21’、23’與25’ ；其中，該第一、第三與第五腳位21，、 23’與25’具有分別係沿該二極體晶粒n，、12，、13，周圍凹 设之缺槽210、231’與251’，該第二、第四與第六腳位22，、 24’與26’以及凹設有至少一溝槽22〇,、240,與260,；打線 31分別兩兩聯繫该一極體晶粒11 ’、該第一腳位21，與該第 二腳位22’，打線32’分別兩兩聯繫該二極體晶粒12,、該 第三腳位23’與該第四腳位24,，打線33,分別兩兩聯繫該 二極體晶粒13’、該第五腳位25,與該第六腳位26,，絕緣 材40’同時封裝該二極體晶粒1Γ、12,、13，與該金屬基板 20’ ’藉此’該第一與第二腳位21，、22,、該第三與第四腳 位23’、24’、以及該第五與第六腳位25,、26,均透過該封 裝材40’呈絕緣狀態。為可同時應用上述之多個腳位，設 置於居中的第三腳位23,可具有兩延伸臂231，、232’朝兩 側向外延伸。 其中，為增加該絕緣材40,與該金屬基板20’之結合 力，該金屬基板20,係進一步具有至少一穿透孔28’穿設於 其中。其製作方法同第四圖所述，惟於步驟Sl〇4時’同 時於該金屬基板20’姓刻形成該穿透孔28’。 由前述可知，本發明之防土短路之二極體封衣、、、°構之 優點： 10 1253696 l.可延長無鉛焊錫爬行形成，有效預防二極體之陰、 陽極間互相短路之情況；以及 2 .於同一蝕刻步驟形成具層次落差與分離狀之腳 位，有效控制製程效率與成本。 惟以上所述僅為本發明之較佳可行實施例，非因此即 拘限本發明之專利範圍，故舉凡應用本發明說明書或圖式 内容所為之等效結構變化，均同理皆包括於本發明之範圍 内，以保障發明者之權益，於此陳明。 【圖式簡單說明】 第一圖所示，係為習知二極體封裝結構之立體示意圖； 第二圖所示，係為本發明提供之防止短路之二極體封裝結 構之立體示意圖； 第二A圖所示，係為本發明提供之防止短路之二極體封裝 結構之另一實施例之立體示意圖； 第三圖所示，係為本發明提供之防止短路之二極體封裝結 構之侧視不意圖， 第四圖所示，係為本發明提供之防止短路之二極體封裝結 構之流程不意圖， 第五A圖至第五B圖所示，係為本發明提供之金屬基板成 形狀態示意圖； 第六圖所示，係為本發明提供之防止短路之二極體封裝結 構，應用於複數個二極體晶粒之立體示意圖。 【主要元件符號說明】 11 1253696 習知二極體封裝結構 第一聊位 la 第二腳位 2a 二極體晶粒 3a 打線 4a 封裝體 7a "5aHowever, the European Union announced on February 13, 2003, the restriction of the use of certain hazardous substances in electrical and electronic equipment, explicitly requested from July 2006. 1 The electronic products must not contain heavy metals such as lead, cadmium and mercury, and bromide flame retardants; as a result, countries around the world have begun to formulate similar bans, and shiplessness has become the basic requirement for future electronic products. In terms of banned tin-lead solder material 5 1253696 has the most profound impact on manufacturers, including changes in the use of error-free solder, electricity: work and zero:: = layer _ ^ and _ cattle internal contact no network (10) (10) division of its melting point In the (8) heart-free lead-free solder ^ industry, including pure tin, tin-silver-copper tin (SnAgCu), tin " tin (SnOO, tin-silver solder (SnAg) #, etc., the highlights are higher than Xi: Tin soldering, not only the relevant temperature of the solder in the process, but also the corresponding changes must be made, followed by relevant tests and inspections, and more importantly, the speed of the material is also faster than tin solder. Not only the temperature New Zealand control, but also the components, there are related considerations; for the light-emitting diode as an example, please refer to the i-two not know the package structure, the first state of the isolated state - and the second pin & * :, the diode crystal grains placed on the first-pin position la, such as the two-two contact body pattern ^ and the first-foot position la and the two-legged position, and the same as 5a, and concurrently % of the diode grains, and the package 7a of the first U and 2a'. If there is a slight gap between the package % and the factor 2 or the second 2a, the error-free solder will climb due to it. The tin speed is too fast and the infiltration leads to short circuit and poor component (the lead-free solder penetrates into the diode die 3a, or the second pin 2a is short-circuited. The side of the music is the 'inventor who feels the above-mentioned deficiency, is painstaking research and The invention provides a reasonable and widely designed and effective improvement of the above-mentioned defects. SUMMARY OF THE INVENTION The present invention provides a diode package structure for preventing short circuit, which can delay 1253696 to prevent short and error-free soldering between the anode and the anode of the diode. Penetration speed, the position of the effective road, effective control of the supply of the species The diode package structure is formed in step (4) at the same time to form a layered drop and separation. Process efficiency and cost. 5 ,, ί hair = supply - kind of diode package structure to prevent short circuit, including = one grain, corresponding And the metal substrate of the diode die, the bonding of the particles, and the sealing of the diode die and the gold, wherein the metal substrate comprises the diode crystal u, and the first leg a second pin corresponding to the bit; the wire is associated with the die, the first leg and the second leg t ^ _ bit and the f pin are transmitted through the insulating material as an electrical spacer The recess around the diode is at least-deficient = Γ:: she has at least one groove; thereby forming a layer of falling two: two feet, avoiding the infiltration of no tin; providing - preventing short circuit The manufacturing method of the two-body package structure is: (a) preparing a metal substrate; (5) thief gold hiding board (four) degree, forming a missing groove and a groove, ~ fish gold! 板 plate money engraved the second predetermined depth to form separation The groove is formed on the second leg, and the notch is formed on the first leg; (4) the m crystal (four)_1 position is set Forming the notch along 7 1253696 η hai—the periphery of the polar body die is recessed; () the knife is different from the 5 hai* one-pole die, and the first pin and the first pin are electrically connected And a plurality of wires are wound; and the insulating material is encapsulated to encapsulate the metal substrate and the diode and the second pin are electrically insulated from the insulating material. The following is a detailed description of the present invention, but it is not intended to limit the invention. [Embodiment] 2 and 3 are respectively a perspective view of the n-package structure provided by the present invention. The side view shows the L-pole package structure including at least the diode die 1G, corresponding to a metal substrate 2G of the bulk crystal 1G, a plurality of wires 30 corresponding to the diode die, and an insulating material 40 encapsulating the diode 1() and the metal substrate; wherein the metal substrate 2〇 The first pin 21 provided with the diode die ίο and the first pin 22 corresponding to the first pin 21; the wire 3 is respectively connected to the diode die 1两The first pin 21 and the second pin 22; the first pin is electrically insulated from the second pin 22 through the insulating material 4; the first pin is along the dipole The second die 22 is recessed with at least one groove 220, wherein the first pin 21 has the notch 21 0 or the groove 22 of the second foot 22 can be continuous or discontinuous, and the special rule is to establish the first and the second position of the structure, 22, effectively preventing lead-free The short circuit caused by the soldering rate of the solder is too fast; 8 1253696 The shape of the notch 210 or the groove 220 can be freely changed, and can be U-shaped or L-shaped; in addition, the insulating material 40 is a ring The insulating material 40 is formed to completely cover the metal substrate 20 and the diode die 10 as shown in the second figure. At this time, the diode package structure is the first leg. The bit 21 is soldered to the bottom surface of the second pin 22; or as shown in the second figure, the insulating material 40 may completely cover the diode die 10 and partially cover the first and second portions When the first and second legs 21, 22 are exposed, the first and second legs 21, 22 are welded to the outer sides of the second leg 22. Please refer to FIG. 4 and FIG. 5A to FIG. 5C , which are respectively a flow chart and a state diagram of a method for manufacturing the short-circuit proof diode package provided by the present invention; as shown in FIG. 4 , The manufacturing method includes: preparing a metal substrate 20 (step S100); etching the first predetermined depth hi, the notch 210 and the trench 220 in the metal substrate 20 (step S102), and referring to FIG. 5A; The second predetermined depth h2 is etched to form the separated first and second legs 21, 22 (step S104), wherein the electrode block 222 and the trench 220 are formed on the second pin 22, The notch 210 is formed on the first pin 21, and is also referred to in FIG. 5B. The diode die 10 is disposed on the first pin 21, and the notch 21 is formed to be recessed around the die die 10. a state (step S106); respectively, a wire 30 is disposed between the diode die 10, the first pin 21 and the second pin 22 (step S108); and the insulating material 40 is packaged The metal substrate 20 and the diode die 10; the first and second legs 21, 22 are through the insulating material 40 for 9 12536 96 is electrically isolated (step S110). b Please refer to the sixth figure, which is a structure for preventing short circuit=(4) provided by the present invention, and is applied to a plurality of diodes for day-to-day granules, and is a substrate 20, including first and second corresponding to each other. Two-legged positions 21, 22, 2nd and 4th, 23, 24, and 5th and 6th, 25, 26, - pole body grains 11', 12', 13' respectively Provided in the first, third, and fifth legs 21', 23', and 25'; wherein the first, third, and fifth legs 21, 23', and 25' have respective poles The body grains n, 12, 13 are surrounded by recessed grooves 210, 231' and 251', and the second, fourth and sixth legs 22, 24' and 26' and the recess are provided with at least one The trenches 22A, 240, and 260, and the bonding wires 31 are respectively connected to the one-pole die 11', the first pin 21, and the second pin 22', and the wire 32' are respectively connected by two The diode die 12, the third pin 23' and the fourth pin 24, and the wire 33 are respectively connected to the diode die 13' and the fifth pin 25, and The sixth pin 26, the insulating material 40' encapsulates the two at the same time Body grains 1Γ, 12, 13 and the metal substrate 20'' by the first and second feet 21, 22, the third and fourth feet 23', 24', and The fifth and sixth legs 25, 26 are all insulated from the package 40'. In order to simultaneously apply the plurality of feet described above, the third leg 23 disposed in the center may have two extending arms 231, 232' extending outwardly toward both sides. In order to increase the bonding force of the insulating material 40 and the metal substrate 20', the metal substrate 20 further has at least one through hole 28' penetrating therein. The manufacturing method is the same as that of the fourth figure, but the penetration hole 28' is formed on the metal substrate 20' at the same time as the step S1. It can be seen from the foregoing that the advantages of the anti-soil short-circuiting diode sealing and the structure of the invention are as follows: 10 1253696 l. The lead-free solder creep formation can be prolonged, and the cathode and anode short-circuit between the anodes can be effectively prevented; And 2. Forming a level difference and separation in the same etching step, effectively controlling process efficiency and cost. However, the above description is only a preferred embodiment of the present invention, and thus the scope of the present invention is not limited thereto, and the equivalent structural changes of the present specification or the drawings are all included in the present invention. Within the scope of the invention, to protect the rights and interests of the inventors, Chen Ming. BRIEF DESCRIPTION OF THE DRAWINGS The first figure is a perspective view of a conventional diode package structure; the second figure is a perspective view of a diode package structure for preventing short circuit provided by the present invention; 2 is a perspective view of another embodiment of the diode package structure for preventing short circuit provided by the present invention; the third figure is a diode package structure for preventing short circuit provided by the present invention. The side view is not intended, and the fourth figure is a flow of the diode package structure for preventing short circuit provided by the present invention, and the fifth substrate to the fifth B diagram are the metal substrates provided by the present invention. Schematic diagram of the forming state; FIG. 6 is a perspective view of a diode package structure for preventing short circuit provided by the present invention, which is applied to a plurality of diode grains. [Main component symbol description] 11 1253696 Conventional diode package structure First chat la Second pin 2a Diode die 3a Wire 4a Package 7a "5a
本發明提供之防止短路之二極體封裝結構 二極體晶粒 10、11，、 12’ 、13， 金屬基材 20、20’ 打線 30、31，、 32’ 、33， 絕緣材 40、40’ 第一腳位 21、21， 缺槽 210、210, 、231，、251， 第二腳位 22、22’ 溝槽 220、220, 、240， 、260， 電極塊 222、222, 、242，、262， 第三腳位 23， 延伸臂 231’ 、232， 第四腳位 24， 第五腳位 第六腳位 26， 穿透孔 第一預定深度 hi 第二預定深度 25, 28 h2 12The invention provides a diode package 10, 11, 12', 13 for preventing short circuit, and a metal substrate 20, 20', a wire 30, 31, 32', 33, an insulating material 40, 40 'First pin 21, 21, slot 210, 210, 231, 251, second pin 22, 22' groove 220, 220, 240, 260, electrode block 222, 222, 242, 262, third pin 23, extension arm 231', 232, fourth pin 24, fifth leg sixth leg 26, penetration hole first predetermined depth hi second predetermined depth 25, 28 h2 12