1253581 九、發明說明： 【發明所屬之技術領域】 ^-種PS/2鍵盤系、統’特別係指一種應用於可程式邏輯陣 列^組(FPGAmodule)領域，將硬體描述語言(VHDL)編譯程式 執行於可程式邏輯卩車列晶#巾，藉此使_與電駐機之間可 進行安全資料交握處理的鍵盤系統。 【先前技術】 匕關於電腦主機10的控制，一般都係透過外部的鍵盤 下私令來達成的，而不論是軟式鍵盤(s〇ftkey)或者是硬式鍵盤 key)的指令處理方式大多是由電腦主機1〇對鍵盤2〇進 订掃瞄，來確認使用者透過鍵盤2〇所按壓之輸入指令，然後 再將所輸入指令傳送到電腦主機1〇上進行對電腦主機1〇的控 制。 一以目前常見的習知PS/2鍵盤系統而言，如「第1A圖」 所示，都係採取將電腦主機1〇與鍵盤2〇直接透過ps/2介面 作連接，所有電腦主機10與鍵盤2〇之間的資料處理動作都係 ^鍵盤20中的硬體來負責完成的，由於此種設計並無統一的 標準可供遵循，因此在各家廠牌各自發展的前提之下，使得以 往鍵盤系統之間彼此的相容性相當的低，一旦相容性出現問題 的話二特別係在一些需求高操作精密度的應用上(如：飛航系 統)=尤很有可能引起重大的影響，而為了改善鍵盤系統之間的 相容性問題，往往就必須花費相當多的時間和人力成本來解 決，造成許多額外的困擾。 夕此外，這些習知PS/2鍵盤系統，在關於控制訊號的部分 大多係採取由軟體程式的方式來實現的，由於軟體程式係屬於 二種非同步的處理機制，因此非常容易在與其他系統發生衝突 =產生=可預期的中斷處理，因此對於像是飛航系統這類需求 南才呆作安全度的應用上，將產生極大的不穩定性。再加上由於 1253581 費時，並且不僅在認證程序上相當曠曰 體的修改，才能斤擴充上往往還必須同時搭配對硬 加時，以往‘鍵盤系 2〇 盤系統所實現的功能來看，過去鍵盤 之如此將使得鍵盤20與電腦主機1〇 所述之飛二藏有許多安全上的問題’特別是在如前 應㈣ps/2鍵盤祕，更是不能夠有任 【發明内容】 利f11於以上㈣題，本發明提供―種聊鍵«统，係 ^腦===轉換為電腦主機可執行之對應指令，以進行 -封ϊί要於，同時能夠對電腦主機所傳送之-指 統與電腦主機之間安全資料交握處理的主要目白t。 系 處理可硬大體大方 硬體尸^ =可靠度，並且相當容易進行鍵盤系^體=提u* 發明之達成功效所在。 a聪、似’此為本 V、r f t ’為達上述目的，本發明所揭露之鍵盤系統包含可r 可程式邏輯陣列晶片中執行有硬體描述語言 1253581 含有下列功能方塊： 頻方式負f妾收石英震M器之輸入頻率，以除 玍糸'、先中所需之各種不同的工作時脈。 系根據電腦主機所傳送之控制訊號來確認、 態時處於接收狀態，然後當系統處於傳送狀 狀i時負碼模組’而#系統處於接收 覆。、、來自電月®主機之指令以產生對應指令作為回 耸幸f換模組’負責當系統處於傳送狀態日夺，開始持續 對^之^^ ό當接㈣難喊時，貞責將_訊號轉換為 掃’可於處理資料量較大時，用來暫存對應指令、 j5)偵錯模組，主要係於系統處於接收狀態時，負 自電腦主機所發出之指令封包進行自我债錯。、、 $6)編/解補組，負責於系統處於傳送狀態時摘轉存之對 =令 ^?描碼並結合工作時脈以產生#料封包傳送至電腦 η私^或於系統處於接收狀態時將接收自偵錯模組之指令 返原為指令。 ^本剌的·與實作，舰合圖補最佳實施例詳細 况月如下。（為使對本發明的目的、構造、特徵、及其功能有 進一步的瞭解，茲配合實施例詳細說明如下。） 【實施方式】 本發明PS/2鍵盤系統的運作示意圖，如「第1Β圖」所 示，包括兩個主要部分： ⑴鍵盤20，此為一般習知技術(如：㈣鍵盤），此鍵盤 20主要透過鍵盤介面31與可程式邏輯陣列模組3〇連接。 (2)可程式邏輯陣列模組30(FPGA module)，透過pS/2介 面32與電腦主機1〇連接，整體架構可如「第4圖」所示。 1253581 言式邏輯陣列晶片33中具有執行硬體描述語 鍵般季㈣彳’為本發明主要技術特徵所在，可實現Ps/2 之石產生她別，負責將自可程式邏輯陣列模組30中 式，產ίίΓ絲3If操取之輸入頻率(1·843ΜΗζ)透過除頻方 ^糸、、、先中其他各個模組單元所需之工作時脈。 #⑷flf控制模組32G，負責接收來自電腦主機ig之控制訊 ί否 PS/2傳輸協定之規範· 疋否处於傳送狀您？或者處於接收狀態？ _ ί系統係處於傳送狀態時，便負責將原本儲存於暫存模纽 34〇中的掃描碼傳送給編/解碼模組35()。 f仔稹、、 340 收狀態時’則負責接收暫存於暫存模組 拖電腦主機1〇所發送之指令封包所轉 =乍則中）’並產生對應指令回傳給電腦主機 ㈣ΪΪ系統狀態確認的依據’主要係根據狀態控制模組3卻 ^接收來自電腦主機10所傳送之控制訊號而定，因此狀態控 制板組320在系統運作過程中會一直持續保持與電腦主機ι〇 ，間的溝通’惟此屬於PS/2標準規範所定義的部分，在 1不 多做贅述。 c.掃描轉換模組33〇，主要係在ps，2鍵盤系統處於傳送狀 恶日守進行運作。 此時狀態控制模組320會開始一直等待鍵盤訊號(即等待 使用者輸入）’若使用者按壓鍵盤20時便會產生鍵盤訊號傳回 給掃描轉換模組33G，當接收到鍵盤訊號時，則本掃描轉換模 組330便會負責將鍵盤訊號轉換為對應之掃描去' 常會暫存於暫存模組340中）。 ，_出舌(通 在掃描轉換模組330的細部運作中，還包含兩個部分(如 1253581 第3A圖」所示）：一是消除彈跳訊號單元331，主要係負責 接收4述之鍵盤訊號並消除鍵盤訊號之機械彈跳訊號以產生 輸^矾號，藉此可降低接收到錯誤或者不必要的鍵盤訊號；另 厂是掃描碼產生單元332,儲存有對應表格(記錄有輸入訊號| ^描碼之間的對照關係），負責根據對應表格將消除彈跳訊號 早兀331所傳入之輸入訊號轉換為對應之掃描碼送出。 b f·暫存模組340，主要係在PS/2鍵盤系統處於傳送狀能 呀，負責暫存來自狀態控制模組32〇的對應指令，或者是來^ 換模組330的掃描碼(此乃因為某些時間點上可能 $盤20輸入的鍵盤訊號過多，所產生之掃描碼也隨之增加 許=，在未能夠即時透過編/解碼模組35〇加以處理之前， 以先將J生之掃描碼暫存於此，可避免產生掃描碼的遺 PS/2鍵盤系統處於接收狀態時，則負責暫 解碼模組350所處理還原後的指令。 、、 、、、 運作通常此暫存模組3則錄取先進先_吻的運作機制來 e·編/解碼模組350，負責資料封句以芬社人 PS/2鍵盤系統處於傳送狀態時^係 組340擷取出先前所暫存之對應指令或者=无 由時脈產生模組310所傳送來的工作時 田H、，、。合 電腦主機1G之資料封包，再傳送給電购生可傳送至 而當PS/2鍵盤系統處於接收狀態時 拉組360所傳送來的指令封包，將其 將由偵錯 傳送至暫存模組340。 、^原為原先的指令在 其中，編/解碼模組350細部的運你&广 部分(如「㈣圖」所示）：-是轉碼H j包含兩個 傳送狀態時，負責接收對應指令或者θ ^主要係運作在 機10可辨識及執行之轉換碼；另並轉換為電腦主 1253581 樣應式進行傳 門進行安l;」·3!。鱗彳· Ps/2 _祕與電齡機ίο之 間進㈣交握的最主要特徵技_容所在。 自電腦主機1G指令的正確性，在_ r日士 : I，錯板、组360，可以在Ps/2鍵盤系統處於接收狀 悲時’主動對電腦主機1()所傳大 續，處理錯誤的發生機率曰二幅提昇 PS/2鍵i系統的安全性及穩定性。 斗女弟圖」所不，在可程式邏輯陣列模組30上還設 ίΐ過下4，可根據此體記憶體34的狀態來決 ^透過下載〃面35進行下載硬》述語言編譯程式的下載模 田EPC2圮憶體34處於致能(enable)狀態時可透過JATg 晶片36來進行下載的動作。此種下載模式，即是自下載 35中將魏描述語言編譯程式先下載至肌2記憶體％中， 再由EPC2記憶體34轉載至可程式邏輯陣列晶片33中執行； 或者當EPC2記憶體34處於除能(disable)狀態時，則將直接自 下載介面35中將硬體描述語言編譯程式載入至可程式邏輯 列晶片33中執行。 雖然本發明以前述之較佳實施例揭露如上，然其並非用以 限疋本發明，任何熟習相像技藝者，在不脫離本發明之精神和 範圍内，當可作些許之更動與潤飾，因此本發明之專利保護範 圍須視本說明書所附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1A圖為習知PS/2鍵盤系統運作示意圖； 第1B圖為本發明ps/2鍵盤系統運作示意圖； 10 1253581 第2圖為本發明ps/2鍵齡統之硬體描述語言編譯程式方 圖； & ，3A圖為本發明PS/2鍵盤系統之掃瞄轉換模組細部方塊圖，· 第3B圖為本發明PS/2鍵盤系統之編/解碼模組細部方塊圖； 及 第4圖為本發明pS/2鍵盤系統之可程式邏輯陣列模組示意圖。 【主要元件符號說明】 10 電腦主機 20 鍵盤 30 可程式邏輯陣列模組 31 鍵盤介面 32 PS/2介面 33 可程式邏輯陣列晶片 34 EPC2記憶體 35 下載介面 36 XATG晶片 37 石英震盪器 310 時脈產生模組 320 狀態控制模組 330 掃瞄轉換模組 331 消除彈跳訊號單元 332 掃瞄碼產生單元 340 暫存模組 350 編/解碼模組 360 偵錯模組 351 轉瑪單元 352 封包單元1253581 IX. Description of the invention: [Technical field to which the invention pertains] ^-PS/2 keyboard system, system specifically refers to a field of programmable logic array (FPGA module), which compiles hardware description language (VHDL) The program is executed on a programmable logic router, which enables a keyboard system for safe data handling between the _ and the electric parking. [Prior Art] The control of the host computer 10 is generally achieved through an external keyboard, and the command processing method of either the soft keyboard (s〇ftkey) or the hard keyboard key is mostly performed by a computer. The host computer 1 scans the keyboard 2 to confirm the input command pressed by the user through the keyboard 2, and then transfers the input command to the computer host 1 to control the computer host 1 . In the current common PS/2 keyboard system, as shown in "1A", the computer host 1〇 and the keyboard 2〇 are directly connected through the ps/2 interface, all the computer hosts 10 and The data processing operations between the keyboards 2 are responsible for the hardware in the keyboard 20, and since there is no uniform standard for this design to be followed, it is made under the premise of the development of each brand. In the past, the compatibility between keyboard systems was rather low. Once the compatibility problems occurred, the two systems were particularly useful in applications requiring high operational precision (eg, flight systems). In order to improve the compatibility between keyboard systems, it usually takes a considerable amount of time and labor to solve, causing many additional problems. In addition, these conventional PS/2 keyboard systems, in the part about the control signal, are mostly implemented by software programs. Because the software programs belong to two kinds of asynchronous processing mechanisms, it is very easy to interact with other systems. Conflicts occur = generation = predictable interrupt handling, so there is a great deal of instability for applications such as the flight system that require security. In addition, because of the time-consuming 1255589, and not only the modification of the authentication process, but also the modification of the authentication process, it is often necessary to match the hard-added time. In the past, the function of the keyboard system is the past. The keyboard will cause the keyboard 20 and the computer host 1 to hide a lot of security problems, especially in the previous (four) ps/2 keyboard secret, it is not able to have any [invention content] In the above (4) question, the present invention provides a type of chat key «system, the system ^ brain === is converted into a corresponding command executable by the computer host, to perform - the seal is required, and can be transmitted to the host computer - The main purpose of the security data handling between computer hosts is t. The system can handle hard and generous hard body ^= reliability, and it is quite easy to carry out the function of the keyboard system. A Cong, like 'this is V, rft' for the above purpose, the keyboard system disclosed in the present invention comprises a programmable logic array chip executed in the hardware description language 1253581 with the following functional blocks: Frequency mode negative f妾The input frequency of the quartz oscillator M is used to remove the various working clocks required by 玍糸'. It is confirmed according to the control signal transmitted by the host computer, and is in the receiving state when the state is in the state of transmission, and then the system is in the receiving state when the system is in the transmission state i. , from the electric moon ® host command to generate the corresponding command as a return to the towering f change module 'responsible when the system is in the state of transmission, the beginning of the ^ ^ ^ ό 接 ( (4) difficult to shout, blame _ The signal conversion to sweep can be used to temporarily store the corresponding command, j5) debug module when the amount of data is large, mainly when the system is in the receiving state, and the command packet sent from the host computer is self-debt. . , , $6) edit/replenishment group, responsible for the transfer of the pair when the system is in the transfer state, and the combination of the work code and the work clock to generate the # packet to the computer η private ^ or the system is receiving state The instruction received from the debug module is returned to the command. ^Ben's · and implementation, the best example of the ship's joint diagram is as follows. (In order to further understand the object, structure, features, and functions of the present invention, the following detailed description will be given in conjunction with the embodiments.) [Embodiment] A schematic diagram of the operation of the PS/2 keyboard system of the present invention, such as "Picture 1" The figure includes two main parts: (1) A keyboard 20, which is a conventional technique (such as a (4) keyboard). The keyboard 20 is mainly connected to the programmable logic array module 3 through the keyboard interface 31. (2) The programmable logic array module 30 (FPGA module) is connected to the host computer via the pS/2 interface 32. The overall architecture can be as shown in Fig. 4. The 1253581 speech logic array chip 33 has the implementation of the hardware descriptor key season (four) 彳 ' is the main technical features of the invention, can achieve the Ps/2 stone generation, responsible for the self-programmable logic array module 30 Chinese The input frequency (1·843ΜΗζ) of the operation of ίίΓ丝3If is transmitted through the frequency division, the first working clock of each module unit. #(4)flf control module 32G, responsible for receiving control signals from computer host ig 否 No PS/2 transmission protocol specifications · Are you in transit? Or is it receiving? When the system is in the transfer state, it is responsible for transmitting the scan code originally stored in the temporary memory module 34 to the encoding/decoding module 35(). f 稹,, 340, when receiving status, 'is responsible for receiving temporary storage in the temporary module dragging the computer host 1 〇 sent by the instruction packet = 乍 ))) and generating the corresponding command back to the computer host (four) ΪΪ system status The basis of the confirmation is mainly based on the state control module 3 receiving the control signal transmitted from the host computer 10, so the state control panel group 320 will continue to remain with the host computer during the operation of the system. Communication 'is only part of the PS/2 standard specification, and no more details are given in 1. c. The scan conversion module 33 is mainly operated in the ps, 2 keyboard system in the transmission state. At this time, the state control module 320 will start to wait for the keyboard signal (ie, wait for the user to input). When the user presses the keyboard 20, the keyboard signal is generated and sent back to the scan conversion module 33G. When the keyboard signal is received, The scan conversion module 330 is responsible for converting the keyboard signal into a corresponding scan, which is often temporarily stored in the temporary storage module 340. The _ tongue is out (in the detailed operation of the scan conversion module 330, there are two parts (such as shown in Fig. 123581, Figure 3A)): First, the bounce signal unit 331 is eliminated, which is mainly responsible for receiving the keyboard signals of 4 And eliminating the mechanical bouncing signal of the keyboard signal to generate the input signal number, thereby reducing the received error or unnecessary keyboard signal; the other is the scan code generating unit 332, storing the corresponding table (recording the input signal | The control relationship between the codes is responsible for converting the incoming input signal of the bounce signal 331 to the corresponding scan code according to the corresponding table. bf. The temporary storage module 340 is mainly located in the PS/2 keyboard system. The transfer mode can be used to temporarily store the corresponding command from the state control module 32, or to change the scan code of the module 330 (this is because at some point in time, there may be too many keyboard signals input by the disk 20, The generated scan code is also increased. If the scan code is not temporarily processed by the encoding/decoding module 35, the scan code of J is temporarily stored therein, thereby avoiding the generation of the scan code PS/2. Keyboard system In the receiving state, it is responsible for the restored command processed by the temporary decoding module 350. , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Responsible for the data sealing sentence when the Fenshe PS/2 keyboard system is in the transmitting state, the system group 340 takes out the previously stored corresponding command or = the working time H, which is transmitted by the clock generating module 310, The data packet of the computer host 1G is transmitted to the electricity purchaser and can be transmitted to the instruction packet transmitted by the group 360 when the PS/2 keyboard system is in the receiving state, and will be transmitted from the debugging to the temporary storage module. 340. The original command is in the original command, and the edit/decode module 350 details the you and the wide part (as shown in "(4)"): - is the transcode H j contains two transfer states, responsible for Receiving the corresponding command or θ ^ mainly depends on the conversion code that can be recognized and executed by the machine 10; and the other is converted into the computer main 1253581 sample type for the door to carry out the security; "·3!. scales · Ps/2 _ secret The most important feature of the (4) handshake with the electric age machine ίο. The correctness of the 1G command from the computer host, in _r 日士: I, wrong board, group 360, can be used when the Ps/2 keyboard system is in the receiving state of sorrow's initiative to the host computer 1 () The probability of occurrence is two to improve the security and stability of the PS/2 key i system. The girl map is not set, and the programmable logic array module 30 is also provided with a lower 4, according to the body memory. The status of 34 is determined by the downloading of the face 35. When the downloading of the language compiling program is completed, the download mode can be downloaded through the JATg chip 36 when the mode field EPC2 memory device 34 is in the enable state. Such a download mode, that is, downloading the Wei description language compiling program from the download 35 to the muscle 2 memory%, and then transferring it from the EPC2 memory 34 to the programmable logic array chip 33; or when the EPC2 memory 34 is When in the disable state, the hardware description language compiler is loaded directly from the download interface 35 into the programmable logic column wafer 33 for execution. While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the scope of the present invention, and it is possible to make some modifications and refinements without departing from the spirit and scope of the invention. The patent protection scope of the present invention is defined by the scope of the patent application attached to the specification. [Simple diagram of the diagram] Figure 1A is a schematic diagram of the operation of the conventional PS/2 keyboard system; Figure 1B is a schematic diagram of the operation of the ps/2 keyboard system of the present invention; 10 1253581 Figure 2 is a hard ps/2 key age of the present invention Body description language compiler program diagram; & 3A diagram is a detailed block diagram of the scan conversion module of the PS/2 keyboard system of the present invention, · FIG. 3B is a detail of the encoding/decoding module of the PS/2 keyboard system of the present invention Block diagram; and Figure 4 is a schematic diagram of a programmable logic array module of the pS/2 keyboard system of the present invention. [Main component symbol description] 10 Computer host 20 Keyboard 30 Programmable logic array module 31 Keyboard interface 32 PS/2 interface 33 Programmable logic array chip 34 EPC2 memory 35 Download interface 36 XATG chip 37 Quartz oscillator 310 Clock generation Module 320 state control module 330 scan conversion module 331 elimination bouncing signal unit 332 scan code generation unit 340 temporary storage module 350 encoding / decoding module 360 debugging module 351 rotating unit 352 packet unit