CN115906742A - Digital-analog hybrid simulation system, method, electronic device and storage medium - Google Patents

Digital-analog hybrid simulation system, method, electronic device and storage medium Download PDF

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CN115906742A
CN115906742A CN202211482938.2A CN202211482938A CN115906742A CN 115906742 A CN115906742 A CN 115906742A CN 202211482938 A CN202211482938 A CN 202211482938A CN 115906742 A CN115906742 A CN 115906742A
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digital
analog signal
analog
behavior model
signal
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周恩辉
刘�文
赵文广
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Beijing CEC Huada Electronic Design Co Ltd
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Beijing CEC Huada Electronic Design Co Ltd
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Abstract

The invention relates to the technical field of digital-analog hybrid simulation, and provides a digital-analog hybrid simulation system, a method, an electronic device and a storage medium, wherein the system comprises: the input and output behavior model is used for realizing signal transmission between the digital-analog hybrid simulation system and the outside; the system comprises at least one analog signal processing behavior model and at least one analog signal processing behavior model, wherein the at least one analog signal processing behavior model is used for processing analog signals, and the input/output behavior model and the at least one analog signal processing behavior model are both behavior models written by a hardware description language; each analog signal processing behavior model in the input/output behavior model and the at least one analog signal processing behavior model is instantiated with an analog signal receiving and transmitting unit, and the analog signal receiving and transmitting units are used for realizing the interconversion between analog signals and digital signals. The invention can transmit analog signals among different behavior models of the system, and is beneficial to comprehensively and quickly verifying all functions of digital logic at the early stage of chip design.

Description

Digital-analog hybrid simulation system, method, electronic device and storage medium
Technical Field
The invention relates to the technical field of digital-analog hybrid simulation, in particular to a digital-analog hybrid simulation system, a digital-analog hybrid simulation method, electronic equipment and a storage medium.
Background
With the continuous development of the semiconductor integrated circuit industry, electronic products have been applied to the social aspect, and the functions are more and more complex, and the area of the chip is more and more large, so that the difficulty of designing and verifying the chip is increased, and the cycle is prolonged.
Digital-analog mixed simulation verification is used as an important process of chip verification, the digital-analog signal interaction problem after the digital circuit and the analog circuit are integrated can be effectively checked, and the normal functions of the digital circuit and the analog circuit under various working scenes are guaranteed.
The digital-analog hybrid simulation system generally comprises various different behavior models, however, the traditional digital-analog hybrid simulation system cannot transmit analog signals between the behavior models, so that the behavior models for processing the analog signals and the signal interaction between the behavior model for processing the analog signals and the behavior model for receiving and transmitting digital signals cannot be verified, and the comprehensive and accurate verification of the functions of a digital circuit and an analog circuit under various working scenes cannot be ensured.
Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.
Disclosure of Invention
In order to solve the above technical problems, the present invention provides a digital-analog hybrid simulation system, method, electronic device and storage medium, which can transmit analog signals between different behavior models of the system, and facilitate the early, comprehensive and fast verification of all functions of digital logic in chip design, and have the characteristics of flexible configuration, convenient use and wide application.
According to a first aspect of the present invention, there is provided a digital-analog hybrid simulation system, comprising:
the input and output behavior model is used for realizing signal transmission between the digital-analog hybrid simulation system and the outside;
at least one analog signal processing behavior model for processing analog signals,
wherein the input-output behavioral model and the at least one analog signal processing behavioral model are both behavioral models written in a hardware description language;
and each analog signal processing behavior model in the input/output behavior model and the at least one analog signal processing behavior model is instantiated with an analog signal receiving and transmitting unit, and the analog signal receiving and transmitting unit is used for realizing the interconversion between an analog signal and a digital signal.
Optionally, the digital-analog hybrid simulation system further includes:
and the digital logic behavior model is respectively connected with the input/output behavior model and the at least one analog signal processing behavior model and is used for carrying out logic operation on the received digital signals.
Optionally, the analog signal transceiving unit serially transfers the digital signal and the analog signal based on a form of a digital sequence.
Optionally, the analog signal transceiving unit includes:
the clock generation module is used for generating a reference clock signal;
the signal sending module is used for converting the analog signal into a digital sequence and sending the digital sequence;
and the signal receiving module is used for receiving the digital sequence and converting the received digital sequence into an analog signal.
Optionally, the signal sending module includes:
a sequence encoding unit for encoding the analog signal into a digital sequence;
and the sequence transmitting unit is used for transmitting the digital sequence obtained by coding at the falling edge of the reference clock signal.
Optionally, the signal receiving module includes:
a sequence receiving unit for sampling a digital sequence at a rising edge of the reference clock signal;
and the sequence decoding unit is used for decoding the sampled digital sequence into an analog signal.
Optionally, the analog signal transceiver unit further includes:
and the registering module is used for storing the analog signal output by the signal receiving module.
Optionally, the digital sequence comprises a start period, a start frame, a data frame, and an end period;
the signal sending module is used for coding the analog signal after the signal sending module represents that the stable mark signal of the analog signal to be sent is effective and the fluctuation of the analog signal to be sent exceeds a certain range;
and the signal receiving module decodes the received digital sequence after the received digital sequence is pulled up and registers the analog signal successfully received last time by the signal receiving module.
Optionally, the clock generating module generates the reference clock signal after the corresponding received or transmitted digital sequence is pulled high, and stops generating the reference clock signal after the corresponding received or transmitted digital sequence is pulled low.
According to a second aspect of the invention, a building method of a digital-analog hybrid simulation system is provided, which comprises the following steps:
writing an input/output behavior model and at least one analog signal processing behavior model by using a hardware description language, wherein the input/output behavior model and the at least one analog signal processing behavior model are used for realizing the functions and behaviors of an input/output circuit and an analog signal processing circuit;
writing an analog signal transceiving unit by using a hardware description language, wherein the analog signal transceiving unit is used for realizing the interconversion between an analog signal and a digital signal;
instantiating the analog signal transceiving unit using the input-output behavioral model and the at least one analog signal processing behavioral model to enable transfer of analog signals between different behavioral models based on the analog signal transceiving unit.
Optionally, the method further comprises:
and writing a digital logic behavior model respectively connected with the input and output behavior model and the at least one analog signal processing behavior model by using a hardware description language so as to realize logic operation processing on the digital signals.
According to a third aspect of the present invention, there is provided a digital-analog hybrid simulation method, comprising:
transmitting digital signals and/or analog signals received from the outside of the chip to at least one analog signal processing behavior model in the chip by using the input and output behavior model;
processing the received analog signals by using the at least one analog signal processing behavior model, and outputting corresponding analog signals according to the processing result;
transmitting the analog signals received from the at least one analog signal processing behavior model to the chip environment using the input-output behavior model,
wherein the input-output behavioral model and the at least one analog signal processing behavioral model, when transmitting signals, comprise: and calling an analog signal receiving and transmitting unit to convert the analog signal to be transmitted into a digital signal and then transmit the digital signal, and/or convert the received digital signal into an analog signal.
Optionally, the digital-analog hybrid simulation method further includes:
the input and output behavior model is used for sending digital signals and/or analog signals received from the outside of the chip to the digital logic behavior model in the chip, and/or the at least one analog signal processing behavior model is used for outputting corresponding digital signals to the digital logic behavior model according to processing results;
and performing logic operation processing on the received digital signals by using the digital logic behavior model, and outputting corresponding digital signals to the input and output behavior model and/or the at least one analog signal processing behavior model according to a processing result.
Optionally, the analog signals received by each analog signal processing behavior model of the at least one analog signal processing behavior model include:
receiving an analog signal sent from the input and output behavior model; and/or
Receiving analog signals sent by other analog signal processing behavior models; and/or
And receiving a conversion signal of the digital signal sent from the digital logic behavior model.
Optionally, the analog signal transceiving unit serially transfers the digital signal and the analog signal based on a form of a digital sequence, and the digital sequence is transmitted on a falling edge of a reference clock signal and sampled and received on a rising edge of the reference clock signal;
wherein the digital sequence comprises a start time interval, a start frame, a data frame and an end time interval; and
the reference clock signal is generated after the corresponding received or transmitted digital sequence is pulled high, and stops being generated after the corresponding received or transmitted digital sequence is pulled low.
Optionally, the invoking the analog signal transceiving unit to convert the analog signal to be transmitted into a digital signal includes: coding the analog signal to be sent into a digital sequence after the stable marking signal for representing the analog signal to be sent is effective and the fluctuation of the analog signal to be sent exceeds a certain range;
invoking an analog signal transceiving unit to convert a received digital signal into an analog signal comprises: the received digital sequence is decoded into an analog signal after being pulled high and registering the analog signal successfully received last time.
Optionally, the digital-analog hybrid simulation method further includes: and registering the analog signal obtained by decoding.
According to a fourth aspect of the present invention, there is provided an electronic apparatus comprising: a processor and a memory; the memory stores a set of computer programs or instructions, and the processor is configured to call the computer programs or instructions stored on the memory to execute the digital-analog hybrid simulation method as described above.
According to a fifth aspect of the present invention, there is provided a storage medium having stored thereon a computer program or instructions which, when executed by a processor, cause the digital-to-analog hybrid simulation method as described above to be implemented.
The beneficial effects of the invention at least comprise:
the embodiment of the invention instantiates the analog signal receiving and transmitting unit in each behavior model, can transmit analog signals among different behavior models of the system based on the function of interconversion of the analog signal receiving and transmitting unit on digital signals and analog signals, is favorable for comprehensively and quickly verifying all functions of digital logic of an integrated chip in the early stage of chip design, and has the characteristics of flexible configuration, convenient use and wide application.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
Fig. 1 is a schematic structural diagram illustrating a digital-analog hybrid simulation system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an analog signal transceiving unit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating a structure of a number sequence provided according to an embodiment of the present invention;
FIG. 4 is a schematic flow diagram illustrating a building method of a digital-analog hybrid simulation system according to an embodiment of the present invention;
fig. 5 is a flow chart illustrating a method of digital-analog hybrid simulation system according to a first embodiment of the invention;
fig. 6 is a flow chart illustrating a digital-analog hybrid simulation system method according to a second embodiment of the present invention.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully hereinafter with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The invention provides a method for performing digital-analog hybrid simulation verification based on a behavior model, which can realize the functions and behaviors of an analog circuit and the transmission of analog signals among the behavior models by compiling the behavior model by using hardware programming languages such as verilog or sverlog and the like, and is favorable for realizing all functions of early, comprehensive and rapid verification of digital logic of an integrated chip in chip design, including unit verification, integrated verification, system verification and the like.
As shown in fig. 1, the digital-analog hybrid simulation system disclosed in the embodiment of the present invention includes: an input-output behavioral model 10 written using a hardware programming language, at least one analog signal processing behavioral model 20, a digital logic behavioral model 30, and an analog signal transceiving unit 40.
The input/output behavior model 10 is an interface behavior model, such as a GPIO behavior model, and is used to implement signal transmission between the digital-analog hybrid simulation system and the outside of the chip. The at least one analog signal processing behavior model 20 is used for processing analog signals and performing signal transceiving through the input/output behavior model 10. The digital logic behavior model 30 is connected to the input/output behavior model 10 and/or the at least one analog signal processing behavior model 20, and is configured to receive the digital signals transmitted by the input/output behavior model 10 and/or the at least one analog signal processing behavior model 20, perform logic operation on the received digital signals, and return corresponding operation results. The analog signal transceiving unit 40 is configured to perform interconversion between an analog signal (denoted as Seq _ data) and a digital signal (denoted as Dig _ data).
Digital signals may be passed directly between the digital logic behavior model 30 and the input-output behavior model 10, and between the digital logic behavior model 30 and the at least one analog signal processing behavior model 20. The analog signal Seq _ data can be transmitted between the input/output behavior model 10 and at least one analog signal processing behavior model 20, and between different analog signal processing behavior models, through the instantiated analog signal transceiving unit 40.
Specifically, the input/output behavior model 10 includes a plurality of interface models, each of which has an analog signal transceiving unit 40 instantiated therein. The input/output behavior model 10 may receive a digital signal and/or an analog signal input from the outside of the chip, and may output the digital signal received from the outside of the chip to the at least one analog signal processing behavior model 20 and/or the digital logic behavior model 30, or output the analog signal received from the outside of the chip to the at least one analog signal processing behavior model 20 by calling the analog signal transceiving unit 40. The input-output behavior model 10 may also output the analog signal received from the at least one analog signal processing behavior model 20 to the outside of the chip by calling the analog signal transceiving unit 40. For example, only 4 interface models (PAx, PCx, PEx, PNx) are shown in the drawing of the present embodiment, but it is understood that the number of interface models in the input-output behavior model 10 may be more or less in other embodiments of the present invention.
Each of the at least one analog signal processing behavior model 20 has an analog signal transceiving unit 40 instantiated therein. Each analog signal processing behavior model can receive the analog signals sent by the input/output behavior model 10 and/or other analog signal processing behavior models by calling the analog signal transceiving unit 40, and send the analog signals to the input/output behavior model 10 and/or other analog signal processing behavior models by calling the analog signal transceiving unit 40. Each analog signal processing behavior model may also communicate digital signals directly with the digital logic behavior model 30. Illustratively, only 4 analog signal processing behavior models (IP 1, IP2, IP3, IPx) are shown in the figure of the present embodiment, but it is understood that the number of analog signal processing behavior models may be more or less in other embodiments of the present invention. Wherein different analog signal processing behavior models may implement the same or different analog signal processing functions.
As shown in fig. 2, the analog signal transceiving unit 40 further includes: a clock generating module 41, a signal transmitting module 42 and a signal receiving module 43.
The clock generating module 41 is configured to generate a reference clock signal. In this embodiment, the clock frequency of the reference clock signal is higher than the highest clock frequency of the system, so that complete transmission of all signals can be ensured.
The signal transmitting module 42 is configured to convert an analog signal to be transmitted into a digital sequence based on the reference clock signal. The signal transmission module 42 allows the analog signal transceiving unit 40 to input an analog signal and output a serial digital sequence.
The signal receiving module 43 is configured to convert the received digital sequence into an analog signal based on the reference clock signal. The signal receiving module 43 allows the analog signal transmitting/receiving unit 40 to input a serial digital sequence and output an analog signal.
It can be understood that the analog signal transceiving unit 40 serially transfers the digital signal Dig _ data and the analog signal Seq _ data based on the form of digital sequence, without changing the connection relationship between the original signals.
In a preferred embodiment, the analog signal transceiving unit 40 further comprises a register module 44, where the register module 44 is configured to store the analog signal output by the signal receiving module 43.
When the input/output behavioral model 10 or at least one analog signal processing behavioral model 20 transmits an analog signal, it calls the signal transmission module 42 in the analog signal transceiver 40 to encode the analog signal to be transmitted into a digital signal, and performs serial transmission in the form of a digital sequence. Upon receiving the analog signal, the signal receiving module 43 in the analog signal transceiver unit 40 is invoked to decode the received digital sequence into an analog signal for further processing. Based on the mode, the invention solves the problem of the transmission of the analog signal Seq _ data between different behavior models, so that the signal interaction verification between the input and output behavior model 10 and at least one analog signal processing behavior model 20 and between different analog signal processing behavior models is realized.
The signal transmission module 42 further includes: a sequence encoding unit 421 and a sequence transmitting unit 422. The sequence encoding unit 421 is configured to encode the analog signal into a digital sequence; the sequence transmitting unit 422 is configured to transmit the digital sequence obtained by encoding on a falling edge of the reference clock signal.
The signal receiving module 43 further includes: a sequence receiving unit 431 and a sequence decoding unit 432. The sequence receiving unit 431 is configured to sample the digital sequence at a rising edge of the reference clock signal; the sequence decoding unit 432 is used to decode the sampled digital sequence into an analog signal.
The signal sending module 42 starts to encode and send the analog signal after the flag signal indicating that the analog signal to be sent is stable is valid and the fluctuation of the analog signal to be sent exceeds a certain range. The signal receiving module 43 starts to decode the received digital sequence after the received digital sequence is pulled up and registers a decoded value of the digital sequence (i.e. the analog signal) successfully received last time by the signal receiving module 43, so that the analog signal received by the signal receiving module 43 can be represented as a discrete voltage value. Therefore, the transmission of useless signals can be avoided, and the accuracy and the reliability of signal transmission are enhanced.
As shown in fig. 3, in the embodiment of the present invention, the digital sequence transmitted by the analog signal transceiver unit includes a start period, a start frame, a data frame, and an end period.
When the input/output behavior model 10 and/or the at least one analog signal processing behavior model 20 transmits analog signals based on the analog signal transceiving unit 40, the operation principle of the analog signal transceiving unit 40 in each transceiving process is as follows:
from the perspective of the signaling module 42, the digital sequence is low when there is no signal transmission. The signal sending module 42 pulls up the digital sequence to enter the start period when signal transmission is required, and triggers the clock generating module 41 to start generating the reference clock signal. The signaling module 42 then generates 3 start frames as the authentication information. After that, the signal sending module 42 starts to encode the analog signal to be sent to generate the data frame, and serially sends the data frame at the falling edge of the reference clock signal, it can be understood that the number of the data frame may be determined according to the actual application of the analog signal to be transmitted, the more the data frame, the finer the analog signal is, the longer the time it takes to transmit the digital sequence, but the number of the data frames of both the transmitting and the receiving should be the same. Finally, after the data frame output is completed, the digital sequence is pulled down, and the clock generation module 41 is triggered to stop generating the reference clock signal, so as to turn off the clock.
From the perspective of the signal receiving module 43, the received digital sequence is low when no signal is transmitted. After the received digital sequence is pulled high, the trigger clock generation module 41 starts generating the reference clock signal. And then starting to receive 3 initial frames and verifying, if the verification is correct, preparing to receive the data frame at the rising edge of the reference clock signal, and otherwise, abandoning the reception. Finally, after all the data frames are successfully received, the clock generation module 41 is triggered to stop generating the reference clock signal at the end period when the digital sequence is pulled down, and the received data frames are decoded.
Based on the above description, the embodiment of the present invention instantiates the analog signal transceiving unit in each behavior model, and based on the function of the analog signal transceiving unit to interconvert the digital signal and the analog signal, can transmit the analog signal between different behavior models of the system, is beneficial to comprehensively and quickly verifying all functions of the digital logic of the integrated chip in the early stage of chip design, and has the characteristics of flexible configuration, convenient use, and wide application.
Further, the invention also provides a method for building the digital-analog hybrid simulation system, and the digital-analog hybrid simulation system described in fig. 1 to 3 can be built by adopting the method.
As shown in fig. 4, the building method comprises the following steps:
in step S11, an input-output behavioral model and at least one analog signal processing behavioral model are written using a hardware description language. The input and output behavior model and the at least one analog signal processing behavior model are used for realizing the functions and behaviors of the input and output circuit and the analog signal processing circuit.
In step S12, an analog signal transceiver unit is written using a hardware description language, and the analog signal transceiver unit is used for implementing interconversion between an analog signal and a digital signal.
In step S13, the analog signal transceiving unit is instantiated using the input/output behavioral model and at least one analog signal processing behavioral model to implement transfer of analog signals between different behavioral models based on the analog signal transceiving unit.
In some preferred embodiments, the building method of the digital-analog hybrid simulation system further includes: and writing digital logic behavior models respectively connected with the input and output behavior models and the at least one analog signal processing behavior model by using a hardware description language so as to realize logic operation processing on the digital signals.
Furthermore, the invention also provides a digital-analog hybrid simulation method which can be realized based on the digital-analog hybrid simulation system constructed by adopting the construction method. Specifically, as shown in fig. 5 and fig. 6, the digital-analog hybrid simulation method includes the following steps:
in step S21, digital signals and/or analog signals received from outside the chip are transmitted to at least one analog signal processing behavior model within the chip using the input-output behavior model.
In step S22, the received analog signal is processed by using at least one analog signal processing behavior model, and a corresponding analog signal is output according to the processing result.
In this embodiment, the analog signals received by each analog signal processing behavior model in the at least one analog signal processing behavior model include: receiving an analog signal sent by an input and output behavior model; and/or receiving analog signals sent from other analog signal processing behavior models; and/or a converted signal received from a digital signal transmitted by the digital logic behavior model.
In step S23, the analog signal received from the at least one analog signal processing behavior model is transmitted to the outside of the chip using the input-output behavior model.
In this embodiment, when the input/output behavior model and the at least one analog signal processing behavior model transmit signals, the method includes: and calling an analog signal transceiving unit to convert an analog signal to be transmitted into a digital signal and then transmit the digital signal, and/or convert a received digital signal into an analog signal.
Specifically, invoking the analog signal transceiving unit to convert the analog signal to be transmitted into a digital signal includes: and coding the analog signal into a digital sequence after the mark signal representing the stability of the analog signal to be sent is effective and the fluctuation of the analog signal to be sent exceeds a certain range.
The step of calling the analog signal transceiving unit to convert the received digital signal into the analog signal comprises the following steps: the received digital sequence is decoded into an analog signal after being pulled high and registering the analog signal successfully received last time.
Further, the digital-analog hybrid simulation method further includes: and registering the analog signal obtained by decoding.
In this embodiment, the analog signal transmitting/receiving unit serially transfers the digital signal and the analog signal based on the form of the digital sequence, and the digital sequence is transmitted on the falling edge of the reference clock signal and sampled and received on the rising edge of the reference clock signal. Wherein, the digital sequence comprises a start time interval, a start frame, a data frame and an end time interval. And the reference clock signal is generated after the corresponding received or transmitted digital sequence is pulled up, and stops being generated after the corresponding received or transmitted digital sequence is pulled down.
In a preferred embodiment, the digital-analog hybrid simulation method further comprises performing step S24 and step S25, specifically,
in step S24, the digital signals and/or analog signals received from the outside of the chip are transmitted to the digital logic behavior model in the chip by using the input/output behavior model, and/or the corresponding digital signals are output to the digital logic behavior model according to the processing result by using at least one analog signal processing behavior model.
In step S25, the digital logic behavior model is used to perform logic operation processing on the received digital signal, and the corresponding digital signal is output to the input/output behavior model and/or at least one analog signal processing behavior model according to the processing result.
In specific implementation, the specific implementation of each step in the digital-analog hybrid simulation method described above may refer to the foregoing digital-analog hybrid simulation system embodiment, and is not described herein again.
It should be noted that the digital-analog hybrid simulation system can be built on an electronic device. Meanwhile, the electronic device includes a processor and a memory. The processor is configured to call the computer program or the instruction stored in the memory to execute the digital-analog hybrid simulation method based on the digital-analog hybrid simulation system built on the electronic device, and the same technical effect can be achieved.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by instructions controlling associated hardware, and the instructions may be stored in a computer-readable storage medium and loaded and executed by a processor. To this end, an embodiment of the present invention further provides a storage medium, where a computer program or instructions are stored, and when the computer program or instructions are executed by a processor, the above digital-analog hybrid simulation method is implemented. The storage medium is a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various media capable of storing program codes.
Since the instructions stored in the computer-readable storage medium may execute the steps in the digital-analog hybrid simulation method provided in the embodiment of the present invention, the beneficial effects that can be achieved by the digital-analog hybrid simulation method provided in the embodiment of the present invention may be achieved, for which details are given in the foregoing embodiment and are not described herein again. The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. It will be apparent to those skilled in the art that other variations and modifications can be made in the foregoing description without departing from the spirit or essential characteristics of the invention. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.

Claims (12)

1. A digital-to-analog hybrid simulation system, comprising:
the input and output behavior model is used for realizing signal transmission between the digital-analog hybrid simulation system and the outside;
at least one analog signal processing behavior model for processing analog signals,
wherein the input-output behavioral model and the at least one analog signal processing behavioral model are both behavioral models written in a hardware description language;
and each analog signal processing behavior model in the input/output behavior model and the at least one analog signal processing behavior model is instantiated with an analog signal receiving and transmitting unit, and the analog signal receiving and transmitting unit is used for realizing the interconversion between an analog signal and a digital signal.
2. The digital-to-analog hybrid simulation system of claim 1, wherein the digital-to-analog hybrid simulation system further comprises:
and the digital logic behavior model is respectively connected with the input/output behavior model and the at least one analog signal processing behavior model and is used for carrying out logic operation on the received digital signals.
3. The digital-analog hybrid simulation system according to claim 1 or 2, wherein the analog signal transceiving unit serially transfers the digital signal and the analog signal based on a form of a digital sequence, and the digital sequence comprises a start period, a start frame, a data frame, and an end period;
the analog signal transceiving unit includes:
the clock generating module is used for generating a reference clock signal;
the signal sending module is used for converting the analog signal into a digital sequence and sending the digital sequence;
a signal receiving module for receiving the digital sequence and converting the received digital sequence into an analog signal,
the clock generation module generates a reference clock signal after the corresponding received or transmitted digital sequence is pulled up, and stops generating the reference clock signal after the corresponding received or transmitted digital sequence is pulled down;
the signal sending module is used for carrying out code conversion on the analog signal after the signal sending module is used for representing that the stable mark signal of the analog signal to be sent is effective and the fluctuation of the analog signal to be sent exceeds a certain range;
and the signal receiving module decodes and transcodes the received digital sequence after the received digital sequence is pulled up and the analog signal successfully received last time by the signal receiving module is registered.
4. The digital-to-analog hybrid simulation system of claim 3, wherein the signal transmission module comprises:
a sequence encoding unit for encoding the analog signal into a digital sequence;
a sequence transmitting unit for transmitting a digital sequence obtained by encoding at a falling edge of the reference clock signal;
the signal receiving module includes:
a sequence receiving unit for sampling a digital sequence at a rising edge of the reference clock signal;
and the sequence decoding unit is used for decoding the sampled digital sequence into an analog signal.
5. The digital-analog hybrid simulation system according to claim 3, wherein the analog signal transceiving unit further comprises:
and the register module is used for storing the analog signal output by the signal receiving module.
6. A building method of a digital-analog hybrid simulation system comprises the following steps:
writing an input and output behavior model and at least one analog signal processing behavior model by using a hardware description language, wherein the input and output behavior model and the at least one analog signal processing behavior model are used for realizing the functions and behaviors of an input and output circuit and an analog signal processing circuit;
writing an analog signal transceiving unit by using a hardware description language, wherein the analog signal transceiving unit is used for realizing the interconversion between an analog signal and a digital signal;
instantiating the analog signal transceiving unit by using the input and output behavior model and the at least one analog signal processing behavior model to realize the transfer of analog signals between different behavior models based on the analog signal transceiving unit; and
and writing a digital logic behavior model respectively connected with the input and output behavior model and the at least one analog signal processing behavior model by using a hardware description language so as to realize logic operation processing on the digital signals.
7. A digital-analog hybrid simulation method, comprising:
transmitting digital signals and/or analog signals received from the outside of the chip to at least one analog signal processing behavior model in the chip by using the input and output behavior model;
processing the received analog signals by using the at least one analog signal processing behavior model, and outputting corresponding analog signals according to the processing result;
transmitting the analog signals received from the at least one analog signal processing behavior model to the chip environment using the input-output behavior model,
wherein the input-output behavioral model and the at least one analog signal processing behavioral model, when transmitting signals, comprise: and calling an analog signal receiving and transmitting unit to convert the analog signal to be transmitted into a digital signal and then transmit the digital signal, and/or convert the received digital signal into an analog signal.
8. The digital-analog hybrid simulation method of claim 7, wherein the digital-analog hybrid simulation method further comprises:
the input and output behavior model is used for sending digital signals and/or analog signals received from the outside of the chip to the digital logic behavior model in the chip, and/or the at least one analog signal processing behavior model is used for outputting corresponding digital signals to the digital logic behavior model according to processing results;
performing logic operation processing on the received digital signals by using the digital logic behavior model, and outputting corresponding digital signals to the input and output behavior model and/or the at least one analog signal processing behavior model according to the processing result,
wherein the analog signals received by each of the at least one analog signal processing behavior model include:
receiving an analog signal sent from the input and output behavior model; and/or
Receiving analog signals sent by other analog signal processing behavior models; and/or
And receiving a conversion signal of the digital signal sent from the digital logic behavior model.
9. The digital-analog hybrid simulation method according to claim 8, wherein the analog signal transceiving unit serially transfers the digital signal and the analog signal based on a form of a digital sequence, and the digital sequence is transmitted on a falling edge of a reference clock signal and sampled and received on a rising edge of the reference clock signal;
wherein the digital sequence comprises a start time interval, a start frame, a data frame and an end time interval; and
the reference clock signal is generated after the corresponding received or transmitted digital sequence is pulled high, and stops being generated after the corresponding received or transmitted digital sequence is pulled low.
10. The digital-analog hybrid simulation method of claim 9, wherein invoking the analog signal transceiving unit to convert the analog signal to be transmitted into a digital signal comprises: coding the analog signal into a digital sequence after the mark signal representing the stability of the analog signal to be sent is effective and the fluctuation of the analog signal to be sent exceeds a certain range;
the step of calling the analog signal transceiving unit to convert the received digital signal into the analog signal comprises the following steps: the received digital sequence is pulled high and decoded into an analog signal after registering the analog signal that was successfully received last time.
11. An electronic device, comprising: a processor and a memory;
the memory stores a set of computer programs or instructions for invoking the computer programs or instructions stored on the memory to perform the method of any of claims 7-10.
12. A storage medium having stored thereon a computer program or instructions which, when executed by a processor, cause the method of any one of claims 7 to 10 to be carried out.
CN202211482938.2A 2022-11-24 2022-11-24 Digital-analog hybrid simulation system, method, electronic device and storage medium Pending CN115906742A (en)

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