TWI252568B - Device and method for cavity-down package - Google Patents

Abstract

A cavity-down package is disclosed. A chip is disposed inside a cavity of the chip carrier. The chip is electrically connected to the chip carrier by a plurality of electrically connecting elements. A shaping cover is disposed on the chip carrier to form an encapsulant filling space defined by the cavity and the shaping cover. A liquid compound is formed inside the encapsulant filling space to seal the chip and the electrically connecting elements. The thickness and shape of the liquid compound are controlled by the shaping cover. Therefore, it can prevent the problem that the cavity-down package cannot be disposed on a PCB caused by the unusual thickness of the liquid compound. In addition, the electrically connecting elements are not exposed out of the liquid compound.

Description

1252568 V. INSTRUCTION DESCRIPTION (1) '~ ------— TECHNICAL FIELD OF THE INVENTION The present invention relates to a crystal-hole type package structure and method thereof, j, relating to a controllable A cavity-down type package structure and method for coating the thickness and shape of a gel. [Prior Art] A self-awareness-cavity-down package is a two-conductor type 2 conductor type, which has the advantages of better heat dissipation and shorter specific path. In the conventional crystal-cavity downward-facing package structure: the =ϋ system is used to seal and protect a wafer and a plurality of bonding wires', and the method of forming the gel is mainly divided into molding forming and spot coating. Forming, wherein the sealing system formed by the stamper is formed by mold pressing = sheet carrier and then injection molding, and the advantage of the stamper (4) is that the outer shape is lacking, and then the δ is placed on the mold, There is a problem with the alignment, and in the injection body 2: ^ the overflow of the ball on the wafer carrier. The glue is formed by dispensing, and is first fabricated in the peripheral body of the wafer before dispensing to avoid contamination of the wafer by the gel when the glue is dispensed, but the disadvantage is that it is difficult to control. The point is coated with the thickness of the gel, and the outer shape is relatively uneven, especially after the colloid, when it is directed to the solder ball, it will not be installed on the PCB board, and when the point is coated, the gel is lower than the electrical properties. When the component is connected, the electrical conduction component is exposed outside the point of the coating. Figure 2 is a face-down type package with a dot-coated gel. Please refer to the first package having a lower package structure 1〇0, and the wafer carrier 11 has a cavity 112 facing a surface U1 thereof. The wafer carrier 110 system

1252568 V. Description of the Invention (2) A circuit board 11 3 having a through hole and a heat sink 丨 4 are formed, and the hole U2 is formed by the through hole of the circuit board 113 and the heat sink (1). A wafer 120 is disposed in the cavity 112 and electrically connected to the circuit substrate 13 by a plurality of solders 130. a dam " 妒 2 Ϊ Table # , the dam 140 is formed around the cavity 112 to form a closed bad shape, a layer of glue 丨 50 is filled in the crystal cavity " 2 : Ϊ ΐ the wafer 120 and the These bonding wires are 13° 'plurality of solder balls: 6. A plurality of ball pads 115 formed on the surface 111. Since the dam 14 〇 can only block the point of the glue 150 on the surface 11 of the circuit substrate 113上上> _ Mo, the point of the coating body 150 in the process of filling, can not control the two: the thickness and shape of the colloid 150, so it is easy to cause the point of the coating gel 15 〇 thick ^ ^ often, when the hole After the downward-facing package structure is installed, it is installed on a pcB board. If the point coating gel 150 is higher than the solder ball 16〇, the crystal hole = the lower package structure cannot be installed. When the pcB board, or when the point coating gel=0 is lower than the bonding wires 130, the bonding wires 13〇 are exposed to the surface of the coating gel. 5 to 2 C to the point. The method of the above-mentioned crystal-hole-down type package structure is as follows. In FIG. 2A, the wafer carrier u〇/曰曰8 11 2 is oriented toward the electricity. The surface 11 of the substrate 11 is formed on the surface 丨丨1, and the wafer 丨2 is placed in the cavity 丨丨2 and adhered to the heat sink 114 (eg 1)); then, a single-line 1 step is performed to electrically connect the circuit substrate 1丨3 and the wafer with a plurality of bonding wires 丨3〇, and in the 2B diagram, the dam 140 is formed in a sea surface 113' of the circuit substrate 111. The dam 140 surrounds the crystal cavity 112; in FIG. 2C,

Page 8 j252568 V. Description of the invention (3) F-Point Fort Colloid 1 50 is filled in the crystal hole 丨丨 2 to seal the wafer 丨 2 () ί, "Hai fresh line 1 30; finally formed The solder balls 160 are on the surface 111 by a number of balls 1 1 5 (as shown in FIG. 1) to form the crystal-cavity downward-facing package = 1 stomach sputum. In the above-mentioned conventional hexa-cold-type packaging method, the dot-coating body 150 is usually formed in a manner of a point-to-point method, since the point-coated colloid 1 5 0 The limitation of 1 40 is 'no other yuan hemp' ^Working system H ' to the thickness of body 1 50, so it is easy to cause the thickness of the coating gel 15 异常 to be abnormal. SUMMARY OF THE INVENTION The main purpose of t ^ month is to provide a crystal-cavity-type package structure, which is disposed in a crystal cavity of a wafer carrier, and the complex-π-conducting component is electrically connected to the wafer. And the wafer carrier, a 駚盍 駚盍 ham ham ham ham ham ham ham 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 对应 ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham ham - Γ ff body filling space to seal the wafer and the electrical conductive connection 忒 忒 忒 forming cover system can control the thickness and shape of the point coating gel to avoid the application of the point to avoid The thickness is too large to be mounted on a PCL board, and σΧ ^ ^ can also prevent the point coating gel from contaminating the wafer carrier. The second purpose of the method is to provide a crystal-hole-down type package, and the second film is placed in a crystal cavity of a wafer carrier, and then the plurality of electric soils are pulled. The V-junction is electrically connected to the wafer and the wafer carrier, and is covered with a spotted hole, and a shaped cover is disposed on the wafer carrier, and the forming is performed; The colloid fills the space, and then forms a little ' ♦ body in the gel filling space, the forming cover can control the spot coating; ^^ vj 〇 / i ^ r \ \ /1 ) degree and shape to avoid The thickness of the point coating gel is abnormal, and the Λ曰曰8 downward-facing package structure cannot be used by subsequent processes. The crystal-cavity downward-facing package structure according to the present invention comprises a wafer carrier, a wafer, a plurality of electrical conductive elements, a shaped cover, and a point = carrier having a surface and a crystal cavity facing the surface, The crystal f I is again placed in the crystal hole τ, and the electrical conductive elements are electrically connected to the crystal aa piece carrier, and the shaped cover is disposed on the crystal hole to form the forming cover corresponding to the crystal hole Forming a colloid filling space with the crystal system, the dot coating system is formed in the gel filling space to seal the wafer and the electrical conduction guiding elements, wherein the forming cover controls the point coating gel The thickness and shape 'to avoid the abnormality of the thickness of the coating gel at this point and to prevent the point coating colloid from contaminating the wafer carrier, so that the hole-down type package structure can no longer carry out the subsequent process. [Embodiment] The present invention will be described by way of the following examples. In one embodiment of the present invention, referring to FIG. 3, a crystal hole facing type package structure 20 includes a wafer carrier 210, a wafer 22, a plurality of electrical guiding members 230, and a forming cover (shaping). In the present embodiment, the wafer carrier 210 is composed of a circuit substrate 211 and a heat sink 212. The circuit substrate 21 1 may be mixed with a glass fiber. The FR-3, FR-4 epoxy resin or BT resin substrate, the polyimide film, and the ceramic substrate of the cloth reinforced fiber may be made of copper or other suitable metal. The wafer carrier 210 has a surface 2 13 and a crystal facing the surface 21 3

Page 10 1252568 V. Description of the Invention (5) Hole 2 1 4, wherein the surface 2 1 3 is a surface for the surface of the circuit substrate 2 11 to be bonded, and the crystal 8 1 4 is composed of the circuit substrate 2 1 1 One of the through holes 2 1 1 a is formed with the heat sink 2 1 2 , and the surface 2 1 3 is further formed with a plurality of ball pads 2 1 5 (as shown in FIG. 4 ) for engaging a plurality of fresh balls 2 7 In addition, the wafer carrier 210 can be a circuit substrate (not shown) having the crystal hole 2 14 . The wafer 220 is disposed in the crystal cavity 2 1 4 , the wafer 2 2 0 has an active surface 2 2 1 and a back surface 2 2 2 and includes a plurality of solder pads 223 located on the active surface 2 2 1 . The solder pads 2 23 are electrically connected to the ball pads 2 1 5 of the circuit substrate 2 1 1 , and in the embodiment, the electrical conductive devices 2 3 0 is a fresh line. The forming cover 240 is disposed on the wafer carrier 210 corresponding to the cavity 2, and the forming cover 420 and the cavity 214 form a colloid filling space A. In this embodiment, the size of the forming cover 24 is slightly larger than the hole.

2JL4 size 'In this embodiment, the forming cover 24 is adhesively bonded to the wafer carrier 21 by a glue 25, which can be thermally cured. The forming can be formed by a baking process. The cover 24 〇 is fixedly attached to the wafer carrier 2+10 / preferably, the forming cover 24 can be covered by a metal to enhance the heat conduction and electrical shielding of the Japanese wafer 22 . i point coating colloid 260 is formed in the gel filling space A for sealing the 』

? 4: Ϊ some electrical conductive elements 230. In the present embodiment, the shaped hole 241 is passed through the gel-coated body 260 and filled in the colloid-filled space η Λ γ a u ^ 97n Ganzi Brothers A. The wafer carrier 210 further includes a plurality of solders 3 on the ball pads 215 of the surface 2U, and the direction of the ball 270 is greater than the height of the forming cover 240. -

Page 11 1252568 V. Description of invention (6)

According to the present invention, the crystal-hole-down type package structure 2 is provided on the surface 2 1 3 of the wafer carrier 2 1 利用 by using a far-reaching lid 420 for forming the dot-coating body. At 260 hours, the thickness and shape of the adhesive body 2 6 控制 are controlled to avoid the fact that the thickness of the glue 260 is too high, and the solder balls 27 〇 cannot be mounted on a PCB. And the forming cover 24 〇 can also prevent the point coating colloid 2 60 overflowing the ball carrier 2 丨 5 of the ball carrier 2 丨 5 ^

4A to 4B are top views of the hexagonal-down package structure 2 〇〇 in a packaged red. Please refer to FIGS. 3 and 4 a. First, a wafer carrier 2 1 0 'the wafer carrier is provided. 2 1 〇 is composed of a circuit substrate 2 and a heat sink 2 1 2, the wafer carrier 2 1 has a surface 2 J 3 and a cavity 214 facing the surface 213, and then a sticky A crystallization step is to place a wafer 220 in the crystal pocket 214. The wafer 22 has an active surface 221 and a back surface 222. The plurality of pads 223 are formed on the active surface 22i. The wafer 2200 is adhered to the heat sink 21 2 by the back surface 2 2 2 .荖, a plurality of electrical conductive elements 230 are formed to electrically connect the pads 223 of the wafer 22 to the circuit substrate 2, and then refer to FIG. 3 and FIG. 4β, corresponding to the crystal hole 214' A forming cover 24 is disposed on the surface 213 of the wafer carrier 21, and the forming cover 240 and the cavity 214 form a colloid filling space a. In the embodiment, the forming cover 24 has a glue injection. The hole 241 is passed through the colloid filling space a for the point coating colloid 210. Please refer to FIG. 4C and FIG. 5 . Finally, a layer of colloid 26 0 is formed in the colloid filling space A. The dot colloid 2 60 seals the wafer 2 2 0 and 4 electrical guiding elements 2 3 . That is, in the present embodiment, the point coating gel 26 can be injected through the glue hole 241 of the forming cover 240 by a glue needle 280. 11 IS 1 1 i 1 11 1 1 I i Page 12 1252568 V. DESCRIPTION OF THE INVENTION (Into the colloid filling space A, the thickness and shape of the point coating body 260 are restricted by the forming cover 240, and the point coating colloid 26 is prevented from overflowing the wafer carrier 210. In this embodiment, the surface 2 1 3 of the plurality of solder balls 27 and the carrier 2 1 〇 is further included, wherein the heights of the solder balls 27 ii, Λ成元元盍2 4 〇 尚 ( (as shown in Figure 3), the solder balls 27 7 are placed on a plurality of ball pads 215 to form the crystal hole facing down 200. In the crystal hole facing down package In the method, before forming the point coating colloid 2 60, the forming cover 24 4 is first set to prevent the thickness of the point coating colloid 2 6 异常 from being abnormal and overflowing and The crystal-cavity-down package structure can also be used to control the thickness and shape of the point coating body 26 by using differently shaped forming covers 240. The scope of protection of the present invention is defined by the scope of the appended patent application. It is intended that any changes and modifications may be made without departing from the spirit and scope of the invention.

1252568 Round simple description [Simple description of the figure] L Figure: Cross-section of the conventional cavity-down plastic package structure; Figure 2A to 2C: Conventional cavity-down package construction in the packaging process top view: 3 Figure: FIG. 4A to FIG. 4C is a schematic view of a face-down type package structure according to an embodiment of the present invention; FIG. 4A to FIG. 4C: the crystal hole-down type package structure is formed in a package process according to an embodiment of the present invention. Wishing the map, and the first! 5 Figure: In accordance with a specific embodiment of the present invention, the crystal-hole-down type seal is constructed to form a cross-sectional view of a little gel-coated Japanese temple. Brief description of the component symbol: 100 crystal hole facing type package structure 110 wafer carrier 111 surface 112 crystal hole 113 circuit substrate 114: heat sink 115 ball pad 120 wafer 130 bonding wire 140 dam 150 point coating colloid 160 fresh ball 200 crystal hole toward The lower package structure 210 wafer carrier 211 circuit substrate 211a through hole 212 heat sink 213 surface 214 crystal hole 215 ball pad 220 wafer 221 active surface 222 back 223 pad

Page 14 1252568 Brief description of the diagram 230 Electrically conductive components 240 Formed cover 241 Injection hole 250 Adhesive 260 point glue 280 Adhesive needle A A gel Fill space 2 7 0 Solder ball Φ

Page 15

Claims (1)

1252568 ^ _ Case No. 93136670 / month / corpse Japanese version of the sixth, the scope of application for patents [Scope of Application] ~ 1, a crystal six-down package structure, comprising: a wafer carrier having a surface and a surface facing a wafer, which is disposed in the crystal cavity; a plurality of electrically conductive elements electrically connected to the wafer carrier; ^ a shaping cover corresponding to the crystal The hole is disposed on the wafer carrier, and the forming cover and the crystal cavity form a glue space; and a colloid, wherein the forming cover is over. 2. In the patent application, the rule of the forming cover is 3, as in the patent application, wherein the forming cover is 4, as in the patent application, wherein the forming cover is 5, as in the patent application, wherein the adhesive system is used. For example, the patent application method includes a plurality of solder balls 7 , such as a patent application form formed in the gel filling space; the system has a glue injection hole for the gel point to be coated, and the inch system is slightly larger than the circumference. A metal cover as described in item 1. According to the first item, the colloidal adhesion junction described in item 4 is thermally curable. As described in Item 1, it is provided in the size of the crystal-hole-down type crystal cavity described in Item 6 of the circumference. The crystal-cavity-down type of crystal-cavity is downwardly coupled to the crystal-cavity-down type package structure 'package structure' package structure' of the crystal-cavity-facing type downward-facing wafer carrier. The package construction 'package construction' is on the surface. Package construction Page 16 1252568 ___ Case No. 93136670 VI. Patent Application Scope Month Day The height of the solder balls is greater than the height of the shaped cover. 8. The cavity-hole type package structure of claim 1, wherein the wafer carrier comprises a circuit substrate. 9. The crystal-cavity downward-facing package structure according to claim 8, wherein the circuit substrate has a through hole, and the wafer carrier further comprises/a heat sink, the through hole of the circuit substrate and the heat dissipation The sheet constitutes the crystal cavity. The crystal hole facing type package structure according to claim 1, wherein the wafer carrier is a circuit substrate having the crystal hole. 11. The cavity-hole type package structure of claim 1, wherein the glue system seals the wafer and the electrical conductive elements. 12. A method for packaging a crystal-cavity downward type, comprising: providing a wafer carrier having a surface and a crystal cavity facing the surface; providing a wafer in the crystal cavity; forming a plurality of electrical conduction contacts The component is electrically connected to the wafer and the wafer carrier; and w曰 corresponds to the crystal cavity, and a shaped cover is disposed on the wafer carrier, and the forming cover and the crystal cavity system form a gel filling space, wherein the forming cover has a note And a hole-forming type packaging method according to claim 12, wherein the size of the forming cover is formed by the injection molding to form a colloid in the colloid filling space 13 The system is slightly larger than the size of the crystal cavity. 14. The crystal-cavity-facing type package described in item 12 of the patent application scope. 1252568 _ Case No. 93136670_年月曰 佟毛__ Sixth, the patent application scope method, wherein the forming cover is covered by a metal. The cavitation-down type encapsulation method of claim 2, wherein the formed cover is bonded to the wafer carrier by an adhesive. The method of claim 5, wherein the adhesive is thermally curable. The crystal hole down-type packaging method as described in claim 12, further comprising: providing a plurality of solder balls on the surface of the wafer carrier. 18. The method according to claim 17, wherein the height of the solder balls is greater than the height of the shaped cover. 19. The cavity-hole type packaging method of claim 12, wherein the wafer carrier comprises a circuit substrate. The crystal hole facing package has a through hole, and the wafer carrier further comprises a Θ ", a sheet, and a through hole of the circuit substrate. The heat sink constituting the crystal 21, as in the 12th method of the patent application, wherein the wafer carrier is 22, as in the 12th method of the patent application, wherein the gel system seals the crystal cavity facing type package described in the item. A circuit substrate having the crystal cavity. The crystal-cavity-facing package wafer and the electrical conductive elements are described. Page 18