1239109 九、發明說明： 【發明所屬之技術領域】 本發明係有關於-種發光半導體接著結構及其方法，特 別是提供發光半導體接著㈣基板上，並形成電氣連接者。 【先前扶術】 •傳_^光半導體接著結構方法中，係透過—般的覆晶(flip chip)製程中，而達到其發光半導體接著至一電氣控制之基板 上。參考第二圖所顯示係習用技術之發光半導體接著結構， 其係透過一基板(301)接著一發光半導體(3〇2)之結構者。其 中，該基板(301)係一具有電氣線路之結構，且該發光半導體 (302)係一發光二極體元件，以氮化鎵（GaN)系發光二極體元 件來說，該發光半導體(302)中具有一 N型接觸層（303)以及一 P型接觸層（304)，其中，該;^型接觸層（3〇3)，係^^型之氮化鎵 材質所形成，其一裸露側形成一歐母接觸之N電極層（3〇3a)， 該N電極層（303a)形成一第一金屬凸緣（3〇3b);以及該p型接 觸層（304)，係P型之氮化鎵材質所形成，其一裸露側形成一 歐母接觸之P電極層（304a)，該P電極層（304a)形成一第二金屬 凸緣(304b)。因而使得該發光半導體(3〇2)可透過其第一金屬 凸緣(3〇3b)以及第二金屬凸緣(304b)，並利用晶片覆合機(朽屮 Chip Bonder)焊接至基板(3〇1)上，用以提供該基板（1〇1)與發 光半導體（102)之間的電氣訊號輸出入。然而，由於若其金屬 凸緣係使用銲錫（solder)，則會因為銲錫熔點過低，而不利於 高溫製程及高功率發光二極體（LED)使用。再者，雖然其金 屬凸緣可使用金材質（Au)之凸塊(bump)製程，進行改善使用 銲錫之缺點，但因而需要額外的金材質凸塊製程，且利用金 材質凸塊製程之方法中，其金材質凸塊之數目多寡，會決定 其散熱效果的好壞，向導致高功率發光二極體所需之金材質 凸塊製程，會增加其製作成本，並使得其產能效率低落。貝 1239109 因此，為了要克服上述的缺陷，本發明基於習用發光半 導體接著結構之缺失進行發明。 【發明内容】 關於本發明係一種發光半導體接著結構及其方法，以實 際解決一個甚至是數個前述相關技術中的限制及缺失。 本發明之目的係，乃是在於發光半導體接著至基板之接 合處採用整面的金屬層接合，而非局部接合，只需配合晶片 覆合機（Flip Chip Bonder)，並不需製作金材質凸塊（Au bump)，因此，其整面接合不但接合力強、電流分散更均勻、 散熱更佳以及可靠度提昇，並可進一步減少其成本及提昇產 能。 為達到上述目的，本發明提供之發光半導體接著結構及 其方法，其主要係透過一基板接著一發光半導體之結構，且 該基板係一具有電氣線路之結構，該發光半導體中的N型接 觸層與P型接觸層分別形成一歐母接觸之N電極層與P電極 層；以及該基板表面透過浸鍍法或沉積法形成第一金屬層以 及第二金屬層，而分別電氣連接至該基板電氣線路之對應電 氣訊號輸出入節點，且第一金屬層以及第二金屬層，分別與 發光半導體之N電極層以及P電極層相互配合，使得該第一金 屬層以及第二金屬層透過超音波熔接而分別對應該N電極層 以及P電極層而相互接著，用以將該發光半導體接著於該基板 上，並形成電氣連接者。 本發明之目的及功能經配合下列圖示作進一步說明後將 更為明瞭。 【實施方式】 以下將針對本發明較佳實施例配合所附之圖示作進一步 1239109 地詳細說明。某些尺度與其它部份相關的尺度比係被誇張的 表示以提供更清楚的描述以幫助熟悉此技藝的相關人士瞭解 本發明。 第一圖所顯示為本發明之發光半導體接著結構及其方法 的一種較佳實施例的剖面示意圖；第二圖所顯示為本發明第 一圖之較佳實施例方法流程圖。 參考第一圖所顯示，本發明之發光半導體接著結構之第 一實施例，其主要係透過一基板（lOi)接著一發光半導體（1〇 之結構者。 其中，該基板（101)係一具有電氣線路之結構，並在表面 處至少形成一第一金屬層（l〇la)以及一第二金屬層（1〇lb)，且 第一金屬層（l〇la)以及第二金屬層（101b)係電氣連接至該基 板（101)電氣線路之對應電氣訊號輸出入節點，用以提供該基 板（101)與發光半導體（102)之間的電氣訊號輸出入。 前述之基板（101)可以係形成一導線架（leadframe)，用以 電氣連接至發光半導體（102)，而提供該發光半導體（1〇2)的電 氣訊號輸出入。 再者，該發光半導體（102)係一發光二極體元件，舉例來 說’其係一種氮化鎵（GaN)系發光二極體元件。該發光半導 體（102)中具有一N型接觸層（1〇3)以及一p型接觸層（1〇4)，其 中，該N型接觸層（1〇3)，係N型之氮化鎵材質所形成，其一 裸路側形成一歐母接觸之N電極層（i〇3a);且，該p型接觸層 (104)，係p型之氮化鎵材質所形成，其一裸露側形成一歐母 接觸之P電極層（l〇4a)。 刚述基板（101)之第一金屬層（l〇la)以及第二金屬層 (101b)，與發光半導體（1〇2)2n電極層（1〇3a)以及p電極層 (104a)，係相互配合，使得該第一金屬層（1〇la)以及第二金屬 層（101b)分別對應該N電極層（i〇3a)以及p電極層（1〇4a)而相 互接著，用以將該發光半導體（1〇2)接著於該基板（1〇1)上，並 1239109 形成電氣連接者。其中，該第一金屬層（1〇la)以及第二金屬 層（101b)之面積，甚至係分別對應該N電極層（103a)以及p電 極層（104a) ’而形成相近大小的接觸面積。 參考弟一圖所顯示，基於前述本發明之發光半導體接著 結構，其接著方法包括：步驟201，透過浸鍍法，於該基板（1〇1) 上的對應位置，形成該第一金屬層（1〇la)以及第二金屬層 (101b)，且該第一金屬層（i〇ia)以及第二金屬層（1〇lb)之面積 及位置係對應該N電極層（l〇3a)以及P電極層（1〇4a);步驟 202,將該發光半導體（1〇2)覆置於該基板（101)上，並使得該 N電極層（103a)以及P電極層（i〇4a)分別對應堆疊於該第一金 屬層（101a)以及第二金屬層（i〇ib)上，再透過超音波炼接，將 N電極層（103a)與第一金屬層（i〇ia)接合，以及將p電極層 (104a)與第二金屬層（i〇ib)接合。因此，可完成將發光半導體 (102)接著於該基板（1〇1)上，並形成電氣連接者。 前述步驟中，該基板（101)形成第一金屬層（101a)以及第 二金屬層（101b)之方法，係除了使用浸鍍法法之外，亦可使 用一般的金屬沉積法所達成。其精神係在於形成第一金屬層 (101a)以及第二金屬層（loib)於該基板（ιοί)上，並使得第一 金屬層（101a)以及第二金屬層（l〇ib)之面積及位置係分別對 應該N電極層（l〇3a)以及P電極層（104a)。 前述第一金屬層（l〇la)以及第二金屬層（101b)之沉積，亦 可使用一般的金屬沉積法所達成，諸如物理氣相沉積、化學 氣相沉積、電鍍等。 再者，本發明之第一金屬層（101a)以及第二金屬層（101b) 係對應該基板（101)之電氣線路與發光半導體（102)之N電極 層（103a)以及P電極層（i〇4a)，且用以形成該基板（1〇1)電氣線 路中的電氣訊號輸出入節點與發光半導體（102)N電極層 (l〇3a)以及P電極層（i〇4a)之間的接合介面，因此，並不限定 第一金屬層（101a)以及第二金屬層（l〇lb)係於該基板（101)上 1239109 所/儿積而成，其亦可於該N電極層（l〇3a)以及p電極層（1〇4a) 表面沉積而成。 以上所述者僅為用以解釋本發明之較佳實施例，並非企 $具以對本發明作任何形式上之限制，是以，凡有在相同之 發明精神下所作有關本發明之任何修飾或變更，皆仍應包括 在本發明意圖保護之範轉。 【圖式簡單說明】 附圖所顯示係提供作為具體呈現本說明書中所描述各絚 成TL件之具體化實施例，並解釋本發明之主要目的以掷= 本發明之了解。 胃㈣ 第一圖所顯示為本發明之發光半導體接著結構的—種 施例。 貫 第二圖所顯示為本發明第一圖之較佳實施例方法流程圖。 第三圖所顯示為習用技術之發光半導體接著結構。 【元件符號說明】 (101) :基板 (101a):第一金屬層 (101b):第二金屬層 (102) :發光半導體 (103) : N型接觸層 (103a) · N電極層 (104) : P型接觸層 (104a) : P電極層 201 :基板沉積形成金屬層 202 :基板與發光半導體接著 1239109 (301) :基板 (302) :發光半導體 (303) : N型接觸層 (303a) : N電極層 (303b):第一金屬凸緣 (304) : P型接觸層 (304a) : P電極層 (304b):第二金屬凸緣1239109 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a light-emitting semiconductor bonding structure and a method thereof, in particular to provide a light-emitting semiconductor bonding on a substrate and form an electrical connector. [Previous help technique] • In the method of constructing optical semiconductors, the light-emitting semiconductors are connected to an electrically controlled substrate through a general flip chip process. Referring to the second figure, a light-emitting semiconductor bonding structure of a conventional technology is shown, which is a structure that passes through a substrate (301) and a light-emitting semiconductor (302). Wherein, the substrate (301) is a structure having an electric circuit, and the light-emitting semiconductor (302) is a light-emitting diode element. For a gallium nitride (GaN) -based light-emitting diode element, the light-emitting semiconductor ( 302) has an N-type contact layer (303) and a P-type contact layer (304), wherein the ^ -type contact layer (303) is formed of a ^ -type gallium nitride material, one of which is: A bare N-electrode layer (303a) is formed on the exposed side, and the N-electrode layer (303a) forms a first metal flange (303b); and the p-type contact layer (304) is a P-type It is formed of gallium nitride material, and an exposed side forms a P-electrode layer (304a) with European contact, and the P-electrode layer (304a) forms a second metal flange (304b). Therefore, the light-emitting semiconductor (302) can pass through the first metal flange (303b) and the second metal flange (304b) and be soldered to the substrate (3) using a chip bonder (3). 〇1), for providing electrical signal input and output between the substrate (101) and the light-emitting semiconductor (102). However, if solder is used for the metal flange, the solder melting point is too low, which is not conducive to the use of high-temperature processes and high-power light-emitting diodes (LEDs). In addition, although the metal flange can use a bump process of gold (Au) to improve the disadvantages of using solder, it requires an additional bump process of gold and a method of using the bump process of gold However, the number of gold bumps will determine its heat dissipation effect. The process of gold bumps required for high-power light-emitting diodes will increase its production cost and reduce its productivity. Therefore, in order to overcome the above-mentioned defects, the present invention is invented based on the lack of a conventional light-emitting semiconductor followed by a structure. [Summary of the Invention] The present invention relates to a light-emitting semiconductor bonding structure and a method thereof, so as to actually solve one or even several of the foregoing related technologies. The purpose of the present invention is to use the entire surface metal layer bonding instead of local bonding at the junction between the light-emitting semiconductor and the substrate. It only needs to cooperate with the Flip Chip Bonder, and does not need to make gold bumps. Therefore, not only does it have a strong bonding force, more uniform current distribution, better heat dissipation, and improved reliability, it can further reduce its cost and increase productivity. In order to achieve the above object, the light-emitting semiconductor bonding structure and method provided by the present invention are mainly a structure in which a light-emitting semiconductor is connected through a substrate, and the substrate is a structure having electrical circuits, and an N-type contact layer in the light-emitting semiconductor. The N-electrode layer and the P-electrode layer are respectively formed in contact with the P-type contact layer; and a first metal layer and a second metal layer are formed on the surface of the substrate through an immersion plating method or a deposition method, and are electrically connected to the substrate respectively. The corresponding electrical signal input and output nodes of the circuit, and the first metal layer and the second metal layer cooperate with the N electrode layer and the P electrode layer of the light-emitting semiconductor, respectively, so that the first metal layer and the second metal layer are welded by ultrasonic waves. The N-electrode layer and the P-electrode layer are respectively adhered to each other, and the light-emitting semiconductor is adhered to the substrate to form an electrical connector. The purpose and function of the present invention will be made clearer by further explanation in conjunction with the following drawings. [Embodiment] In the following, the preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings. Certain scales are related to other scales and are exaggerated to provide a clearer description to help those familiar with the art to understand the invention. The first figure shows a schematic cross-sectional view of a preferred embodiment of the light-emitting semiconductor bonding structure and method of the present invention; the second figure shows a method flowchart of the preferred embodiment of the first figure of the present invention. Referring to the first figure, the first embodiment of the light-emitting semiconductor bonding structure of the present invention is mainly a structure that passes through a substrate (10i) followed by a light-emitting semiconductor (10). The substrate (101) is The structure of the electrical circuit, and at least a first metal layer (10la) and a second metal layer (10lb) are formed on the surface, and the first metal layer (10la) and the second metal layer (101b) ) Is a corresponding electrical signal input / output node electrically connected to the electrical circuit of the substrate (101), and is used to provide electrical signal input / output between the substrate (101) and the light-emitting semiconductor (102). The aforementioned substrate (101) may be A lead frame is formed to be electrically connected to the light emitting semiconductor (102), and the electrical signal input and output of the light emitting semiconductor (102) are provided. Furthermore, the light emitting semiconductor (102) is a light emitting diode Device, for example, 'it is a gallium nitride (GaN) -based light-emitting diode device. The light-emitting semiconductor (102) has an N-type contact layer (103) and a p-type contact layer (104). ), Wherein the N-type contact layer (103), It is formed of N-type gallium nitride material, and a bare road side forms an N-electrode contact layer (io3a); and the p-type contact layer (104) is made of p-type gallium nitride material. Is formed, a P-electrode layer (104a) with a European contact is formed on an exposed side thereof. The first metal layer (101a) and the second metal layer (101b) of the substrate (101) just described, and the light-emitting semiconductor ( 102) The 2n electrode layer (103a) and the p electrode layer (104a) are matched with each other so that the first metal layer (10la) and the second metal layer (101b) correspond to the N electrode layer ( 〇3a) and p electrode layer (104a) are next to each other, for bonding the light emitting semiconductor (102) on the substrate (101), and forming an electrical connector 1239109. Among these, the first The areas of the first metal layer (10la) and the second metal layer (101b) even correspond to the contact area of the N electrode layer (103a) and the p electrode layer (104a), respectively. It is shown that the light-emitting semiconductor bonding structure based on the foregoing invention includes a bonding method including step 201, by dipping on the substrate (101). Corresponding position, the first metal layer (10la) and the second metal layer (101b) are formed, and the area and position of the first metal layer (ioa) and the second metal layer (10lb) are Corresponds to the N electrode layer (103a) and the P electrode layer (104a); step 202, the light emitting semiconductor (102) is placed on the substrate (101), and the N electrode layer (103a) ) And P electrode layer (io4a) are respectively stacked on the first metal layer (101a) and the second metal layer (iob), and then through ultrasonic splicing, the N electrode layer (103a) and the A metal layer (ioa) is bonded, and a p-electrode layer (104a) is bonded to a second metal layer (iob). Therefore, the light-emitting semiconductor (102) can be attached to the substrate (101) to form an electrical connector. In the foregoing steps, the method for forming the first metal layer (101a) and the second metal layer (101b) on the substrate (101) can be achieved by using a general metal deposition method in addition to the dip plating method. The spirit is to form a first metal layer (101a) and a second metal layer (loib) on the substrate (ιοί), and make the area of the first metal layer (101a) and the second metal layer (10b) and The positions correspond to the N electrode layer (103a) and the P electrode layer (104a), respectively. The foregoing first metal layer (101a) and the second metal layer (101b) can also be deposited using a general metal deposition method, such as physical vapor deposition, chemical vapor deposition, and electroplating. Furthermore, the first metal layer (101a) and the second metal layer (101b) of the present invention correspond to the N-electrode layer (103a) and the P-electrode layer (i) of the electrical circuit of the substrate (101) and the light-emitting semiconductor (102). 〇4a), and is used to form the electrical signal I / O nodes in the electrical circuit of the substrate (101) and the light-emitting semiconductor (102) between the N electrode layer (103) and the P electrode layer (104). The bonding interface, therefore, is not limited to the first metal layer (101a) and the second metal layer (10lb) are formed on the substrate (101) 1239109, it can also be on the N electrode layer ( 103a) and p electrode layer (104a) are deposited on the surface. The above is only used to explain the preferred embodiments of the present invention, and is not intended to limit the present invention in any form. Therefore, any modification or related to the present invention made in the same spirit of the invention Changes should still be included in the scope of the present invention. [Brief Description of the Drawings] The drawings show specific embodiments of the TL pieces described in this specification, and explain the main purpose of the present invention to understand the present invention. Stomach The first figure shows an embodiment of the light-emitting semiconductor bonding structure of the present invention. The flow chart of the method of the preferred embodiment of the first drawing of the present invention is shown throughout the second drawing. The third figure shows a conventional light-emitting semiconductor bonding structure. [Description of element symbols] (101): substrate (101a): first metal layer (101b): second metal layer (102): light-emitting semiconductor (103): N-type contact layer (103a) · N electrode layer (104) : P-type contact layer (104a): P-electrode layer 201: Substrate deposition to form metal layer 202: Substrate and light-emitting semiconductor followed by 1239109 (301): Substrate (302): Light-emitting semiconductor (303): N-type contact layer (303a): N electrode layer (303b): first metal flange (304): P-type contact layer (304a): P electrode layer (304b): second metal flange