TWI393273B - Method for manufacturing light emitting diode assembly - Google Patents

Method for manufacturing light emitting diode assembly Download PDF

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Publication number
TWI393273B
TWI393273B TW098128761A TW98128761A TWI393273B TW I393273 B TWI393273 B TW I393273B TW 098128761 A TW098128761 A TW 098128761A TW 98128761 A TW98128761 A TW 98128761A TW I393273 B TWI393273 B TW I393273B
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layer
type electrode
light
led
sub
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TW098128761A
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TW201108467A (en
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Chien Jung Wu
Tsung Ting Sun
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Edison Opto Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81192Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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Description

發光二極體組件之製造方法Method for manufacturing light emitting diode assembly

本發明係關於一種發光二極體(Light Emitting Diode;LED)組件之製造方法,特別是指一種特殊之LED組件之製造方法,其係將LED晶片封裝體直接電性連結於電路基板所製成。The present invention relates to a method for manufacturing a light emitting diode (LED) component, and more particularly to a method for manufacturing a special LED component, which is formed by directly electrically connecting an LED chip package to a circuit substrate. .

在日常生活中,為了能夠在黑暗或陰暗的環境中辨識物體與方位,通常會需要使用發光組件來提供照明。在這些發光組件中,由於發光二極體具備使用壽命長、低功率消耗等優點,故在全球一片節能減碳的風潮中,逐漸獨領風騷,成為主流的照明組件。In everyday life, in order to be able to identify objects and orientations in dark or dark environments, it is often desirable to use illumination components to provide illumination. Among these light-emitting components, since the light-emitting diode has the advantages of long service life and low power consumption, it has gradually become the mainstream lighting component in the global trend of energy saving and carbon reduction.

然而,除了在大範圍的照明用途之外,由於發光二極體具備使用壽命長、低功率消耗等優點,所以亦常被組裝成一發光二極體組件而運用於為電子裝置提供背光或其他相關用途。在眾多發光二極體組件中,由於在透過覆晶技術製作覆晶發光二極體(Light Emitting Diode;LED)封裝結構時,可使LED覆晶結構直接連結於載體基板而不必打線,因此廣為大眾所運用。However, in addition to a wide range of lighting applications, light-emitting diodes are often assembled into a light-emitting diode assembly for backlighting or other related electronic devices because of their long life and low power consumption. use. In a plurality of light-emitting diode assemblies, when a flip-chip diode (Light Emitting Diode (LED) package structure is fabricated by flip chip technology, the LED flip-chip structure can be directly connected to the carrier substrate without wiring, so Used by the public.

在此前提下,以下將進一步結合圖式針對習知利用覆晶LED封裝結構製作LED組件之製程加以說明。請參閱第一A圖至第一E圖,其係顯示之LED組件之一系列製造過程。如第一A圖所示,在製作一覆晶LED封裝結構100(標示於第一E圖)時,必須先製作出一LED覆晶結構1,此時,必須先製備一透光基材層11。Under the premise, the following will further illustrate the process for fabricating an LED component using a flip chip LED package structure in conjunction with the drawings. Please refer to the first A to the first E drawings, which show a series of manufacturing processes of the LED components. As shown in FIG. A, when fabricating a flip chip LED package structure 100 (labeled in the first E diagram), an LED flip chip structure 1 must be fabricated. In this case, a light transmissive substrate layer must be prepared. 11.

接著,必須形成一緩衝層(buffer layer)12、一N型電極包覆子層(N type electrode cladding sub-layer)13、一多重量子井(multiple quantum well)14、一P型電極包覆子層(P type electrode cladding sub-layer)15、一透光導電膜16與一反射層17。Next, a buffer layer 12, an N-type electrode cladding sub-layer 13, a multiple quantum well 14, and a P-type electrode coating must be formed. A P type electrode cladding sub-layer 15 , a light-transmitting conductive film 16 and a reflective layer 17 .

緩衝層12係疊合於透光基材層11;N型電極包覆子層13係疊合於緩衝層12;多重量子井14係局部疊合於N型電極包覆子層13;P型電極包覆子層15係疊合於多重量子井14;透光導電膜16係疊合於P型電極包覆子層15;反射層17係包覆多重量子井14、P型電極包覆子層15與透光導電膜16。然後,必須自透光導電膜16延伸出一P型電極18,並自N型電極包覆子層13延伸出一N型電極19。同時,可在P型電極18與N型電極19分別鍍上金(Gold;Au)、錫(Tin;Sn)或金-錫(Gold-Tin;Au-Sn)合金(未繪製),至此則可製作出上述之LED覆晶結構1。The buffer layer 12 is laminated on the transparent substrate layer 11; the N-type electrode coating sub-layer 13 is laminated on the buffer layer 12; the multiple quantum well 14 is partially superposed on the N-type electrode coating sub-layer 13; The electrode coating sub-layer 15 is superposed on the multiple quantum well 14; the transparent conductive film 16 is laminated on the P-type electrode coating sub-layer 15; the reflective layer 17 is coated with the multiple quantum well 14 and the P-type electrode coated The layer 15 and the light-transmitting conductive film 16. Then, a P-type electrode 18 must be extended from the light-transmitting conductive film 16, and an N-type electrode 19 is extended from the N-type electrode covering sub-layer 13. At the same time, gold (Gold; Au), tin (Tin; Sn) or gold-tin (Gold-Tin; Au-Sn) alloy (not drawn) may be plated on the P-type electrode 18 and the N-type electrode 19, respectively. The LED flip chip structure 1 described above can be fabricated.

如第一B圖所示,接著,必須製備一載體基板2,載體基板2包含一基板本體21、一P型電極層22與一N型電極層23。基板本體21具有一上表面211、一下表面212、一第一側邊213與一第二側邊214。P型電極層22與N型電極層23係分別設置並包覆第一側邊213與第二側邊214。As shown in FIG. B, next, a carrier substrate 2 having a substrate body 21, a P-type electrode layer 22 and an N-type electrode layer 23 must be prepared. The substrate body 21 has an upper surface 211, a lower surface 212, a first side 213 and a second side 214. The P-type electrode layer 22 and the N-type electrode layer 23 are respectively disposed and covered with the first side 213 and the second side 214.

如第一C圖所示,在製備載體基板2後,必須在載體基板2之P型電極層22與N型電極層23分別設置一導電元件3與3a,較佳者,導電元件3與3a可為載體基板2上的鍍金或鍍銀焊點。As shown in FIG. C, after the carrier substrate 2 is prepared, a conductive member 3 and 3a must be respectively disposed on the P-type electrode layer 22 and the N-type electrode layer 23 of the carrier substrate 2. Preferably, the conductive members 3 and 3a are provided. It may be a gold plated or silver plated solder joint on the carrier substrate 2.

如第一D圖所示,當導電元件3與3a為載體基板2上鍍金或鍍銀焊點時,必須將上述之LED覆晶結構1倒置,利用一共晶製程,將環境溫度提升至一共晶溫度,使鍍金或鍍銀焊點中的金或銀元素滲透到P型電極18與N型電極19上所鍍之金(Gold;Au)、錫(Tin;Sn)或金-錫(Gold-Tin;Au-Sn)合金(未繪製)中,藉以使LED覆晶結構1之P型電極18與N型電極19經由導電元件3與3a而分別電性連接於載體基板2之P型電極層22與N型電極層23。在實務應用上,導電元件3與3a亦可為載體基板2上所設置的金(Gold;Au)、錫(Tin;Sn)或金-錫(Gold-Tin;Au-Sn)合金;且P型電極18與N型電極19上可設置鍍金或鍍銀焊點,藉以進行上述之共晶製程。除此之外,當導電元件3與3a為錫球或錫膏時,透過一回焊製程,亦可使P型電極18與N型電極19亦可經由導電元件3與3a而分別電性連接於P型電極層22與N型電極層23。As shown in FIG. D, when the conductive elements 3 and 3a are gold-plated or silver-plated solder joints on the carrier substrate 2, the above-mentioned LED flip-chip structure 1 must be inverted, and the ambient temperature is raised to a eutectic by a eutectic process. The temperature causes the gold or silver element in the gold-plated or silver-plated solder joint to infiltrate the gold (Gold; Au), tin (Tin; Sn) or gold-tin (Gold-) plated on the P-type electrode 18 and the N-type electrode 19. In the Tin; Au-Sn) alloy (not drawn), the P-type electrode 18 and the N-type electrode 19 of the LED flip-chip structure 1 are electrically connected to the P-type electrode layer of the carrier substrate 2 via the conductive elements 3 and 3a, respectively. 22 and N-type electrode layer 23. In practical applications, the conductive elements 3 and 3a may also be gold (Gold; Au), tin (Tin; Sn) or gold-tin (Gold-Tin; Au-Sn) alloy provided on the carrier substrate 2; Gold-plated or silver-plated solder joints may be formed on the type electrode 18 and the N-type electrode 19 to perform the above-described eutectic process. In addition, when the conductive elements 3 and 3a are solder balls or solder pastes, the P-type electrodes 18 and the N-type electrodes 19 can also be electrically connected via the conductive elements 3 and 3a through a reflow process. The P-type electrode layer 22 and the N-type electrode layer 23 are provided.

如第一E圖所示,在將P型電極18與N型電極19分別電性連接於P型電極層22與N型電極層23後,必須將一透光封裝材料4封裝LED覆晶結構1、導電元件3與3a,待透光封裝材料4固化後,便製作出上述之覆晶LED封裝結構100。最後,再將覆晶LED封裝結構100焊接於一電路基板(圖未繪製)上,藉以製作出一LED組件(圖未繪製)。As shown in FIG. E, after the P-type electrode 18 and the N-type electrode 19 are electrically connected to the P-type electrode layer 22 and the N-type electrode layer 23, respectively, a light-transmissive encapsulating material 4 must be packaged with an LED flip-chip structure. 1. The conductive elements 3 and 3a are formed, and after the transparent encapsulating material 4 is cured, the above-mentioned flip chip LED package structure 100 is fabricated. Finally, the flip-chip LED package structure 100 is soldered to a circuit substrate (not shown) to form an LED component (not shown).

舉凡在所屬技術領域中具有通常知識者皆能輕易理解,在以上所揭露的習知技術中,由於必需先將LED覆晶結構1之P型電極18與N型電極19分別電性連接於載體基板2之P型電極層22與N型電極層23,然後再灌入透光封裝材料4封裝LED覆晶結構1、導電元件3與3a;因此,必須同時進行將LED覆晶結構1的結合於載體基板2的焊接製程,封裝LED覆晶結構1以製作出覆晶LED封裝結構100的封裝製程。然後,才能將已完成封裝之覆晶LED封裝結構100焊接於電路基板,藉以製作出LED組件,實在非常不便。It can be easily understood by those skilled in the art that in the above-mentioned prior art, the P-type electrode 18 and the N-type electrode 19 of the LED flip-chip structure 1 must be electrically connected to the carrier, respectively. The P-type electrode layer 22 of the substrate 2 and the N-type electrode layer 23 are then filled into the light-transmissive encapsulating material 4 to encapsulate the LED flip-chip structure 1 and the conductive elements 3 and 3a; therefore, the bonding of the LED flip-chip structure 1 must be simultaneously performed. In the soldering process of the carrier substrate 2, the LED flip chip structure 1 is packaged to fabricate a package process of the flip chip LED package structure 100. Then, it is very inconvenient to solder the flip-chip LED package structure 100 that has been packaged to the circuit substrate, thereby fabricating the LED assembly.

此外,由於在灌入透光封裝材料4時,必須在一模具內施加填充壓力;因此,又容易造成透光封裝材料4溢漏至載體基板2的問題;更有甚者,導電元件3與3a還會受到填充壓力的擠壓而增加導電元件3與3a的電性連接不良率。In addition, since the filling pressure must be applied in a mold when the light-transmitting packaging material 4 is poured; therefore, the problem that the light-transmitting packaging material 4 overflows to the carrier substrate 2 is easily caused; moreover, the conductive member 3 and 3a is also pressed by the filling pressure to increase the electrical connection failure rate of the conductive members 3 and 3a.

在此前提下,本案發明人深感時有必要開發出一種新的LED組件之製造方法藉以同時改善上述種種問題。Under this premise, the inventor of this case deeply felt the need to develop a new method of manufacturing LED components to simultaneously improve the above problems.

有鑒於習知技術所提供之LED組件之製造方法普遍存在必須接續進行共晶製程與封裝製程才能製作出覆晶LED封裝結構等繁瑣製程所帶來的不便,封裝時容易造成透光封裝材料溢漏至載體基板的問題,以及增加導電元件的電性連接不良率等問題。緣此,本發明之主要目的在於提供一種LED組件之製作方法,其係藉由一封裝製程製作出LED晶片封裝體,使LED晶片封裝體具有外露之一P型電極與一N型電極,藉以使所製作出LED晶片封裝體可直接取代製程繁瑣之覆晶LED封裝結構而設置於一電路基板。藉此,可有效同時解決上述之種種問題。In view of the inconvenience that the manufacturing method of the LED component provided by the prior art is continually required to continue the eutectic process and the packaging process to produce a flip-chip LED package structure, the package may easily cause the transparent package material to overflow. The problem of leakage to the carrier substrate and the problem of increasing the electrical connection failure rate of the conductive element. Accordingly, the main object of the present invention is to provide a method for fabricating an LED device by fabricating an LED chip package by a packaging process, such that the LED chip package has an exposed P-type electrode and an N-type electrode. The fabricated LED chip package can be directly disposed on a circuit substrate instead of the cumbersome flip chip LED package structure. Thereby, the above various problems can be effectively solved at the same time.

本發明為解決習知技術之問題,所採用之技術手段係提供一種發光二極體(Light Emitting Diode;LED)封裝組件之製造方法,該製造方法係先在一基材層上被覆一反射層,在該反射層上被覆一發光層,並自發光層穿過反射層而朝向基材層延伸出一P型電極與一N型電極,藉以形成一LED晶片結構;然後,利用一透光封裝材料包覆LED晶片結構,使P型電極與N型電極外露於透光封裝材料,藉以形成LED晶片封裝體;最後,將LED晶片封裝體之P型電極與N型電極電性連結於一電路基板,藉以製作出LED組件。The invention solves the problems of the prior art, and the technical method adopted provides a manufacturing method of a light emitting diode (LED) package assembly, which is first coated with a reflective layer on a substrate layer. Coating a light-emitting layer on the reflective layer, and extending a reflective layer from the light-emitting layer toward the substrate layer to form a P-type electrode and an N-type electrode, thereby forming an LED wafer structure; and then using a transparent package The material encapsulates the LED wafer structure, so that the P-type electrode and the N-type electrode are exposed to the light-transmissive encapsulation material, thereby forming an LED chip package; finally, the P-type electrode and the N-type electrode of the LED chip package are electrically connected to a circuit. The substrate is used to fabricate the LED assembly.

在本發明較佳實施例中,LED晶片結構包含一基材層、一反射層、一透光導電子層(light-transmissible conductive sub-layer)、一P型電極包覆子層(P type electrode cladding sub-layer)、一透光多重量子井(light-transmissible multiple quantum well)與一N型電極包覆子層(N type electrode cladding sub-layer)。反射層係被覆於基材層,透光導電子層係被覆於反射層,P型電極包覆子層係被覆於透光導電子層,透光多重量子井係被覆於P型電極包覆子層,N型電極包覆子層係被覆於透光多重量子井。其中,透光導電子層、P型電極包覆子層、透光多重量子井與N型電極包覆子層可視為上述之發光層。In a preferred embodiment of the present invention, the LED wafer structure comprises a substrate layer, a reflective layer, a light-transmissible conductive sub-layer, and a P-type electrode coating sub-layer (P type electrode). A cladding sub-layer), a light-transmissible multiple quantum well and an N-type electrode cladding sub-layer. The reflective layer is coated on the substrate layer, the light-transmissive conductive sub-layer is coated on the reflective layer, the P-type electrode coating sub-layer is coated on the light-transmitting conductive sub-layer, and the light-transmitting multiple quantum well system is coated on the P-type electrode coated The layer, the N-type electrode coating sub-layer is coated on the light-transmitting multiple quantum well. The light-transmitting conductive sub-layer, the P-type electrode coating sub-layer, the light-transmitting multiple quantum well and the N-type electrode coating sub-layer can be regarded as the above-mentioned light-emitting layer.

相較於習知利用覆晶LED封裝結構製作LED組件之製造方法,由於在本發明例所揭露之LED組件之製造方法中,係直接進行封裝製程而製作出LED晶片封裝體,並使LED晶片封裝體具有外露之一P型電極與一N型電極;因此,所製作出之LED晶片封裝體可直接取代製程繁瑣之覆晶LED封裝結構而設置於一電路基板,藉以製作出LED組件。顯而易見地,藉由上述LED組件之製造方法,可以大幅提升製作LED組件的便利性。In the manufacturing method of the LED component disclosed in the example of the present invention, the LED chip package is directly fabricated by the packaging process, and the LED chip is fabricated. The package has one of the exposed P-type electrodes and an N-type electrode; therefore, the fabricated LED chip package can be directly disposed on a circuit substrate instead of the cumbersome flip-chip LED package structure, thereby fabricating the LED assembly. Obviously, the convenience of fabricating the LED assembly can be greatly improved by the above-described manufacturing method of the LED module.

由於在本發明所揭露之LED組件之製造方法中,係直接進行封裝製程而製作出LED晶片封裝體,在製作LED晶片封裝體的過程中,完全不會使用到載體基板;因此,可以在進行封裝製程中,不僅不存在透光封裝材料溢漏至載體基板的問題,而且也不存在因承受灌入透光封裝材料時所施加的填充壓力所造成之電性連接不良的問題,更可使LED晶片封裝體的體積與LED晶片結構相近,亦即使LED晶片封裝體的體積遠小於習知覆晶LED封裝結構的體積,藉以提升電路基板配置LED晶片封裝體的空間利用率。In the manufacturing method of the LED module disclosed in the present invention, the LED chip package is directly formed by the packaging process, and the carrier substrate is not used at all in the process of fabricating the LED chip package; therefore, it can be performed In the packaging process, there is no problem that the light-transmitting packaging material overflows to the carrier substrate, and there is no problem of poor electrical connection caused by the filling pressure applied when filling the light-transmitting packaging material, and The volume of the LED chip package is similar to that of the LED chip structure, and even if the volume of the LED chip package is much smaller than that of the conventional flip chip LED package structure, the space utilization ratio of the circuit chip package for the LED chip package is improved.

綜整以上所述,藉由本發明所揭露之LED組件之製造方法,不僅可以提升製作LED組件的便利性,還可以提升製作LED組件品質,更可提升電路基板配置LED晶片封裝體之空間利用率。According to the above, the manufacturing method of the LED component disclosed by the present invention can not only improve the convenience of fabricating the LED component, but also improve the quality of the LED component, and improve the space utilization of the LED chip package of the circuit substrate. .

本發明所採用的具體實施例,將藉由以下之實施例及圖式作進一步之說明。The specific embodiments of the present invention will be further described by the following examples and drawings.

本發明所提供之發光二極體(Light Emitting Diode;LED)組件之製造方法可廣泛運用於製作各種LED組件,而且相關之組合實施方式更是不勝枚舉,故在此不再一一贅述,僅列舉其中一個較佳實施例加以具體說明。The manufacturing method of the light emitting diode (LED) component provided by the invention can be widely used in the manufacture of various LED components, and the related combined embodiments are numerous, so it will not be repeated here. Only one of the preferred embodiments will be specifically described.

請參閱第二A圖至第二D圖,其係顯示本發明較佳實施例所建議之LED組件之一系列製程。在本實施例所揭露之重點在於先製作出一LED晶片封裝體200(標示於第二B圖),然候再製作LED組件300(標示於第二D圖)。如第二A圖所示,其係顯示在本發明較佳實施例中,製作LED晶片結構之製程。在製作LED晶片封裝體200時,必須先製作出一LED晶片結構5,此時,必須先製備一基材層51。Please refer to FIGS. 2A to 2D, which show a series of processes for the LED components proposed in the preferred embodiment of the present invention. The focus of the present disclosure is to first fabricate an LED chip package 200 (labeled in FIG. 2B), and then fabricate the LED assembly 300 (labeled in the second D diagram). As shown in FIG. 2A, it shows a process for fabricating an LED wafer structure in a preferred embodiment of the present invention. When the LED chip package 200 is fabricated, an LED wafer structure 5 must be fabricated. In this case, a substrate layer 51 must be prepared.

接著,必須依序形成一反光層52、一透光導電子層(light-transmissible conductive sub-layer)53、一P型電極包覆子層(P type electrode cladding sub-layer)54、一透光多重量子井(light-transmissible multiple quantum well)55與一N型電極包覆子層(N type electrode cladding sub-layer)56。反射層52係被覆於基材層51,透光導電子層53係被覆於反射層52,P型電極包覆子層54係被覆於透光導電子層53,透光多重量子井55係被覆於P型電極包覆子層54,N型電極包覆子層56係被覆於透光多重量子井55。其中,透光導電子層53、P型電極包覆子層54、透光多重量子井55與N型電極包覆子層56可視為一發光層50。Then, a light reflecting layer 52, a light-transmissible conductive sub-layer 53, a P type electrode cladding sub-layer 54 and a light transmissive layer must be sequentially formed. A light-transmissible multiple quantum well 55 and an N type electrode cladding sub-layer 56. The reflective layer 52 is coated on the base material layer 51, the light-transmitting conductive sub-layer 53 is coated on the reflective layer 52, the P-type electrode coating sub-layer 54 is coated on the transparent conductive sub-layer 53, and the light-transmitting multiple quantum well 55 is coated. The P-type electrode coating sub-layer 54 and the N-type electrode coating sub-layer 56 are coated on the light-transmitting multiple quantum well 55. The light-transmitting conductive sub-layer 53, the P-type electrode covering sub-layer 54, the light-transmitting multiple quantum well 55 and the N-type electrode covering sub-layer 56 can be regarded as a light-emitting layer 50.

基材層51可由含有碳化矽(silicon carbide;基材層51可由含有碳化矽(silicon carbide;SiC)、氮化鋁(aluminum oxide;Al2 O3 )、砷化鎵(gallium arsenide;GaAs)、矽(silicon;Si)、藍寶石(sapphire)、銅(copper;Cu)、鎢銅合金(copper-tungsten alloy;Cu-W alloy)與磷化鎵(gallium phosphide;GaP)中之至少一種材料之基板所組成。反射層52可由二氧化鈦與二氧化矽(TiO2 /SiO2 )混合物、三氧化二鋁與二氧化矽(Al2 O3 /SiO2 )混合物、或氮化矽與二氧化矽(Si3 N4 /SiO2 )混合物所組成。透光導電子層53可使用鎳-金(Ni-Au)金屬薄膜,並經高溫(約500至550℃)退火而製成。The base material layer 51 may contain silicon carbide (the base material layer 51 may contain silicon carbide (SiC), aluminum oxide (Al 2 O 3 ), gallium arsenide (GaAs), Substrate of at least one of silicon (Si), sapphire, copper (cop), copper-copper alloy (Cu-W alloy), and gallium phosphide (GaP) The reflective layer 52 may be composed of a mixture of titanium dioxide and cerium oxide (TiO 2 /SiO 2 ), a mixture of aluminum oxide and cerium oxide (Al 2 O 3 /SiO 2 ), or tantalum nitride and cerium oxide (Si). The composition of the 3 N 4 /SiO 2 mixture. The light-transmitting conductive sub-layer 53 can be formed by annealing a nickel-gold (Ni-Au) metal film at a high temperature (about 500 to 550 ° C).

然後,必須利用蝕刻或鑽孔等技術,自基材層51朝向發光層50分別開設一P型電極延伸槽(未標號)與一N型電極延伸槽(未標號)。P型電極延伸槽係開設至接觸於P型電極包覆子層54。N型電極延伸槽則開設至接觸於N型電極包覆子層56,並以一絕緣膜57加以隔絕。接著,必須使一P型電極58自P型電極包覆子層54經由P型電極延伸槽,依序穿過透光導電子層53、反射層52與基材層51而延伸外露;使一N型電極59自N型電極包覆子層56經由N型電極延伸槽,依序穿過透光多重量子井55、P型電極包覆子層54、透光導電子層53、反射層52與基材層51而延伸外露,並且利用絕緣膜57與透光多重量子井55以及P型電極包覆子層54、透光導電子層53、反射層52以及基材層51保持絕緣。至此,則可製作出上述之LED晶片結構5。Then, a P-type electrode extending groove (not labeled) and an N-type electrode extending groove (not labeled) are respectively opened from the base material layer 51 toward the light-emitting layer 50 by a technique such as etching or drilling. The P-type electrode extension groove is opened to contact the P-type electrode coating sub-layer 54. The N-type electrode extending groove is opened to contact the N-type electrode covering sub-layer 56, and is insulated by an insulating film 57. Then, a P-type electrode 58 must be extended from the P-type electrode coating sub-layer 54 through the P-type electrode extending groove, and sequentially extended through the transparent conductive sub-layer 53, the reflective layer 52 and the substrate layer 51; The N-type electrode 59 passes through the N-type electrode extending sub-layer 56 through the N-type electrode extending groove, and sequentially passes through the light-transmitting multiple quantum well 55, the P-type electrode coating sub-layer 54, the light-transmitting conductive sub-layer 53, and the reflective layer 52. The base material layer 51 is extended and exposed, and is insulated from the light-transmitting multiple quantum well 55 and the P-type electrode coating sub-layer 54, the light-transmitting conductive sub-layer 53, the reflective layer 52, and the base material layer 51 by the insulating film 57. Thus far, the LED wafer structure 5 described above can be fabricated.

如第二B圖所示,其係顯示在本發明較佳實施例中,封裝LED晶片結構以製作出LED晶片封裝體之製程。在製作出LED晶片結構5後,可進行一封裝製程。在進行封裝製程時,必須利用一透光封裝材料6包覆LED晶片結構5,使P型電極58與N型電極59保持外露於透光封裝材料6,待透光封裝材料6冷卻固化後,則完成了LED晶片封裝體200之製作。As shown in FIG. 2B, it shows a process for packaging an LED chip structure to fabricate an LED chip package in a preferred embodiment of the present invention. After the LED wafer structure 5 is fabricated, a packaging process can be performed. When the packaging process is performed, the LED chip structure 5 must be covered with a light-transmissive encapsulating material 6 to keep the P-type electrode 58 and the N-type electrode 59 exposed to the transparent encapsulating material 6. After the transparent encapsulating material 6 is cooled and solidified, The fabrication of the LED chip package 200 is completed.

如第二C圖所示,其係顯示在本發明較佳實施例中,製備一電路基板之製程。另外,在製作出LED組件300之前,還必須製備一電路基板7,電路基板7包含一基材層71、一第一電路配置層72與一第二電路配置層73。第一電路配置層72與第二電路配置層73係分別設置於基材層71的兩側。第一電路配置層72與第二電路配置層73中之至少一者係佈設一LED驅動(或控制)電路,在本實施例中,係在第一電路配置層72佈設LED驅動(或控制)電路。較佳者,電路基板7可為FR4(abbreviation for Flame Retardant 4)銅箔基板、印刷電路板或其他佈設LED驅動(或控制)電路之電路基板。As shown in FIG. 2C, it shows a process for preparing a circuit substrate in a preferred embodiment of the present invention. In addition, before the LED assembly 300 is fabricated, a circuit substrate 7 must be prepared. The circuit substrate 7 includes a substrate layer 71, a first circuit arrangement layer 72, and a second circuit arrangement layer 73. The first circuit arrangement layer 72 and the second circuit arrangement layer 73 are respectively disposed on both sides of the substrate layer 71. An LED driving (or control) circuit is disposed on at least one of the first circuit configuration layer 72 and the second circuit configuration layer 73. In the embodiment, the LED driving (or control) is disposed in the first circuit configuration layer 72. Circuit. Preferably, the circuit board 7 can be an FR4 (abbreviation for Flame Retardant 4) copper foil substrate, a printed circuit board or other circuit substrate on which an LED driving (or control) circuit is disposed.

如第二D圖所示,其係顯示在本發明較佳實施例中,將LED晶片封裝體設置並焊接於電路基板之製程。在製備電路基板7後,可將LED晶片封裝體200設置於基板7,使LED晶片封裝體200中之P型電極58與N型電極59電性連接於第一電路配置層72所佈設LED驅動(或控制)電路。較佳者,更可利用一焊接製程使P型電極58與N型電極59電性連接於第一電路配置層72所佈設LED驅動(或控制)電路。在完成焊接製程後,即可製作出上述之LED組件300。較佳者,該焊接製程係利用融熔或半融熔之熔融或半融熔狀態之銲錫球(圖未繪製)或錫膏黏合於P型電極58與N型電極59,或黏合於第一電路配置層72所佈設LED驅動(或控制)電路上之焊接腳(圖未繪製),並進行回焊與低溫固化。As shown in the second D, it is shown in the preferred embodiment of the present invention that the LED chip package is placed and soldered to the circuit substrate. After the circuit board 7 is prepared, the LED chip package 200 can be disposed on the substrate 7 to electrically connect the P-type electrode 58 and the N-type electrode 59 in the LED chip package 200 to the first circuit arrangement layer 72. (or control) the circuit. Preferably, a soldering process is used to electrically connect the P-type electrode 58 and the N-type electrode 59 to the LED driving (or control) circuit disposed in the first circuit configuration layer 72. After the soldering process is completed, the LED assembly 300 described above can be fabricated. Preferably, the soldering process is bonded to the P-type electrode 58 and the N-type electrode 59 by soldering or soldering of a molten or semi-fused molten solder ball (not shown) or solder paste, or bonded to the first The circuit configuration layer 72 is provided with soldering pads on the LED drive (or control) circuit (not shown) and is reflowed and cured at low temperatures.

在閱讀以上所揭露之技術後,相信舉凡在所屬技術領域中具有通常知識者皆能輕易理解,由於在本發明較佳實施例所揭露之LED組件300之製造方法中,係直接進行封裝製程而製作出LED晶片封裝體200,並使LED晶片封裝體200具有外露之P型電極58與N型電極59;因此,所製作出之LED晶片封裝體200可直接取代習知製程繁瑣之覆晶LED封裝結構100而電性連結於電路基板7,藉以使製作出LED組件300。顯而易見地,藉由本發明所揭露之LED組件300之製造方法,可以大幅提升製作LED組件300的便利性。After reading the above-disclosed technology, it is believed that those skilled in the art can easily understand that, in the manufacturing method of the LED component 300 disclosed in the preferred embodiment of the present invention, the packaging process is directly performed. The LED chip package 200 is fabricated, and the LED chip package 200 has the exposed P-type electrode 58 and the N-type electrode 59. Therefore, the fabricated LED chip package 200 can directly replace the conventional chip-wrapped flip-chip LED. The package structure 100 is electrically connected to the circuit substrate 7 so that the LED assembly 300 is fabricated. Obviously, with the manufacturing method of the LED assembly 300 disclosed by the present invention, the convenience of fabricating the LED assembly 300 can be greatly improved.

由於在本發明所揭露之LED組件300之製造方法中,係直接進行封裝製程而製作出LED晶片封裝體200,在製作LED晶片封裝體200的過程中,完全不會使用到習知技術中的載體基板2;因此,可以在進行封裝製程中,不僅不存在透光封裝材料6溢漏至載體基板2的問題,而且也不存在因承受灌入透光封裝材料6時所施加的填充壓力所造成之電性連接不良的問題,更可使LED晶片封裝體200的體積與LED晶片結構5相近,亦即使LED晶片封裝體200的體積遠小於習知覆晶LED封裝結構100的體積,藉以提升電路基板7配置LED晶片封裝體200的空間利用率。In the manufacturing method of the LED module 300 disclosed in the present invention, the LED chip package 200 is directly formed by the packaging process, and the LED chip package 200 is not used in the prior art. The carrier substrate 2; therefore, in the packaging process, there is no problem that the light-transmissive encapsulating material 6 overflows to the carrier substrate 2, and there is no filling pressure applied when the light-filling encapsulating material 6 is filled. The problem of the poor electrical connection is made that the volume of the LED chip package 200 is similar to that of the LED chip structure 5, and even if the volume of the LED chip package 200 is much smaller than the volume of the conventional flip chip LED package structure 100, the The circuit board 7 configures the space utilization ratio of the LED chip package 200.

綜整以上所述,藉由本發明所揭露之LED組件300之製造方法,不僅可以提升製作LED組件300的便利性,還可以提升製作LED組件300品質,更可提升電路基板7配置LED晶片封裝體200之空間利用率。According to the above, the manufacturing method of the LED assembly 300 disclosed in the present invention can not only improve the convenience of fabricating the LED assembly 300, but also improve the quality of the LED assembly 300, and further improve the configuration of the LED chip package on the circuit substrate 7. 200 space utilization.

藉由上述之本發明實施例可知,本發明確具產業上之利用價值。惟以上之實施例說明,僅為本發明之較佳實施例說明,舉凡所屬技術領域中具有通常知識者當可依據本發明之上述實施例說明而作其它種種之改良及變化。然而這些依據本發明實施例所作的種種改良及變化,當仍屬於本發明之發明精神及界定之專利範圍內。It can be seen from the above embodiments of the present invention that the present invention has industrial utilization value. The above embodiments are merely illustrative of the preferred embodiments of the present invention, and those skilled in the art will be able to make various other modifications and changes in the embodiments described herein. However, various modifications and changes made in accordance with the embodiments of the present invention are still within the scope of the invention and the scope of the invention.

100...覆晶LED封裝結構100. . . Flip chip LED package structure

1...LED覆晶結構1. . . LED flip chip structure

11...透光基材層11. . . Light transmissive substrate layer

12...緩衝層12. . . The buffer layer

13...N型電極包覆子層13. . . N-type electrode coating sublayer

14...多重量子井14. . . Multiple quantum well

15...P型電極包覆子層15. . . P-type electrode coating sublayer

16...透光導電膜16. . . Light-transmitting conductive film

17...反射層17. . . Reflective layer

18...P型電極18. . . P-type electrode

19...N型電極19. . . N-type electrode

12...緩衝層12. . . The buffer layer

2...載體基板2. . . Carrier substrate

21...基板本體twenty one. . . Substrate body

211...上表面211. . . Upper surface

212...下表面212. . . lower surface

213...第一側邊213. . . First side

214...第二側邊214. . . Second side

22...P型電極層twenty two. . . P-type electrode layer

23...N型電極層twenty three. . . N-type electrode layer

3、3a...導電元件3, 3a. . . Conductive component

4...透光封裝材料4. . . Light-transmissive packaging material

200...LED晶片封裝體200. . . LED chip package

300...LED組件300. . . LED assembly

5...LED晶片結構5. . . LED chip structure

51...基材層51. . . Substrate layer

52...反射層52. . . Reflective layer

53...透光導電子層53. . . Light-transmissive conductive sublayer

54...P型電極包覆子層54. . . P-type electrode coating sublayer

55...透光多重量子井55. . . Light transmissive multiple quantum well

56...N型電極包覆子層56. . . N-type electrode coating sublayer

57...絕緣膜57. . . Insulating film

58...P型電極58. . . P-type electrode

59...N型電極59. . . N-type electrode

6...透光封裝材料6. . . Light-transmissive packaging material

7...電路基板7. . . Circuit substrate

71...基材層71. . . Substrate layer

72...第一電路配置層72. . . First circuit configuration layer

73...第二電路配置層73. . . Second circuit configuration layer

第一A圖至第一E圖係顯示習知之LED組件之一系列製造過程;The first to first E drawings show a series of manufacturing processes of a conventional LED assembly;

第二A圖係顯示在本發明較佳實施例中,製作LED晶片結構之製程;2A is a process for fabricating an LED wafer structure in a preferred embodiment of the present invention;

第二B圖係顯示在本發明較佳實施例中,封裝LED晶片結構以製作出LED晶片封裝體之製程;2B is a process for packaging an LED chip structure to fabricate an LED chip package in a preferred embodiment of the present invention;

第二C圖係顯示在本發明較佳實施例中,製備電路基板之製程;以及The second C diagram shows a process for preparing a circuit substrate in a preferred embodiment of the present invention;

第二D圖係顯示在本發明較佳實施例中,將LED晶片封裝體設置並焊接於電路基板之製程。The second D diagram shows a process for mounting and soldering an LED chip package to a circuit substrate in a preferred embodiment of the present invention.

200...LED晶片封裝體200. . . LED chip package

300...LED組件300. . . LED assembly

5...LED晶片結構5. . . LED chip structure

50...發光層50. . . Luminous layer

51...基材層51. . . Substrate layer

52...反射層52. . . Reflective layer

53...透光導電子層53. . . Light-transmissive conductive sublayer

54...P型電極包覆子層54. . . P-type electrode coating sublayer

55...透光多重量子井55. . . Light transmissive multiple quantum well

56...N型電極包覆子層56. . . N-type electrode coating sublayer

57...絕緣膜57. . . Insulating film

58...P型電極58. . . P-type electrode

59...N型電極59. . . N-type electrode

6...透光封裝材料6. . . Light-transmissive packaging material

7...電路基板7. . . Circuit substrate

71...基材層71. . . Substrate layer

72...第一電路配置層72. . . First circuit configuration layer

73...第二電路配置層73. . . Second circuit configuration layer

Claims (9)

一種發光二極體(Light Emitting Diode;LED)組件之製造方法,包含以下步驟:(a)在一基材層上被覆一反射層,並在該反射層上被覆一發光層;(b)自該發光層穿過該反射層而朝向該基材層延伸出一P型電極與一N型電極,藉以形成一LED晶片結構;以及(c)利用一透光封裝材料包覆該LED晶片結構,使該P型電極與該N型電極外露於該透光封裝材料而形成一LED晶片封裝體;以及(d)將該LED晶片封裝體之該P型電極與該N型電極電性連結於一電路基板,藉以製造出該LED組件。A method for manufacturing a Light Emitting Diode (LED) module, comprising the steps of: (a) coating a reflective layer on a substrate layer, and coating a light-emitting layer on the reflective layer; (b) The luminescent layer passes through the reflective layer to extend a P-type electrode and an N-type electrode toward the substrate layer, thereby forming an LED wafer structure; and (c) coating the LED wafer structure with a light-transmissive encapsulation material, And exposing the P-type electrode and the N-type electrode to the light-transmissive encapsulating material to form an LED chip package; and (d) electrically connecting the P-type electrode and the N-type electrode of the LED chip package to the N-type electrode The circuit substrate is used to manufacture the LED assembly. 如申請專利範圍第1項所述之發光二極體組件之製造方法,其中,在該步驟(a)中之該發光層包含:一透光導電子層(light-transmissible conductive sub-layer),係被覆於該反射層;一P型電極包覆子層(P type electrode cladding sub-layer),係被覆於該透光導電子層;一透光多重量子井(light-transmissible multiple quantum well),係被覆於該P型電極包覆子層;以及一N型電極包覆子層(N type electrode cladding sub-layer),係被覆於該透光多重量子井。The method for manufacturing a light-emitting diode assembly according to the first aspect of the invention, wherein the light-emitting layer in the step (a) comprises: a light-transmissible conductive sub-layer, A P-type electrode cladding sub-layer is coated on the light-transmissive conductive sub-layer; a light-transmissible multiple quantum well, The P-type electrode coating sub-layer is coated on the P-type electrode coating sub-layer; and an N-type electrode cladding sub-layer is coated on the light-transmitting multiple quantum well. 如申請專利範圍第2項所述之發光二極體組件之製造方法,其中,該P型電極係自該P型電極包覆子層依序穿過該透光導電子層、該反射層與該基材層而延伸出。The method for manufacturing a light-emitting diode assembly according to claim 2, wherein the P-type electrode sequentially passes through the transparent conductive sub-layer from the P-type electrode coating sub-layer, the reflective layer and The substrate layer extends. 如申請專利範圍第2項所述之發光二極體組件之製造方法,其中,該N型電極係自該N型電極包覆子層依序穿過該透光多重量子井、該P型電極包覆子層、該透光導電子層、該反射層與該基材層而延伸出,並利用一絕緣模與該透光多重量子井以及該P型電極包覆子層保持絕緣。The method for manufacturing a light-emitting diode assembly according to claim 2, wherein the N-type electrode sequentially passes through the light-transmitting multiple quantum well from the N-type electrode coating sub-layer, and the P-type electrode The coating sub-layer, the light-transmitting conductive sub-layer, the reflective layer and the substrate layer are extended, and are insulated from the light-transmitting multiple quantum well and the P-type electrode coating sub-layer by an insulating mold. 如申請專利範圍第2項所述之發光二極體組件之製造方法,其中,該透光導電子層係利用將一鎳-金(Ni-Au)金屬薄膜經500至550℃退火而製成。The method for manufacturing a light-emitting diode assembly according to claim 2, wherein the light-transmitting conductive sub-layer is formed by annealing a nickel-gold (Ni-Au) metal film at 500 to 550 ° C. . 如申請專利範圍第1項所述之發光二極體組件之製造方法,其中,該反射層係由二氧化鈦與二氧化矽(TiO2 /SiO2 )混合物、三氧化二鋁與二氧化矽(Al2 O3 /SiO2 )混合物以及氮化矽與二氧化矽(Si3 N4 /SiO2 )混合物中之一至少一者所組成。The method for manufacturing a light-emitting diode assembly according to claim 1, wherein the reflective layer is a mixture of titanium dioxide and cerium oxide (TiO 2 /SiO 2 ), aluminum oxide and germanium dioxide (Al). A 2 O 3 /SiO 2 ) mixture and at least one of a mixture of cerium nitride and cerium oxide (Si 3 N 4 /SiO 2 ). 如申請專利範圍第1項所述之發光二極體組件之製造方法,其中,在該步驟(d)中,係利用一焊接製程使該P型電極與該N型電極電性連接於該電路基板。The method for manufacturing a light-emitting diode assembly according to claim 1, wherein in the step (d), the P-type electrode and the N-type electrode are electrically connected to the circuit by a soldering process. Substrate. 如申請專利範圍第1項所述之發光二極體組件之製造方法,其中,該電路基板係為一印刷電路板。The method of manufacturing a light-emitting diode assembly according to claim 1, wherein the circuit substrate is a printed circuit board. 如申請專利範圍第8項所述之發光二極體組件之製造方法,其中,該印刷電路板係為一FR4(abbreviation for Flame Retardant 4)銅箔基板。The method of manufacturing a light-emitting diode assembly according to claim 8, wherein the printed circuit board is an FR4 (abbreviation for Flame Retardant 4) copper foil substrate.
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