TWI226668B - Manufacturing method for sub-micrometer T-shaped double time gate etchings - Google Patents

Abstract

The present invention is related to the manufacturing method for sub-micrometer T-shaped double time gate etchings. A new four-layer positive photoresist (PR) assembling manner is proposed; and by using single positioning exposure through the application of electron beam photolithography system, T-shaped gate can be formed such that the problem of having over-high resistance for the gate of sub-micrometer field effect transistor can be solved. By using gate etching twice, the breakdown voltage and lifetime of integrated circuit are increased, and the device manufacture yield is increased. In the invented method, only one time of positioning and electron beam exposure is required; and I-shaped opening with sub-micrometer line-width can be formed for conducting two times of gate etching after tow times of developing process through the use of developer. As compared with the conventional technique, the present invention has higher efficiency, progress characteristic and industrial utilization value.

Description

1226668

[Technical field to which the invention belongs] The present invention relates to a method for manufacturing sub-micron τ-type double gate etching. #Inch is related to a new four-layer positive photoresistor combination, using an electron beam lithography system, to Sub-position electron beam exposure, and double gate etching with developer double = development 'to form sub-micron T-gate method. [Previous technology]

According to the current development of current microwave wireless communications, high-power and high-crash-voltage-kun-marine-speed-field-effect transistors play an extremely important role. In order to increase the breakdown voltage and lifetime of integrated circuits, the dual gates of active components are redundant. ^ Technology is a very important process step. x The double-gate etching technique of the conventional method requires two positioning, exposure, development, and etching processes to achieve double-gate etching. It first performs the first positioning exposure, development, and etching, and then uses the second positioning, using electron beam lithography technology and three-layer photoresist to make sub-micron T-gates.

This technology for manufacturing T-gates uses three layers of polymethyl methacrylate, polymethyl methacrylate / methyl acrylic acid, and poly methyl acrylate (P with A, p (MMA / MAA), PMMA). The photoresist is obtained by electron beam exposure. In the exposure process, first use a smaller line width and higher energy electron beam to expose the underlying photoresist to a smaller portion; then use a larger line " wide and lower energy electron beam to expose The exposed parts of the upper and middle photoresists are relatively wide. After development, the metal is etched and plated again to obtain submicron T-gates. Please refer to Figures 1a to 1i for more detailed steps of this method in the gallium arsenide or phosphorus method. See picture 1a

Page 1226668 V. Description of the invention (2) The first epitaxial layer 12 and the second epitaxial layer 14 are grown on the indium-based substrate 10; then the second epitaxial layer 14 is covered with a photoresist 16 (that is, Polymethylmethacrylate / methacrylic acid (p (MMA / MAA))) for the first positioning exposure 'and then remove the photosensitive part of photoresist 16 with a developing solution; see Figure 1b, etching After that, please refer to Figure 1c, and then remove the photoresist 16 with acetone; please refer to Figure 1d, and then cover the first layer of photoresist 2 0 (that is, polymethyl methacrylate ( PMMa)) and a second layer of photoresist 2 2 (that is, polymethyl methacrylate / methacrylic acid (P (MMA / MAA))), and then a third layer of photoresist 2 4 (that is, polymethyl methacrylate) Ester (PMMA)) Please refer to Figure 1e. Exposure with electron beams of different energies, respectively, to obtain different photosensitive areas between different layers of photoresist, and then use the developer to remove the first layer of photoresist 2 2, Photosensitive part of the second layer of photoresist 24 and third layer of photoresist 2 6; please refer to figure 1f, after etching again; please refer to the figure, vapor deposition metal 31, because the third layer Photoresist 26 The second resistance 24 has a different opening width to form a suspension, so the metal is deposited. Λ ^ ^ is connected into a sheet. Therefore, when the metal shown in FIG. 1h is removed, the second is easy to remove, and the yield is better. . There are two ways of this double-gate etching technology! !! It is difficult to remove the metal. However, due to the need for two positioning exposures ^ ^ ^ ^ | It is complicated, long production time and high cost, and it is not suitable for industrial use. For this reason, the main purpose of this invention is to propose a manufacturing furnace with sub-micron gate-engraved carving, w AA clothing 1 million yuan, which uses four layers of positive light Resistance structure, a method of T-type double-one gate erosion of field-effect transistor formed by early positioning of electron 戾 雔 + bucket kt meter exposure, by mh

--__ The first four layers are composed of electron beam photosensitivity 1226668 V. Description of the invention (3) and positive photoresistors with different resolutions, only need to be exposed by electron beam ^ times, and then developed by the shadow solution After that, the photoresist can be formed into a type opening. Compared with the conventional method, two positioning exposures are required, which can save one positioning exposure time and reduce the component manufacturing cost; and the special Γ type opening formed by the four-layer positive photoresist can be used The double gate etch increases the breakdown voltage and lifetime of the integrated circuit and increases the yield of component manufacturing. In order to further disclose the method, advantages and features of the present invention, the preferred embodiments are described below with reference to the drawings, in which: Figures 2a to 2h show the invention using a four-layer photoresist to form a T-type Schematic diagram of the double gate etch process. [Summary] For this reason, the object of the present invention is to provide a fabrication method of sub-micron T-type double gate-etching, which is suitable for high-speed field-effect transistor devices, and includes the following steps: (I) a semiconductor base After the epitaxial layer with the necessary structure is grown on the epitaxial layer, the first layer of photoresistance, the second layer of photoresistance, the third layer of photoresistance, and the fourth layer of photoresistance are sequentially covered on the epitaxial layer. The thickness of the photoresist is greater than the thickness of the fourth photoresist. The thickness of the fourth photoresist is less than the thickness of the second photoresist. The thickness of the first photoresist is less than or equal to that of the second photoresist. And the photosensitivity of the third layer of photoresist is greater than the photosensitivity of the second and fourth photoresistors; (II) a single positioning exposure using the electron beam, while exposing the aforementioned first layer of photoresist, The second layer of photoresist, the third layer of photoresist and the fourth layer of photoresist; (III) developing with a developing solution (1), removing the aforementioned second layer of photoresist,

Page 8 1226668 V. Description of the invention (4) Three layers of photoresist and the photosensitive portion of the fourth layer of photoresist to form a τ-shaped opening; (IV) Once again with a developer (2) development, remove the T-shaped opening The photosensitive part of the first layer of photoresist does not affect the photosensitive part of the second layer, the third layer of photoresist, and the fourth layer of photoresist, and forms an I-type opening; (V) wet type I Part of the epitaxial layer under the opening; (VI) Dry etching Part of the worm crystal layer under the type I opening, (VII) Fill the T-type opening with metal evaporation; (VIII) Remove the remaining light Resistance to form a T-gate. Wherein, after the aforementioned steps of covering the first layer of photoresist, the second layer of photoresist, the third layer of photoresist, and the fourth layer of photoresist, the photoresist is pre-baked for about 20 minutes. The photoresist of the second layer and the photoresist of the fourth layer are composed of polymethyl methacrylate (PMMA). The photoresist of the third layer is composed of polymethyl methacrylate / methacrylic acid (P (MMA / MAA)). Wherein, the aforementioned first layer of photoresist is composed of polymethyl glutarimide (PMGI). The semiconductor base may be gallium arsenide, indium phosphide, or gallium nitride. The total thickness of the first layer of photoresist, the second layer of photoresist, the third layer of photoresist, and the fourth layer of photoresist is between 0.7 // m to 1. 5 // m. Wherein, the opening of the aforementioned second layer of photoresist is about 0.1 // m to 0.5 // m. 0

1226668 V. Description of the invention (5) Among them, where the steam (MIBK) is the main one, the (DeveloplOl where the opening of the front photoresistor is formed, and the opening of the third layer photoresist is much larger than that of the second layer of light, The former is about 2: 1 to which, the former structure. Among them, the structure of the precursor. Among them, the former structure. The following are provided to enable the statement to be based on reality

The plated metal may be a titanium / gold / platinum metal. The developing solution (1) used is made of methyl isobutyl ketone and diluted with isopropyl alcohol (IPA) solution. The developing solution (2) used is tetraethylammonium hydrogenation) The T-shaped opening is composed of the openings of the first layer of photoresist, the openings of the second layer of the third layer of photoresist, and the openings of the fourth layer of photoresist The opening of the photoresist is larger than that of the fourth layer of photoresist, the fourth layer is in the opening of the second layer of photoresist, and the opening of the first layer of photoresist is blocking the opening. The thickness of the deposited metal is about 300 nm to 500 nm. The ratio of the opening of the three-layer photoresist and the opening of the second-layer photoresist is between 4: 1. The stupid layer can be formed as a gold half field effect transistor. The stupid layer can be formed as a two-electron mobility field effect transistor. The epitaxial layer can be formed as a heterojunction field effect transistor. The illustrations of the examples further illustrate that those who are familiar with the related technology of the present invention may apply it according to this specification. Formula] As shown in Figures 2a to 2h, the use of the present invention

Page 101226668 V. Description of the invention (6) Manufacturing method of single-position electron beam exposure twice development etching to form sub-micron T-type double gate etching; firstly, gallium halide, indium filled or gallium nitride The first worm crystal layer 4 2 and the second stupid crystal layer 4 4 of the desired structure are grown on the base 4 Q, and then the first photoresist layer 5 is coated by the photoresist spin coating method. Pre-bake for 20 minutes on the crystal layer 4 4 and cover it with the second layer of photoresist 5 2 on the first layer of photoresist 50. Also pre-bake for 20 minutes and then cover with the third layer of photoresist 5 4 on the second layer of photoresist 5 2 and pre-baked for another 20 minutes, and then cover the fourth layer of photoresist 5 6 on the third layer of photoresist 5 4 and pre-baked for another 2 minutes; please Refer to Figure 2a, and then perform exposure with the sub-beam of the electron beam lithography system, the electron beam acceleration voltage is 2 OKV, the electron beam dose is 40 to 30 OuC / cm2, and the four layers of photoresist are formed differently. The first photosensitive region 60 and the second photosensitive region 62; please refer to the figure, developing with a developing solution to form an I-shaped opening;

I part of the second stupid crystal layer 4 4 is shown in FIG. 2 f, and then the metal 7 0 is vapor-deposited by the electronic plating method, so that the vapor-deposited metal 70 0 is filled in the τ-type opening. The metal 70 can be titanium, gold, platinum and other metals; please refer to Figure 2, and finally remove the steam-bonded metal 7 attached to the photoresist with acetone. 〇§ Then use 1-methyl-2-azapentanone (Stripper) The first layer of photoresistor 50 is removed to form a sub-micron T-gate. The aforementioned four layers of positive photoresistances are each composed of photoresistors with different sensitivity of the electron beam. The first layer of photoresistor 50 is made of polymethylmethacrylate. It is composed of p-methylene diamine (pMGI). The second layer 52 and the fourth layer photoresistor 56 are low-residual light sensitivity and high-resolution positive photoresistance.

Page 11 1226668 V. Description of the invention (7) (PMMA), the second layer of photoresist 5 2 After exposure and development, it can form the opening of Schottky gate contact. The smallest width can form the opening of the photosensitive area from 0 · l // m to 0.5 // m; the thickness T4 of the fourth layer of photoresistor 56 is thinner than the thickness T2 of the second layer of photoresistor 5 2 to form a vertical Overhang, the photosensitivity is greater than the photoresist of the second layer 5 2, so the opening formed after development is larger than the opening formed by the photoresist of the second layer 5 2-but it is more sensitive than the photoresist of the third layer 5 4 Low, the line width of this opening is smaller than the opening of the second layer of photoresist 5 2, so it will form a hang. This hang is used as an auxiliary metal removal, which can improve the flatness of the cross section of the evaporated metal 70. And improve yield. In addition, the third layer photoresist 54 is a high (electron beam) photosensitivity positive photoresist. Its composition is polymethyl methacrylate / methacrylic acid (P-(MMA / MAA)). Thick photoresist layer, so the thickness T3 of the third photoresist 54 _ is greater than the thickness T2 of the second photoresist 5 2, and the thickness T2 of the second photoresist 5 2 is greater than the thickness of the fourth photoresist 56 T4, because of its (electron beam) photosensitivity, after the electron beam exposure, the photosensitive part is larger. After the developing solution is developed, a large line width opening can be formed, which is wider than the second and fourth layers. The openings of the photoresist 52, 56 are large, and the ratio of the opening (line width) of the third layer photoresist 54 and the second layer photoresist 5 2 is about 2: 1 to 4: 1. As for the developing step, the second layer of photoresist 5 2, the third layer of photo resist 5 4 and the fourth layer of photo resist 5 6 are developed by the developing solution (1); please refer to FIG. 2 c In order to form a T-shaped opening with a wide top and a narrow bottom, the developing solution (1) is mainly composed of methyl isobutyl ketone (MIBK), and isopropyl alcohol

Page 1212668 6 V. Description of the invention (8): IPA) Solution dilution, this developer (i) can simultaneously develop the second layer of light ^ 2, the third layer of photoresist 5 4 and the fourth layer of photoresist 5 6 region. 'The developing solution (2) shows the photosensitive area of the first layer of photoresist 52, and the composition of the V solution (2) is tetraethylammonium hydrogenate (Developl 〇1). The shape of the two-layer photoresistor 5 2. The third layer of photoresistor 54 and the fourth layer of photoresistor 56; please refer to FIG. 2 (5), the total thickness of the four-layer photoresistor is about 0.7um to 1.5 · Wet etching is used again; please refer to Figure 2e and dry etching; please refer to Figure 2f. The layer 44 forms a double gate etch J; after that, the thickness of the gold j 7 0 is about 300 nm to 500 nm. In the step of removing the gold 70, the hafnium is plated with metal 7 0. After the wafer is immersed in acetone, the second layer of photoresist 52, the third layer of photoresist 54 and the fourth layer of photoresist 5 6 are all soluble in acetone, so that the bond metal 7 outside the τ-type electrode area Lift off, and then immerse the wafer in dimethyl-2-azapentanone (Stripper) to remove the first layer of photoresist 50. Please refer to FIG. 211. The manufacturing method of the sub-micron T-gate of the present invention is mainly applied to gold Half field effect transistor (MESFET) and High electron mobility field effect transistors (HEMT) and heterojunction field effect transistors (HFETs), that is, different components of the aforementioned epitaxial layer structure will form different components. This type of gold half field effect transistor consists of a source ( source), drain 'gate, and conduction channel, where the source and ohmic contact between the metal and semiconductor, and the gate is a metal-semiconductor Schottky contact, The conduction electrons from the source through the conduction channel to the drain are drain current, while the gate is

Page 13 1226668 V. Description of the invention (9) The magnitude of the modulating (m o d u 1 a t e) non-polar current. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

Page 14 1226668 Brief description of the drawings [Simplified description of the drawings] Figures 1a to 1i show the conventionally used two positioning exposures to develop the #etched T-gate double-gate etching technology. Figures 2a to 2h are diagrams illustrating a manufacturing method for forming a sub-micron T-type double gate etch using a single positioning electron beam exposure and two development etchings of the present invention. [Illustration of drawing number] Substrate. 1 0 first epitaxial layer 1 2 second epitaxial layer 1 4 photoresist layer 1 6 first photoresist 20 second photoresist 22 third photoresist 2 2 3 1 Base 4 0 First epitaxial layer 4 2 Second epitaxial layer 4 4 First layer photoresistor 50 Second layer photoresistor 52 Third layer photoresistor 54 Fourth layer photoresistor 56 First photosensitive region 60 Two photosensitive areas 62 Evaporated metal 7 0 Thickness of second photoresistor T 2 Thickness of third photoresistor T 3 Thickness of fourth photoresistor T4

Page 15

Claims (1)

1226668 VI. Application for Patent Scope 1. A method for manufacturing sub-micron τ-type double gate etch, suitable for high-speed field effect transistor devices, including the following steps: (I) growing a necessary structure on a semiconductor substrate. After the crystal layer, the epitaxial layer is sequentially covered with a first layer of photoresist, a second layer of photoresist, a third layer of photoresist, and a fourth layer of photoresist, respectively. The thickness of the third layer is greater than that of the fourth layer. The thickness of the photoresist, the thickness of the fourth layer is smaller than that of the second layer, and the thickness of the first layer is less than or equal to the thickness of the second layer, and the third layer is The photosensitivity of the electron beam is greater than that of the second and fourth photoresistors; (II) A single positioning exposure using the electron beam, while exposing the aforementioned first photoresist, second photoresist, and third layer simultaneously Photoresist and the fourth layer of photoresist; (III) developing with a developing solution (1), removing the photosensitive part of the second layer of photoresist, the third layer of photoresist and the fourth layer of photoresist to form a T-shaped opening; (IV) Develop with developer (2) again to remove the first layer under the T-shaped opening The photosensitive part of the resist does not affect the photosensitive part of the second layer, the third layer, and the fourth layer, and forms an I-type opening; (V) Wetetching the portion under the I-type opening Worm crystal layer; (VI) dry etching part of the worm crystal layer under the type I opening, (VII) filling the metal into the T type opening by evaporation; (VIII) removing the remaining photoresist, Form a T-gate. 2. The manufacturing method according to item 1 of the scope of patent application, wherein the first layer of photoresist, the second layer of photoresist, the third layer of photoresist, and the fourth layer are covered. Page 16 1226668 VI. Patent Application Range After the photoresist step, pre-bake the photoresist for about 20 minutes. 3. The manufacturing method according to item 1 of the scope of patent application, wherein the second layer of photoresist and the fourth layer of photoresist are composed of polymethylpropionate (PMMA). 4. The manufacturing method according to item 1 of the scope of patent application, wherein the third layer of photoresist is composed of polymethyl methyl acrylate / methyl acrylic acid (P (MMA / MAA)). 5. The manufacturing method according to item 1 of the scope of the patent application, wherein the first layer of photoresist is composed of polymethylglutarimide (PMGI). 6. The manufacturing method according to item 1 of the scope of patent application, wherein the semiconductor base may be gallium arsenide, indium phosphide, or gallium nitride. 7. The manufacturing method according to item 1 of the scope of patent application, wherein the total thickness of the first layer photoresist, the second layer photoresist, the third layer photoresist, and the fourth layer photoresist is 0.7 / 7 / m to 1.5 / zm. 8. The manufacturing method according to item 1 of the scope of the patent application, wherein the opening of the second layer of photoresist is between about 0.1 · 0.5 to m //. 9. The manufacturing method according to item 1 of the scope of patent application, wherein the metal of the steamed clock can be titanium / gold / turn metal. 10. The manufacturing method according to item 1 of the scope of patent application, wherein the developing solution (1) used is mainly methyl isobutyl ketone (MIBK), and is diluted with an isopropyl alcohol (IPA) solution Made. 11. The manufacturing method as described in item 1 of the scope of patent application, wherein the developing solution (2) used is tetraethylammonium hydrogenation (DeveloplOl). Page 17 1226668 VI. Patent application scope 1 2 The manufacturing method as described in item 1 of the patent application scope, wherein the T-shaped opening is composed of the opening of the first layer of photoresist, the opening of the second layer of photoresist, The opening of the three-layer photoresist and the opening of the fourth layer of photoresist, and the opening of the third layer of photoresist is larger than the opening of the fourth layer of photoresist, the opening of the fourth layer of photoresist is larger than the opening of the second layer of photoresistor, and The opening of the first layer of photoresist is larger than the opening of the second layer of photoresist. 13. The manufacturing method according to item 1 of the scope of patent application, wherein the metal thickness of the aforementioned steamed ore is about 300 nm to 500 nm. 14. The manufacturing method according to item 7 of the scope of patent application, wherein the ratio of the opening of the third layer of the photoresist and the opening of the second layer of the photoresist is about 2: 1 to 4: 1. 15. The manufacturing method according to item 1 of the scope of patent application, wherein the stupid crystal layer can be formed into a structure of a gold half field effect transistor. 16. The manufacturing method according to item 1 of the scope of patent application, wherein the epitaxial layer can be formed into a structure of a high-electron mobility field effect transistor. 17. The manufacturing method according to item 1 of the scope of patent application, wherein the epitaxial layer can be formed into a structure of a heterojunction field effect transistor. Page 18