TW200416899A - Manufacturing method for sub-micrometer T-shaped double time gate etchings - Google Patents

Manufacturing method for sub-micrometer T-shaped double time gate etchings Download PDF

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TW200416899A
TW200416899A TW92131601A TW92131601A TW200416899A TW 200416899 A TW200416899 A TW 200416899A TW 92131601 A TW92131601 A TW 92131601A TW 92131601 A TW92131601 A TW 92131601A TW 200416899 A TW200416899 A TW 200416899A
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layer
photoresist
opening
item
manufacturing
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TW92131601A
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TWI226668B (en
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Yi-Ren Jan
ming-zhi Hu
xian-qin Qiu
shi-cheng Yang
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Univ Nat Central
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Abstract

The present invention is related to the manufacturing method for sub-micrometer T-shaped double time gate etchings. A new four-layer positive photoresist (PR) assembling manner is proposed; and by using single positioning exposure through the application of electron beam photolithography system, T-shaped gate can be formed such that the problem of having over-high resistance for the gate of sub-micrometer field effect transistor can be solved. By using gate etching twice, the breakdown voltage and lifetime of integrated circuit are increased, and the device manufacture yield is increased. In the invented method, only one time of positioning and electron beam exposure is required; and I-shaped opening with sub-micrometer line-width can be formed for conducting two times of gate etching after tow times of developing process through the use of developer. As compared with the conventional technique, the present invention has higher efficiency, progress characteristic and industrial utilization value.

Description

200416899200416899

五、發明說明(1) 【發明所屬之技術領域】 本發明係有關於一種次微来τ 4 方法,特別係有關於以一種新的型雙次閘極蝕刻的製作 子束微影系統,以單次定位電子四層正光阻組合,利用電 顯影,來進行雙次閘極蝕刻,束曝光’並以顯影液雙次 法。 形成次微米τ型閘極的方 【先前技術】 知Γ目前現有微波無線通訊的 砷化鎵高速場效應電晶體扮演著^展’局功率高崩潰電壓 加積體電路的崩潰電壓與生命期$重要的地位’為了使增 技術即為一個非常重要的製程步驟主動兀件的雙閘極蝕刻 ^知方法的雙間極則技術須分別進行兩 先、顯影、及蝕刻後才能達成雙閉極蝕刻。其首m 一次的定位曝光、顯影、蝕刻之後再利用第二次的定2弟 利用電子束微影技術及三層光阻來製作次微米τ型閘極。 此種製造T型閘的技術係利用聚甲基丙烯酸曱酯、聚甲基 丙烯酸甲酯/甲基丙烯酸、聚甲基丙烯酸甲酯(P隨A、P (MMA/MAA)、PMMA )三層光阻以電子束曝光而獲得。 在曝光過程中,先用較小線寬、較高能量之電子束曝 $ ’使底層光阻被曝光之部分較為細小;然後再用較大線 ,:較低能量之電子束曝光,使上層及中層光阻被曝光部 刀車乂為覓廣。在顯影後再次餘刻鑛上金屬,即可得到次微 米T型閘極。請參閱第i a圖至第i i圖所繪示了此種方 二"交#細时驟。請參閱第1 a圖所示,先在砷化鎵或磷 200416899 五、發明說明(2) 化銦基底10上成長第一磊晶層1 2及第二磊晶層1 4 ;之 後於第二遙晶層1 4被覆一層光阻1 6(即聚甲基丙烯酸 曱酯/甲基丙烯酸(P(MMA/MAA)))進行第一次的定位曝 光’再以顯影液去除光阻1 6的感光部分;請參閱第1 b 圖所示’餘刻後;請參閱第1 c圖所示,再以丙酮去除光 阻1 6 ,請參閱第1 d圖所示,然後再分別披覆第一層光 阻2 0 (即聚曱基丙烯酸甲酯(PMM A ))及第二層光阻2 2 (即聚甲基丙烯酸甲酯/甲基丙烯酸(P(MMA/MAA))),再 披覆第三層光阻2 4(即聚甲基丙烯酸甲酯(PMMA )) 閱第1 e圖所#’分別以不同能量的電子束進行曝光,二 在不同層光阻間得到不同的感光區域,再以 = 光阻2 2、第二層光阻2 4及第三層光 = 分;請參閱“ f圖所示,再次蚀刻 J = 2圖:示,蒸鍍金屬31,由於第三層光阻“和K = 開片口寬度不同而形成垂懸,因此蒸鍍金屬— 故而在第1 "圖所示之金屬掀除時, _刻,製程極為複雜= ”位曝光 於產業利用。 t作牯間長且成本兩’並不適 有鑑於此,本發明的主要目 構,以單次定位電子束曝光,而、乂利用四層正光阻結 雙次閑極餘的方法,其中四声晶體之μ —__二層先阻是由電子束感光靈敏度V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a method of submicron to τ4, and in particular to a method of making a sub-beam lithography system using a new type of double-gate etching. The single-position electron four-layer positive photoresistor combination is used to perform double gate etching, beam exposure using electric development, and a double method of developing solution. Forming sub-micron τ-type gates [Previous technology] It is known that the current GaAs high-speed field-effect transistor for microwave wireless communication currently plays a role in the breakdown voltage and lifetime of the high-power breakdown voltage-accumulator circuit. Important position 'In order to make the adding technology a very important process step, the double gate etching of the active element is known. The double-phase electrode technology of the known method requires two separate, development, and etching to achieve double closed-pole etching. . After the first positioning exposure, development, and etching, the second time is used to make the second micron τ-type gate using electron beam lithography technology and three-layer photoresist. This technology for manufacturing T-gates uses three layers of polymethylmethacrylate, polymethylmethacrylate / methacrylic acid, and polymethylmethacrylate (P with A, P (MMA / MAA), PMMA). The photoresist is obtained by electron beam exposure. During the exposure process, first use a smaller line width and a higher energy electron beam to expose the lower part of the photoresist at the bottom; then use a larger line: a lower energy electron beam to expose the upper layer. And the middle layer of photoresist was exposed by the cutter of the exposure department. After the development, the metal is mined again to obtain the submicron T-gate. Please refer to Figures ia to ii for a description of such parties. Please refer to FIG. 1a, firstly, the first epitaxial layer 12 and the second epitaxial layer 1 4 are grown on the gallium arsenide or phosphorus 200416899 V. Description of the Invention (2) Indium substrate 10; The telephoto layer 14 is covered with a photoresist 16 (that is, polymethylmethacrylate / methacrylic acid (P (MMA / MAA))) for the first positioning exposure. Then the photoresist 16 is removed with a developing solution. Photosensitive part; see picture 1b 'after the rest; see picture 1c, and then remove the photoresist 16 with acetone, see picture 1d, and then cover the first Layer photoresist 20 (ie polymethyl methacrylate (PMM A)) and second layer photoresist 2 2 (ie polymethyl methacrylate / methacrylic acid (P (MMA / MAA))), and then Cover the third layer of photoresist 24 (that is, polymethyl methacrylate (PMMA)), as shown in Figure 1e, respectively, with different energy electron beams for exposure, and two different photoresist areas between different photoresists. , And then with = photoresist 2 2, second photoresist 24 and third photo = min; please refer to "f", and etch J = 2 again: as shown, the metal 31 is evaporated, because the third layer Photoresistance "and K = opening width At the same time, a suspension is formed, so the metal is vapor-deposited. Therefore, when the metal shown in Figure 1 is removed, the process is very complicated = "exposed to the industrial use." It takes a long time and costs two ' In view of this, the main objective of the present invention is to use a single positioning electron beam exposure, and the method using four layers of positive photoresistance junctions to double idle excess, in which the μ — __ two layers of four acoustic crystals are first blocked Electron beam sensitivity

第7頁 200416899 五、發明說明(3) " ' 及解析度不同之正光阻所構成,只需經電子柬二次曝光, 經顆影液二次顯影後,即可使光阻形成I型開口,較之習 知方法需要兩次定位曝光,可節省一次定位开曝光時間,降 低元件製造成本;且此四層正光阻形成之特殊1贺開口,町 利用雙次閘極蝕刻使增加積體電路的崩潰與生命期及 增加元件製造的良率。 ’ &/、 為了更進一步揭露本發明之方法、優點及特徵,茲酌 合附圖說明較佳實施例如下,其中:第2 :圖炱第2 Ια圖 係繪示本發明利用四層光阻形成τ型雙次閘極0截到的製择 之圖式。 【發明内容】 緣此,本發明目的係在提供一種次微米τ塑雙次閘極 蝕刻的製作方法’ it用於高速場效應電 包括 下列步驟: (I )在一半導體基座上成長必要結構的磊晶層後,分 別依序在該磊晶層上被覆第一層光阻、第二声 層光阻及第四層光阻,其中第:=芦# 二 T乐一增光阻的厚度大於第四層 光阻的厚度’帛四層光阻的厚度則小於第二層光阻的的厚 度,而第一層光阻的厚度則小於或等於第二層光阻的的厚 度,並且第三層光阻的電子束感光靈敏度大於第二層光阻 和第四層光阻的感光靈敏度; (II)利用電子束單次定位曝光,同時曝光前述第 層光阻、第二層光阻、第三層光阻及第四層光阻;Page 7 200416899 V. Description of the invention (3) " '' and positive photoresistors with different resolutions, only need to be exposed twice by the electron beam, and after the secondary development of the shadow solution, the photoresist can be formed into type I Compared with the conventional method, it requires two positioning exposures, which can save the time of one positioning opening and reduce the manufacturing cost of the component. And the special 1-ga opening formed by this four-layer positive photoresist uses a double gate etching to increase the accumulation. The collapse and lifetime of circuits and increase the yield of component manufacturing. '& /, In order to further disclose the method, advantages and features of the present invention, the preferred embodiments are described below with reference to the accompanying drawings, in which: Figure 2: Figure 炱 Figure 2 Ια is a diagram showing the invention using four layers of light The resistance forms the control pattern of the t-type double gate 0 interception. [Summary] For this reason, the purpose of the present invention is to provide a manufacturing method of sub-micron τ plastic double gate etching. It is used for high-speed field-effect electricity including the following steps: (I) growing a necessary structure on a semiconductor substrate After the epitaxial layer is formed, the first layer of photoresist, the second layer of acoustic layer, and the fourth layer of photoresist are sequentially covered on the epitaxial layer, respectively. The thickness of the fourth layer of photoresist is less than the thickness of the second layer of photoresist, and the thickness of the first layer of photoresist is less than or equal to the thickness of the second layer of photoresist. The photosensitivity of the layer photoresist is greater than that of the second and fourth photoresistors; (II) A single positioning exposure using an electron beam to simultaneously expose the aforementioned first photoresist, second photoresist, and first photoresist. Three-layer photoresist and fourth layer photoresist;

200416899 五、發明說明(4) 三層光阻及第四層光阻的感光部分,而形成一T型開口; (I V) 再一次以顯影液(2 )顯影,去除T型開口下第一 層光阻的感光部分不影響第二層光阻、第三層光阻及第四 層光阻的感光部分,而形成一I型開口; (V ) 濕式#刻(w e t e t c h i n g) I型開口下的部分蠢晶 層; (VI) 乾式#刻(dry etching) I型開口下的部分磊 晶層; (V II) 將金屬蒸鍍填充於T型開口中; (VIII) 再去除剩餘的光阻,即可形成T型閘極。 其中,前述被覆第一層光阻、第二層光阻、第三層光 阻及第四層光阻的步驟之後均各自對光阻進行預烤約2 0分 鐘。 其中,前述第二層光阻及第四層光阻係由聚甲基丙烯 酸甲酯(PMMA )組成。 其中,前述第三層光阻係由聚甲基丙烯酸甲酯/甲基 丙稀酸(P(MMA/MAA))組成。 其中,前述第一層光阻係由聚甲基戊二亞醯胺 (PMGI )組成。 其中,前述半導體基座可為砷化鎵、磷化錮或氮化鎵。 其中,前述第一層光阻、第二層光阻、第三層光阻及 第四層光阻的總厚度為0 . 7 // m至1 · 5 // m之間。 其中,前述第二層光阻的開口約為0.1 //m至0.5 //m之 間。200416899 V. Description of the invention (4) Three layers of photoresist and the photosensitive part of the fourth layer of photoresist to form a T-shaped opening; (IV) Development with the developer (2) again to remove the first layer under the T-shaped opening The photosensitive part of the photoresist does not affect the photosensitive part of the second layer, the third layer, and the fourth layer, and forms an I-type opening; (V) Wetetching under the I-type opening Part of the stupid layer; (VI) dry etching part of the epitaxial layer under the I-type opening; (V II) filling the T-type opening with metal evaporation; (VIII) removing the remaining photoresist, A T-gate is formed. Wherein, after the aforementioned steps of covering the first layer of photoresist, the second layer of photoresist, the third layer of photoresist, and the fourth layer of photoresist, the photoresist is pre-baked for about 20 minutes. The photoresist of the second layer and the photoresist of the fourth layer are composed of polymethyl methacrylate (PMMA). The photoresist of the third layer is composed of polymethyl methacrylate / methacrylic acid (P (MMA / MAA)). Wherein, the aforementioned first layer of photoresist is composed of polymethyl glutarimide (PMGI). The semiconductor base may be gallium arsenide, hafnium phosphide or gallium nitride. The total thickness of the first layer photoresist, the second layer photoresist, the third layer photoresistor, and the fourth layer photoresistor is between 0.7 // m to 1 · 5 // m. The opening of the second layer of photoresist is about 0.1 // m to 0.5 // m.

200416899 五、發明說明(5) 其中,蒸 其中,所 (MIBK )為主 其中,所 (DeveloplOl 其中,前 光阻的開口、 成,且第三層 光阻的開口大 大於第二層光 其中,前 其中,前述第 約為2 : 1至 其中,前 構。 其中,前 體的結構。 其中,前 結構。 以下茲配 下’以期能使 之陳述據以實 【實施方 首先請參200416899 V. Description of the invention (5) Among them, the steam (MIBK) is the main one, and the (DeveloplOl), the opening of the front photoresistor is formed, and the opening of the third layer photoresist is much larger than that of the second layer. The former is about 2: 1 to which, the former structure. Among them, the structure of the precursor. Among them, the former structure. The following is provided in order to make the statement based on reality

鍍的金屬可為鈦/金/鉑金屬。 使用的顯影液(1)係以甲基異丁基酮 ’並以異丙醇(IPA )溶液稀釋而成。 使用的顯影液(2 )係為氫氣化四乙銨 型開口係由第一層光阻的開口 、第二層 第二層光阻的開口及第四層光阻的開口組 光阻的開口大於第四層光阻的開口 ,第四層 於第二層光阻的開口 ,而第一層光阻的開口 阻的開口。 ,蒸鑛的金屬厚度約為30 0nm至50 0nm。 一層光阻的開口和第二層光阻的開口的比例 4 : 1之間。 it蟲層可形成為金半場效應電晶體的結 述i晶層可形成為高電子移動率場效應電晶 述蟲晶層可上、& ^成為異質接面場效應電晶體的 二^ Ιχ月車Λ佳貫施例之圖式進一步說明如 熟了本發明4目關技術之人士,得依本說明書 式】The plated metal may be a titanium / gold / platinum metal. The developer (1) used was prepared by diluting methyl isobutyl ketone 'with an isopropyl alcohol (IPA) solution. The developing solution (2) used is a tetraethylammonium hydrogen type opening. The opening of the first layer of photoresist, the second layer of second layer of photoresist, and the fourth layer of photoresist. The opening of the fourth layer of photoresist, the opening of the fourth layer on the second layer of photoresist, and the opening of the first layer of photoresist. The metal thickness of the ore is about 300 nm to 50 nm. The ratio of the opening of one layer of photoresist to the opening of the second layer of photoresist is between 4: 1. The worm layer can be formed as a gold half-field effect transistor. The i-crystal layer can be formed as a high electron mobility field-effect transistor. The worm-crystal layer can be placed on top of a heterojunction field-effect transistor. ^ χ The illustration of the moon car Λ Jiaguan example further illustrates that if a person who is familiar with the 4 mesh technology of the present invention can follow this formula]

200416899 五、發明說明(6) 單人疋位電子束曝光兩次顯影钱二^ ^ ^ ^ ^ 極蝕刻的製作方法; ^ /紙人倣水T型雙次閘 首先在一砷化鎵、磷化銦 要結構的第-蠢晶層4 2及第::曰=座4 0上成長所 阻機旋轉塗佈的方式,披覆第 "θ 4,然後先以光 44上,預烤20二鐘披K覆於第二蟲晶層 ^ m r n u 冉披覆苐一層光阻52於第一層 光阻50±,同樣預烤2〇分鐘,接 二層光阻52上,並再預烤20分 且?56於第三層光阻54上,並再預烤" ^ ’ =參Μ 2 a圖所示’然後以電子束微影系統之電 子束進订曝光,電子束加速電壓2 〇κν,電子束劑量為 4 0至3 0 OuC ’cm2,而在四層光阻中分別形成不同的 第一感光區域60及第二感光區域62 ;請參閱第2]^圖 所示,以顯影液顯影,形成I型開口;蝕刻I型開口下部 伤的弟一遙晶層4 4清參閱第2 f圖所示,再以電子搶蒸 鍍法蒸鍍金屬7 0,使蒸鍍金屬7 0充填於τ型開口中, 係該蒸鑛金屬70可為鈦、金、翻等金屬;請參閱第2g 圖所示,最後以丙酮去除附著於光阻上的蒸鍍金屬7 〇 , 再以1-甲基-2-氮雜戊酮(stripper)去除第一層光阻 5 0 ,而形成次微米T型閘極。 前述四層正光阻分別由電子束感光靈敏度不同的光 阻所構成,其中第一層光阻5 0由聚甲基戊二亞醯胺 (PMGI )所組成,第二層5 2及第四層光阻5 6為一低感 光靈敏度、高解析度正光阻,是由聚甲基丙烯酸甲酯 第11頁 200416899 五、發明說明(7) (PMMA )所組成,第二層光阻5 2在曝光顯影後,可形成 蕭基(Schottky )閘接觸之開口,因該層光阻顯影後線寬 最小,可形成0 · l//m至〇 · 5//m的感光區的開口;第200416899 V. Description of the invention (6) Single-person electron beam exposure twice for developing money ^ ^ ^ ^ ^ ^ Polar etching method; ^ / Paperman's imitation water T-type double gate is first made of gallium arsenide and phosphorous Indium chemical structure of the first-stupid crystal layer 4 2 and the second :: = = block 4 0 spin-coating method blocked by growth, cover the first " θ 4, and then light 44 first, pre-baked 20 The second bell K is covered with the second worm crystal layer ^ mrnu Ran is covered with a layer of photoresist 52 on the first layer of photoresistance 50 ±, also pre-baked for 20 minutes, then connected to the second layer of photoresist 52 and pre-baked 20 Divide? 56 on the third layer of photoresistor 54, and pre-bake it again. ^ '= Refer to M 2 a as shown in the figure', and then use the electron beam lithography system to customize the exposure, and the electron beam acceleration voltage is 2 〇 κν, the electron beam dose is 40 to 30 OuC 'cm2, and different first photosensitive regions 60 and second photosensitive regions 62 are respectively formed in the four-layer photoresist; see FIG. 2] ^ for development Liquid development to form an I-type opening; etching the damaged one-remote crystal layer 44 of the lower part of the I-type opening, as shown in FIG. 2f, and then metal 7 0 is deposited by electronic snap deposition to make the metal 7 0 Filling In the τ-type opening, the vaporized metal 70 can be titanium, gold, or metal; please refer to the figure 2g, and finally remove the vapor-deposited metal 7 attached to the photoresist with acetone, and then use 1-methyl Substituted 2-azapentanone (stripper) removes the first layer of photoresist 50 and forms a sub-micron T-gate. The aforementioned four layers of positive photoresists are composed of photoresists with different sensitivity of the electron beam. The first photoresist 50 is composed of polymethyl glutarimide (PMGI), the second layer 52 and the fourth layer. Photoresist 5 6 is a low-sensitivity, high-resolution positive photoresist. It consists of polymethyl methacrylate. Page 11 200416899 V. Description of the Invention (7) (PMMA). The second layer of photoresist 5 2 is exposed. After development, Schottky gate contact openings can be formed. Because the layer has the smallest line width after photoresist development, it can form openings in the photosensitive area from 0 · l // m to 0.5 // m;

四層光阻5 6厚度T4較第二層光阻5 2之厚度T2薄, 用以形成垂懸(overhang),感光靈敏度較第二層光阻5 2 大,因此顯影後形成之開口較第二層光阻5 2形成的開口 大,但因其感光靈敏度較第三層光阻5 4低,此一開口線 寬較第二層光阻5 2的開口小,所以會形成垂懸,此垂懸 是作為輔助金屬掀除之用,可改善蒸鍍金屬7 0之截面平 整度,並提高良率。The thickness T4 of the four-layer photoresist 5 6 is thinner than the thickness T2 of the second layer photoresist 5 2 to form an overhang. The photosensitivity is greater than that of the second layer photoresist 5 2. The opening formed by the second layer of photoresist 5 2 is large, but because its photosensitivity is lower than that of the third layer of photoresist 5 4, the line width of this opening is smaller than that of the second layer of photoresist 5 2, so it will form a hang. Hanging is used as an auxiliary metal lifter, which can improve the flatness of the cross section of the deposited metal 70 and increase the yield.

另外,第三層光阻5 4為一高(電子束)感光靈敏度之 正光阻,其組成為聚甲基丙烯酸曱酯/曱基丙烯酸(P (MMA/MAA)),可形成較厚之光阻層,故第三層光阻5 4 之厚度T3大於第二層光阻5 2之厚度T2 ,而第二層光 阻5 2之厚度T2大於第四層光阻5 6之厚度T4,又因 其(電子束)感光靈敏度較高,經電子束曝光後,感光部分 較大,在顯影液顯影後,可形成一線寬較大的開口,其寬 度較第二層及第四層光阻5 2 、5 6之開口大,而第三層 光阻5 4與第二層光阻5 2開口(線寬)的比例別約為2 : 1至4 : 1之間。 至於顯影步驟則是以顯影液(1 )將曝光後的第二層 光阻5 2 、第三層光阻5 4及第四層光阻5 6 —次顯影; 請參閱第2 c圖所示,以形成上寬下窄的T型開口 ,顯影 液(1 )組成是以甲基異丁基酮(MIBK)為主,以異丙醇In addition, the third layer photoresist 54 is a high (electron beam) photosensitivity positive photoresist. Its composition is polymethylmethacrylate / fluorenyl acrylic acid (P (MMA / MAA)), which can form a thicker light. The thickness T3 of the third layer photoresist 5 4 is greater than the thickness T2 of the second layer photoresist 5 2, and the thickness T2 of the second layer photoresist 5 2 is greater than the thickness T4 of the fourth layer photoresist 56. Because of its high (electron beam) photosensitivity, after the electron beam exposure, the photosensitive part is larger. After the developer is developed, a large line width opening can be formed, which is wider than the second and fourth layers of photoresist. 5 The openings of 2, 5 and 6 are large, and the ratio of the opening (line width) of the third layer of photoresist 5 4 and the second layer of photoresist 5 2 is about 2: 1 to 4: 1. As for the developing step, the second layer of photoresist 5 2, the third layer of photo resist 5 4 and the fourth layer of photo resist 5 6 are developed by the developing solution (1); please refer to FIG. 2 c In order to form a T-shaped opening with a wide top and a narrow bottom, the developing solution (1) is mainly composed of methyl isobutyl ketone (MIBK) and isopropyl alcohol.

第12頁 200416899 五、發明說明(8) (IPA )溶液稀釋,此顯影液(1、Page 12 200416899 V. Description of the invention (8) (IPA) The solution is diluted.

Vi)可同時顯影第二層光 阻52、第三層光阻54及第四展土〃 ^ ^ 币四層光阻56的感光區域 62 ,再以顯影液(2)苐一層 尽九阻5 2的感光區域 6 0,顯影液(2 )、组成為氫氣化四乙敍(Devei〇pm ) ,顯影形成I型開口而不影響到第二層光阻5 2 、第三層 光阻5 4及第四層光阻5 6形狀;請參閱第2 d圖所示: 前述四層光阻的總厚度約為〇 . 7um至丄.5um之間,再 用濕式蝕刻(wet etching);請參閱第2 e圖所示及乾式 蝕刻(dry etching);請參閱第2 f圖所示,〖型開口 下部分的第二蠢晶層44形成雙次閉極蚀安"之後蒸鑛金 屬7 〇其厚度別約為3 0 0⑽至5 〇 0nm。在掀除蒸鍍金 屬7 0的步驟中,將蒸鍍金屬7 〇後的晶片浸泡於丙酮 中,因第二層光阻52 、第三層光阻54及第四層光阻 5 6皆可溶解於丙晒中’使T型間極區域外的蒸鍍金屬 Y 0掀離’再將晶片浸泡於丨-甲基氮雜戊酮 (Stripper )除去第一層光阻5 〇請參閱第2 h圖。 本發明之次微米T型閘極的製作方法主要係應用於金 半場效應電晶體(MESFET)及高電子移動率場效應電晶體 (HEMT) ’及異質接面場效應電晶體(hfet),亦即前述蠢晶 層結構不同即會形成不同的元件。此類金半場效應電晶體 由源極(source)、没極(drain)、閘極(gate)、導通通道 (channel )構成,其中源極與汲極為金屬—半導體間之歐姆 接觸,而閘極則為金屬-半導體問的蕭基接觸,導通電子 由源極經導通通道,到達汲極,是為汲極電流,而閘極則Vi) Photosensitive areas 62 of the second layer of photoresist 52, the third layer of photoresist 54 and the fourth layer of photoresistance can be developed at the same time. 2 photosensitive area 60, developing solution (2), composed of hydrogenated tetraethene (Devei0pm), developed to form I-type openings without affecting the second layer of photoresist 5 2 and the third layer of photo resist 5 4 And the shape of the fourth layer of photoresistor 56; please refer to figure 2d: the total thickness of the aforementioned four layers of photoresistor is between 0.7um to 丄 .5um, and then wet etching is used; please See figure 2e and dry etching; see figure 2f, the second stupid layer 44 in the lower part of the mold opening forms a double closed-electrode etch process. 〇 Its thickness is about 300 ⑽ to 5000 nm. In the step of removing the vapor-deposited metal 70, the wafer after the vapor-deposited metal 70 is immersed in acetone, because the second photoresist 52, the third photoresist 54 and the fourth photoresist 56 can be used. Dissolved in acrylics to 'turn off the vapor-deposited metal Y 0 outside the T-type interpolar region', and then immerse the wafer in 丨 -methylazapentanone (Stripper) to remove the first layer of photoresist 5 〇 Please refer to Section 2 h Figure. The manufacturing method of the sub-micron T-gate of the present invention is mainly applied to gold half field effect transistors (MESFETs) and high electron mobility field effect transistors (HEMT) 'and heterojunction field effect transistors (hfet). That is, different elements of the stupid crystal layer structure will be formed. This type of gold half-field effect transistor is composed of a source, a drain, a gate, and a channel. The source and the drain are ohmic contacts between metal and semiconductor, and the gate It is a metal-semiconductor contact. The conduction electrons pass from the source through the conduction channel to the drain, which is the drain current, and the gate is

第13頁 200416899 五、發明說明(9) 可調制(m 〇 d u 1 a t e )没極電流量的大小。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此項技藝者,在不脫離本發明之精 神和範圍内,當可作些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定為準。Page 13 200416899 V. Description of the invention (9) The magnitude of the modulating (m o d u 1 a t e) non-polar current. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and retouching without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

第14頁 200416899 圖式簡單說明 【圖式簡單說明】 第1 a至1 i圖係繪示習知利用兩次定位曝光顯影蝕 刻形成T型閘極雙閘極姓刻技術之圖式。 第2 a至2 h圖係繪示本發明之利用單次定位電子束 曝光兩次顯影蝕刻形成次微米T型雙次閘極蝕刻的製作方 法之圖式。 【圖號說明】 基底1 0 第一磊晶層1 2 第二磊晶層1 4 光阻層1 6 第一層光阻20 第二層光阻22 第三層光阻2 4 蒸鍍金屬3 1 基座4 0 第一磊晶層4 2 第二磊晶層4 4 第一層光阻50 第二層光阻52 第三層光阻54 第四層光阻56 第一感光區域6 0 第二感光區域6 2 蒸鍍金屬7 0 第二層光阻之厚度T2 第三層光阻之厚度T3 第四層光阻之厚度T 4Page 14 200416899 Brief description of the drawings [Simplified description of the drawings] Figures 1a to 1i are drawings showing the conventional technique of using two positioning exposures to develop etching to form a T-gate and double-gate engraving technique. Figures 2a to 2h are diagrams illustrating a manufacturing method for forming a sub-micron T-type double gate etch using a single positioning electron beam exposure and two development etchings of the present invention. [Illustration of drawing number] substrate 1 0 first epitaxial layer 1 2 second epitaxial layer 1 4 photoresist layer 1 6 first layer photoresist 20 second layer photoresist 22 third layer photoresist 2 4 vapor-deposited metal 3 1 Base 4 0 First epitaxial layer 4 2 Second epitaxial layer 4 4 First layer photoresistor 50 Second layer photoresistor 52 Third layer photoresistor 54 Fourth layer photoresistor 56 First photosensitive area 6 0 No. Two photosensitive areas 6 2 Evaporated metal 7 0 Thickness of second photoresistor T2 Thickness of third photoresistor T3 Thickness of fourth photoresistor T 4

第15頁Page 15

Claims (1)

六、申請專利範圍 1 、一種次微米τ型雙次閘極蝕刻的 於尚速場效應電晶體元件,其包括下列步驟.'^ (!)*:!導體基座上成長必要結構的為晶層後,分 別依序在戎猫晶層上被覆第一層光阻、第二層光阻、第三 層光阻及第四層光阻,“第三層光阻的厚:大於第四層 光阻的厚度,第四層光阻的厚度則小於第二層光阻的的厚 度,而第了層光阻的厚度則小於或等於第二層光阻的的厚 度’並且第—層光阻的電子束感光靈敏度大於第二層光阻 和第四層光阻的感光靈敏度; (II) 利用電子束單次定位曝光,同時曝光前述第一 層光阻、第二層光阻、第三層光阻及第四層光阻; (III) 以顯影液(1)顯影,去除前述第二層光阻、第 三層光阻及第四層光阻的感光部分,而形成一τ型開口; (IV) 再一次以顯影液(2)顯影,去除τ型開口下第一 層光阻的感光部分不影響第二層光阻、第三層光阻及第四 層光阻的感光部分,而形成一I型開口; (V) 濕式儀刻(wet etching) I型開口下的部分磊晶 層; (VI)乾式蝕刻(dry etching) I型開口下的部分磊 晶層; (V I I )將金屬蒸鍍填充於τ型開口中; (V I I I)再去除剩餘的光阻,即可形成T型閘極。 2 、如申請專利範圍第1項所述的製作方法,其中, 月述被覆第一層光阻、第二層光阻、第三層光阻及第四層Sixth, the scope of patent application 1. A submicron τ-type double gate etched Yushang speed field effect transistor element, which includes the following steps. '^ (!) * :! The necessary structure growing on the conductor base is a crystal After the layer, the first layer of photoresist, the second layer of photoresist, the third layer of photoresistance, and the fourth layer of photoresist are sequentially covered on the Rong Maojing layer, respectively. "The thickness of the third layer of photoresist is greater than that of the fourth layer. The thickness of the photoresist, the thickness of the fourth photoresist is less than the thickness of the second photoresist, and the thickness of the first photoresist is less than or equal to the thickness of the second photoresist 'and the first photoresist The photosensitivity of the electron beam is greater than that of the second and fourth photoresistors; (II) A single positioning exposure using the electron beam, while exposing the aforementioned first photoresist, second photoresist, and third layer simultaneously Photoresist and the fourth layer of photoresist; (III) developing with a developing solution (1), removing the photosensitive part of the second layer, the third layer of photoresist and the fourth layer of photoresist to form a τ-shaped opening; (IV) Develop with developer solution (2) again, remove the photosensitive part of the first layer of photoresist under the τ-type opening without affecting the second layer The photoresist, the third layer of photoresist, and the photosensitive part of the fourth layer of photoresist to form an I-type opening; (V) wet etching part of the epitaxial layer under the I-type opening; (VI) dry type (Etching) part of the epitaxial layer under the I-type opening; (VII) filling metal into the τ-type opening by evaporation; (VIII) removing the remaining photoresist to form a T-type gate. The manufacturing method according to item 1 of the scope of patent application, wherein the first layer is covered with the first layer of photoresist, the second layer of photoresist, the third layer of photoresist, and the fourth layer 第16頁 200416899 六、申請專利範圍 光阻的步驟之 3、 如申 前述第二層光 (PMMA )組成 4、 如申 前述第三層光 (MMA/MAA) ) Ϊ 5、 如申 前述第一層光 6、 如申 前述半導體基 7、 如申 前述第一層光 的總厚度為0. 8、 如申 前述第二層光 9、 如申 蒸鍍的金屬可 1 0、如 中,所使用的 主,並以異丙 1 1、如 中,所使用的: (Deve1 op 10 1 法,其中, 丙烯酸(p 後均各自對光阻進行預烤約2 〇八$ 請專利範圍第1項所述的製作方77、、知。 阻及第四層光阻係由聚甲基套其中, 。 締酸甲_ 請專利範圍第1項所述的製作方 阻係由聚甲基丙烯酸甲i旨/甲基 請專利範圍第1項所述的製作方去 阻係由聚甲基戊二亞醯胺(PMGI ’其中, 請專利範圍第1項所述的製作方法)級成。 座可為坤化鎵、磷化銦或氮化錄 其中, 請專利範圍第1項所述的製作方法 阻、第二層光阻、第三層光阻及’其中, 『至1· 5 之間。 四層光阻 請專利範圍第1項所述的製作方法 阻的開口約為〇 · 1 # m至0 · 5 # m之門 請專利範圍第1項所述的製作方法 為鈦/金/鉑金屬。 申請專利範圍第1項所述的製作方去 顯影液(1 )係以甲基異丁基鲷(Ml⑽ 醇(IPA )溶液稀釋而成。 申請專利範圍第1項所述的製作方法 顯影液(2 )係以氫氣化四乙錢 其中, 其中, 其 為 其 200416899 六、申請專利範圍 1 2 、如申請專利範圍第1項所述的製作方法,其 中’前述T型開口係由第一層光阻的開口、第二層光阻的 開口 、第三層光阻的開口及第四層光阻的開口組成,且第 三層光阻的開口大於第四層光阻的開口 ,第四層光阻的開 口大於第二層光阻的開口 ,而第一層光阻的開口大於第二 層光阻的開口。 1 3 、如申請專利範圍第1項所述的製作方法,其 中,前述蒸鍍的金屬厚度約為300nm至500nm。 1 4、如申請專利範圍第7項所述的製作方法,其 中,前述第三層光阻的開口和第二層光阻的開口的比例約 為2 : 1至4 : 1之間。 1 5 、如申請專利範圍第1項所述的製作方法,其 中,前述磊晶層可形成為金半場效應電晶體的結構。 1 6、如申請專利範圍第1項所述的製作方法,其 中,前述磊晶層可形成為高電子移動率場效應電晶體的結 構。 1 7、如申請專利範圍第1項所述的製作方法,其 中,前述磊晶層可形成為異質接面場效應電晶體的結構。Page 16 200416899 VI. Steps for applying photoresistance in the scope of patent application 3, such as the application of the aforementioned second layer of light (PMMA) composition 4, such as the application of the aforementioned third layer of light (MMA / MAA)) Ϊ 5, such as the application of the aforementioned first Layer light 6, such as the aforementioned semiconductor base 7, the total thickness of the first layer of the aforementioned layer is 0.8, such as the aforementioned second layer of the optical layer 9, such as the applied vapor-deposited metal may be 10, as used in I use isopropyl 1 1, as in, and use: (Deve1 op 10 1 method, in which acrylic (p) each pre-baked the photoresist about 2.08 $ The manufacturer mentioned above is 77, and the photoresistor and the fourth layer of photoresistor are made of polymethyl. Among them, the manufacturer mentioned in the patent scope item 1 is made of polymethacrylate. / Methyl Please remove the resistance of the producer described in item 1 of the patent scope by using polymethyl glutarmidine (PMGI ', where the method of manufacture described in item 1 of the patent scope) is graded. The gallium nitride, indium phosphide, or nitride is listed in the manufacturing method described in item 1 of the patent scope, the second layer photoresistor, and the third layer photoresistor. 'Among them, "to 1. · 5. The four-layer photoresist asks for the manufacturing method described in item 1 of the patent scope to block the opening of about 0.1 · m to 0 · 5 # m. The manufacturing method is titanium / gold / platinum metal. The manufacturing solution (1) described in the first patent application range is diluted with a methyl isobutyl snapper (Ml (alcohol (IPA) solution). The manufacturing method (2) described in item 1 of the patent scope is hydrogenated with tetraethyl ether. Among them, it is 200416899 6. Application for patent scope 1 2 and the production method described in item 1 of patent scope , Where the aforementioned T-shaped opening is composed of the opening of the first layer of photoresist, the opening of the second layer of photoresist, the opening of the third layer of photoresist, and the opening of the fourth layer of photoresist, and the opening of the third layer of photoresist The opening of the photoresist is larger than the opening of the fourth layer, the opening of the fourth layer is larger than the opening of the second layer, and the opening of the first layer is larger than the opening of the second layer. The production method according to item 1, wherein the thickness of the vapor-deposited metal is about 300 n m to 500 nm. 1 4. The manufacturing method according to item 7 of the scope of patent application, wherein the ratio of the opening of the third layer of photoresist and the opening of the second layer of photoresist is about 2: 1 to 4: 1. 15. The manufacturing method according to item 1 of the scope of patent application, wherein the epitaxial layer can be formed into a structure of a gold half field effect transistor. 16. The manufacturing method according to item 1 of the scope of patent application. The epitaxial layer can be formed as a structure of a high-electron mobility field effect transistor. 17. The manufacturing method according to item 1 of the scope of patent application, wherein the epitaxial layer can be formed into a structure of a heterojunction field effect transistor. 第18頁Page 18
TW92131601A 2003-11-11 2003-11-11 Manufacturing method for sub-micrometer T-shaped double time gate etchings TWI226668B (en)

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