TWI222195B - Method for fabricating heat sink of semiconductor packaging substrate - Google Patents

Abstract

A method for fabricating heat sink of semiconductor packaging substrate is provided, which includes providing a heat dissipating material, forming a mask on the heat dissipating material having at least an opening for exposing the heat dissipating material, forming at least a protruding portion from the at least an opening on the surface of the heat dissipating material by means of electroplating, and, finally, removing the mask. The heat sink with at least a protruding portion is thus embedded into a semiconductor packaging substrate for at least a semiconductor die to be positioned on the at least a protruding portion of the heat sink in order to effectively dissipate the heat generated by the semiconductor die.

Description

V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a tomb, especially an electroplating method on a heat sink: an f-plate, a method for manufacturing a heat sink, and the loose sheet is placed in a semi-I scale, The method of making the convex part is necessary ... It is η to enter the yak conductor packaging base. [Previous technology] With the advancement of integrated circuit manufacturing technology, more and more semiconductor components. It can be deposited on the Japanese film. The nurse, Tanabata Yuma, and a female conductor are transported from ear to ear, and Axi will at least dissipate:? The increase of the accumulation degree of the made pieces ... It is dissipated by the single-chip; the more the conductor 2 is. If you ca n’t provide a:,: the more the chip will fail to operate normally at 2 f w # above the temperature, and the semiconducting operation will even affect the life of the chip. In the package substrate, the chip; chip [3]: Dissipation is achieved by the semiconductor wafer. "... Refer to Figure 1 for the heat dissipation structure made of a thermally conductive material, which shows the conventional J-junction semiconductor package substrate. In this half, the thermal conductivity = first is scattered—the upper surface 100 and the lower surface 101 are scattered. The chip t substrate 1 includes: a resin layer n above the upper surface of the chip 10, a pressure roller 10, a resin layer 12 laminated on the lower surface 101, and a heat dissipation layer formed on the upper surface and the heat dissipation layer. The bottom of the sheet 10 = 3,-is formed on the lower tree ridge 12 < 11 and the circuit conductance test 15 and the thermal pick-up 16. In order to protect the upper and lower layers = 14, and a plurality of road layers, the lower circuit layer 14 is coated with- Therefore, the power is turned on. The Haizheng heat sink 10 is embedded in the semiconductor package 17 and 18. 1222195 V. Description of the invention (2) --- The heat dissipation structure of the semiconductor package substrate 1. In addition, the heat sink A plurality of through holes 11 〇 are drilled on i 〇 for mounting the plurality of conductive bolts i 5 and the plurality of thermally conductive bolts 16. When the insulating resin of the upper resin layer 丨 and the lower resin layer 丨 2 is pressed, After being combined with the heat sink 10, the insulating resin has to fill the scattered vias 110. "The upper circuit layer 13 is arranged on the On the surface of the upper resin layer 丨, a plurality of wire bonding pads 131 are provided on i. After the upper circuit layer 13 is covered with a sound and solder resist layer 17, the wire bonding pad 131 is exposed to the opening of the solder resist layer 17: The gold wire 161 can be used to electrically connect the wafer ι60 and the substrate and the lower circuit layer 14 is arranged on the surface of the lower resin layer 丨 2, and a plurality of solder ball pads 1 4 1 are provided thereon.之后 After the lower circuit layer 丨 4 is covered with a solder resist layer 18, the plurality of solder ball pads 丨 4 丨 the opening of the solder resist layer 丨 8 must be exposed for the plurality of solder ball pads 141 and the solder The balls 1 to 9 are connected. The plurality of conductive bolts 15 are penetrating through the upper resin layer 1b, the via hole 110 of the heat sink i 0 and the lower resin layer 12 to electrically connect the upper circuit layer 3 and the lower circuit layer j 4 to each other. Among them, the diameter of the conductive pin 5 is smaller than the diameter of the through hole 110, and the conductive pin 5 and the through hole!丨 〇 The gap is filled with insulating resin to prevent short circuit. The plurality of thermally conductive bolts 16 also penetrate the upper resin layer 11, the through holes 1 10 of the heat sink 10, and the lower resin layer 12 so that the heat generated on the wafer 160 can be conducted to the heat dissipation. Slice 1 〇 to achieve the function of heat dissipation. When the package is implemented, at least one semiconductor wafer 160 is adhered to the surface of the substrate with a thermally conductive plug 16 by an insulating heat transfer adhesive (not shown), so that the heat generated on the wafer can pass through the wafer. 1 6 0 bottom of the

17172 Quan 懋 .ptd Page 9 1222195 V. Description of the invention (3) '' ------- Edge heat transfer glue (not shown) Conduction channel #, ln Μ # # HAI conductive plug 16 and then conductive to The heat sink ",: 丄 Ϊ: Ϊ f㈣. The wire bonding pad 131 of the upper circuit layer 13 is connected to the solder pad on the chip 160. To protect the chip 16 from external thunder ++ 1 pg,, „t! 丨 ^^ Interference can be covered with a piece of glue 1 62 该 其 Λ 其 Λ ° the most &, a plurality of materials 19 are connected to the ϋϊ; solder ball pad 141 to complete the heat dissipation Half of the structure ^ And the above-mentioned semiconductor package using the thermal conductive plug as a heat dissipation structure, the heat generated from the basket # 1 is transferred to the heat sink to complete the heat dissipation ^ guide, 裎, /, the contact cross section with the chip is very small , And because of the 1 series of heat-through films, it adds many unnecessary steps and necessary production costs to its production process. A & rationality, and at the same time added a lot of the structure of the package substrate and its manufacturing method in the Republic of China without considering the shortcomings of the board in the above-mentioned conventional semiconductor patent publication No. 457836. It is disclosed in a patent announcement and is shown in Figure 2. It shows the extension. Xi main legacy pumping u # semiconductor package with a heat dissipation structure. The semiconductor package substrate 2 includes-苒 千 T 装 基The heat sink 20 on the surface 201 is pressed on the upper surface = a top surface 20 0 and the lower surface fat layer 2 is pressed onto the upper surface 2 0 0 of the diffuser sheet underheat sheet 20 and a tree is formed on the surface. Upper resin layer 21Z lower surface 20 1 resin layer 22 below layer 22, circuit layer 24 below layer 22, and-formed on the lower resin. The heat sink 20 is also embedded in the conductive film 25. It has a convex projection. Ministry 202,

1222195 V. Description of the invention (4) A central portion 203 and a lower convex portion 204. In addition, a plurality of through holes 2 1 0 are drilled on the heat dissipation > i 2 0 for mounting the plurality of conductive pins 25. After the insulating resins of the upper resin layer 21 and the lower resin layer 22 are pressed on the heat sink 20, the insulating resin must fill the through holes 21 of the heat sink. The upper circuit layer 2 3 is disposed on the surface of the upper resin layer 21, and a plurality of wire bonding pads 2 3 1 are provided thereon. After the upper circuit layer 2 3 is covered with a solder resist layer 2 7, the The bonding pad 2 3 1 has to expose the openings of the solder resist layer 2 7 for the gold wire 2 6 1 to electrically connect the chip 2 60 and the substrate 2. The lower circuit layer 24 is disposed on the surface of the lower resin layer 22, and a plurality of solder ball pads 2 41 are provided thereon. After the lower circuit layer 24 is covered with a solder resist layer 28, The plurality of solder ball pads 2 4 1 can expose the openings of the solder resist layer 28 to allow the plurality of solder ball pads 2 4 1 to be connected to the solder balls 2 9. The plurality of conductive bolts 25 pass through the upper resin layer 2 and the through holes 2 1 0 of the heat sink 20 and the lower resin layer 22 to electrically connect the upper circuit layer 2 3 and the lower circuit layer 2 4 to each other. . The diameter of the conductive bolt 25 is smaller than the diameter of the through hole 210, and the gap between the conductive bolt 25 and the through hole 2 is filled with a conductive resin to prevent short circuit. When the package is implemented, at least one semiconductor wafer 2 60 is adhered to the convex portion 2 02 of the heat sink 2 0 with an insulating heat transfer adhesive (not shown), so that the heat generated by the wafer 2 60 can be borrowed. An insulating heat transfer adhesive (not shown) at the bottom of the chip 26 is directly conducted to the heat sink 20 to achieve the purpose of heat dissipation, and a plurality of gold wires 2 6 1 are used to electrically connect the upper circuit layer 2 3 of the wire bonding pad 2 3 1 and the electrode on the wafer 2 60, and in order to protect the wafer 2 6 0 from external electrical interference 'the wafer 2 6 2 and the gold wire can be covered with a glue 2 6 2 2 6 1 of

17172 Total comfort. Ptd Page 11 1222195 V. Description of the invention (5) After connecting a plurality of solder balls 2g to the semi-solder ball pad 24 1, so that the ancient and private also ^ ♦ Xia package substrate 2 Although , ≫ A semiconductor package with a south heat dissipation structure. μ The semiconductor sealing dream with a heat dissipation structure described above 4 ^ Directly pass the semiconductor wafer through-insulating heat transfer adhesive to place ί Soil = by i, better heat dissipation effect and lower manufacturing bottle, the above production as the first Figure 2 shows the heat sink with convex parts at first, which is the last name. And the production method using the last name engraving will produce hand through? Disadvantages such as poor quality, wasting heat-dissipating materials, and unevenness. = Sheet shape

It shows the steps of the traditional method of making a high-dissipation structure I from the original… nicknamed bull conductor package substrate, and the process of IL, and its content τ. , Mengu will be discussed below. Please refer to Figure 3A, which shows that one has not been processed. The heat dissipation material is 300 and has a lower surface 300a. Before and after the engraving process, the surface of the upper and lower surfaces of the 4 can be planarized. See Figure 3B. A photoresist layer 310 and a photoresist layer 32o are respectively covered on the upper surface 3001 and the lower surface 3002a of the heat-dissipating material 300 to cover the portion of the shape 1 having convex portions. Therefore, the heat-dissipating material 300 forms the upper outer edge surface 303 a and the lower outer edge surface 304 a on the portion not covered by the photoresist layer, and the portion covered by the photoresist layer to be formed with a convex portion is formed. Surface of the convex part ... 30 lb and surface of the convex part 30 2b. Since the etching process does not erode the portion covered by the photoresist layer, the etching process starts from the upper outer edge surface 3 0 a and the lower outer edge surface 3 0 4 a.

17172 Quan 懋 .ptd 1222195 V. Description of the invention (6) Please refer to FIG. 3C ′, which shows the heat dissipation material 300 formed by performing appropriate etching on the heat dissipation material 300. As shown in the figure, the area enclosed by the dashed line is the portion 305 of the heat dissipation material 300 that has been etched away, so that the upper and lower surfaces of the heat dissipation material 300 form a new upper outer edge surface 300b and Lower outer edge surface 304b. In addition, after the etching process is completed, an upper convex portion 301 and a lower convex portion 302 are formed on the heat dissipation material 300. Please read / read the 3D picture, which shows the heat sink 3 for the high-conductor package substrate with high heat dissipation structure, which is removed after covering the heat sink β Μ β + _ first layer 32. The planar helmet method of making ancient and soil π t soil surfaces according to the above-mentioned scattered tablets achieves ^ & μ In addition, because the etching process does not violate the better control, the produced, soil + private ϋ / There is a new upper outer edge surface 3 〇3 b and a new ^ 仏 month ... Poor shortcomings. In addition, according to the method of the last name engraved =, Ding Zhiping, it is easy to form etching between the new etched surface The heat sink of Erlai has the shortcomings of its poor shape.-Asking to make the content of the T produced] In view of the above-mentioned conventional shortcomings, this: a type of semiconductor package substrate heat dissipation; G is mainly for the purpose of providing The heat sink of the semiconductor package substrate is made using the electricity ore method. The heat sink material is used in the heat sink. Another purpose of this month is to provide a question. The method of making the heat sink is borrowed. From the plating side :: Bulk of bulk package substrate

17172 全懋 .ptd Page 13 1222195 V. Description of the invention (7) Hot fins to avoid the disadvantages of flatness and uneven etching of the fins when the fins are made by etching in the conventional art. In order to achieve the above and other objectives, the method for manufacturing a heat sink of a semiconductor package substrate of the present invention includes the following steps: First, a heat sink material is provided, wherein the heat sink material can be any metal or non-metallic material with good thermal conductivity properties. If the heat-dissipating material provided is non-metal or non-conductive, a conductive metal layer may be formed on the surface first to facilitate the subsequent electroplating process; then, a photoresist layer is covered on the surface of the heat-dissipating material, and At least one opening is formed on the photoresist layer so that a portion of the surface of the heat dissipation material where a convex portion is to be formed exposes the photoresist layer opening; and then, the photoresist layer is exposed on the heat dissipation material by plating. A convex portion having an appropriate thickness is formed on the surface of the opening; finally, the photoresist layer is removed to complete a heat sink structure for embedding in a semiconductor package substrate. Compared with using conventional etching techniques to produce heat sinks, the heat sinks produced by the electroplating method of the present invention do not need to remove any heat sink materials, so as to avoid waste of heat sink materials and further save production costs. In addition, the outer shape of the convex portion formed by electroplating can be easily determined according to the shape of the covered photoresist layer, so the manufactured heat sink has a good outer shape; in addition, it is also possible to avoid the conventional use of an etching process. The resulting problems include poor shape and uneven etching. [Embodiment] Please refer to FIG. 4, which shows each step of a method for manufacturing a heat sink of a semiconductor package substrate according to the present invention. Referring to FIG. 4A, a heat-dissipating material 4 0 0 is first provided, which has a

17172 全懋 .ptd Page 14 1222195 V. Description of the invention (8) " 'The upper surface 40la and the lower surface 402a. The heat-dissipating material 400 may be made of any heat good conductor such as metal or non-metal. However, if the heat-dissipating material 400 is non-metal or non-conductive, a conductive metal layer (not shown) needs to be formed on the upper surface 40 a and the lower surface 4 2 a in advance. The current conducting path required for electroplating can be composed of metal, alloy or stacked metal layers, which can be selected from copper, tin, nickel, chromium, titanium, copper / circuit & alloy or tin / $ σ 3 gold The group of metals is formed, but according to practical experience, the conductive film is preferably composed of copper or palladium particles (especially no ore), which can be formed by physical vapor deposition (PVD), chemical vapor phase Deposition (c VD), no electricity or chemical precipitation, such as sputtering (s Pu 11 ering), evaporation, arc vapor deposition, ion beam sputtering , Laser ablation deposition, laser-assisted chemical vapor deposition or organic metal chemical vapor deposition, etc., are formed on the surface of the non-metallic heat-dissipating material. Please refer to FIG. 4B, followed by the heat dissipation Material 4 0la on the top surface of 4 0 0 and the following table A photoresist layer 4 1 0 and a photoresist layer 4 2 0 are formed on the surface 4 0 2 a by printing, spin coating, or lamination. The photoresist layer may be, for example, a dry film or a liquid photoresist special photoresist layer. (Photoresist), and at least one opening 40 lb and 40 2b is formed on the photoresist layer 41 〇 and 4 2 0 to expose the surface of the heat dissipation material 400 where a convex portion is to be formed, and the heat dissipation material 4 〇 〇 The part covered by the photoresist layer is the upper outer edge surface 403a and the lower outer edge surface 404a. Please read Figure 4C, and then perform the electroplating process on the heat dissipation material 400. The heat dissipation material 401 is formed along the opening 40 lb along the opening ^ 401, and

17172 Quan 懋 .Ptd Page 15 1222195 Fifth edge heat, description of the invention (9) a __ = Cheng: the lower convex part 40 2, making the heat-dissipating material above 4 ° 〇 ». / The surface of the upper convex part 401 c And the surface of the lower convex part t material households you 4, Shi na zc. The thickness of the convex ridge formed by the dispersion can be selected according to the previous coverage of the light of the 4 wei 1¾ r0 τΛ- Yuewen Hot Material Co., Ltd. Θ 4: the degree of layer thickness to choose. There are many electroplating technologies, but t 2 is equal to process technology, so it will not be described again. & It is the industry today to read the 4D figure 'and finally remove the photoresist 41 covering the upper outer edge table 40: a of the edge surface 404a. And the photoresist layer 42. Table 0: and the heat sink 40 embedded in the V-body wave-sealing substrate ^ * for V-type wave-sealing substrates, so that the scattered ^ has a convex portion 401 And the lower convex part 402, and the position of the upper convex part surface and the electric 4 surface 4 0 2 c is higher than the part covered by the previous 1 suction in the loose film 4 0 ❹ & It is the light P, and the substrate is subsequently 1440a and the lower outer surface 40a, which is used in the encapsulation process for at least half of the guide to cut into the surface of the convex portion. According to the above manufacturing method, the system is a convex part, so the outer edge part is covered with a heat-dissipating material and the heat-dissipating material, so that it can be manufactured to avoid problems such as poor performance. The invention formed a relatively convex pattern in the comparatively conventional technique by electroplating. Moreover, through the surface of the material, the semiconductor heat sink material that can be made by etching compared with the conventional heat sink can be appropriately dissipated by the etched part. When the shape is controlled well, the convex part of the heat sink is formed on the unshaped surface. Removal of scattered member 'may be the light-shaped section and the thickness of the projecting portion of the waste material into a shape with good electroplating is the province have' lines by half of the guide surface of the convex portions formed in the heat sink is embedded in to

Page 16 1222195 V. Description of the Invention (ίο) At least one insulating layer and at least one circuit layer are formed to form a semiconductor package substrate, and at least one semiconductor wafer can be provided on the convex portion of the heat sink (such as the first (Shown in Figure 2), the heat generated by the chip is conducted to the outside through the convex portion of the heat sink. In the manufacturing method of the heat sink of the semiconductor package substrate of the present invention, at least one convex portion can be formed on the heat sink by electroplating on a good heat sink material such as metal or nonmetal. A convex portion is formed on both the upper and lower surfaces. In fact, the convex portion may be separately formed on one surface of the heat-dissipating material for mounting a semiconductor wafer, or a plurality of convex portions may be formed by electroplating on one surface of the heat-dissipating material. In order to connect and install a large number of semiconductor wafers, the content disclosed above is only a preferred embodiment of the present invention, and is not intended to limit the technical scope of the present invention. The substantial technical content of the present invention is broadly defined in the scope of the following patent applications. Any technical entity or method completed by another person that is completely the same as the scope of the patent application below or is only equivalent changes or modifications can be deemed to be covered by Within the spirit and scope of the present invention.

17172 Quan 懋 .ptd Page 17 1222195 Brief description of the diagram [Simplified illustration of the diagram] Figure 1 is a schematic cross-sectional view of a semiconductor substrate of a conventional technology, which shows a semiconductor package substrate using a thermal conductive plug as a heat dissipation structure; A cross-sectional schematic diagram of a semiconductor packaging substrate of a known technology, which shows a semiconductor packaging substrate with a high heat dissipation structure heat sink; Figures 3A to 3D are cross-sectional schematic diagrams of the process steps of a method for manufacturing a high heat dissipation structure of a semiconductor package substrate of a conventional technology; And FIGS. 4A to 4D are schematic cross-sectional views of the steps of a method for manufacturing a heat sink of a semiconductor package substrate of the present invention. 1 semiconductor package substrate 10 heat sink 100 upper surface 101 lower surface 11 upper resin layer 110 via hole 12 lower resin layer 13 upper circuit layer 131 wire bonding pad 14 lower circuit layer 141 fresh ball 塾 15 conductive pin 16 thermal pin 160 chip 161 gold wire 162 Sealant 17 Solder resist layer 18 Solder resist layer 19 Glow ball 2 Semiconductor package substrate 20 Heat sink 200 Upper surface 201 Lower surface 202 Upper convex portion 203 Center portion 204 Lower convex portion 21 Upper resin layer 210 Via hole

17172 Full 懋 .ptd Page 18 1222195 Brief description of the diagram 22 Lower resin layer 23 Upper circuit layer 231 Wire bonding pad 24 Lower circuit layer 241 Solder ball pad 25 Conductive plug 260 Chip 261 Gold wire 262 Sealant 27 Solder resist layer 28 Resist glow Layer 29 Solder ball 30 Heat sink 300 Heat dissipating material 301 Upper protrusion 301a Upper surface 301b Upper protrusion surface 302 Lower protrusion 3 0 2a Lower surface 3 0 2b Lower protrusion surface 3 0 3a Upper outer edge surface 3 0 3b New Upper outer edge surface 3 0 4a Lower outer edge surface 3 0 4b New lower outer edge surface 305 Removed portion 310 Photoresist layer 320 Photoresist layer 40 Heat sink 400 Bulk material 401 Upper convex portion 401a Upper surface 401b Open D 401c On Convex surface 402 lower convex portion 4 0 2a lower surface 40 2b opening σ 4 0 2c lower convex surface 4 0 3a upper outer edge surface 4 0 4a lower outer edge surface 410 photoresist layer 420 photoresist layer

17172 Think All.ptd Page 19

Claims (1)

1222195 VI. Application patent scope 1. A method for manufacturing a heat sink for a semiconductor package substrate, the steps include: providing a heat sink material; covering the surface of the heat sink material with a photoresist layer, and forming at least one opening in the photoresist layer Exposing the heat-dissipating material to the outside; forming at least one convex portion on the surface of the heat-dissipating material that exposes the opening of the photoresist layer by electroplating; and removing the photoresist layer. 2. The method according to item 1 of the patent application, wherein the heat sink can be embedded in the semiconductor package substrate, and at least one semiconductor wafer can be connected to the convex portion of the heat sink to effectively dissipate the heat of the semiconductor wafer. 3. The method according to item 1 of the patent application scope, wherein the heat dissipation material is a metal material. 4. The method of claim 1 in which the heat dissipation material is a non-metallic material. 5. The method according to item 4 of the scope of patent application, wherein a conductive metal layer is formed on the surface of the non-metallic heat dissipating material, and is used as a current conduction path in the subsequent electroplating process. 6. The method of claim 5 in which the conductive metal layer may be composed of any one of a group of metals and alloys. 7. The method according to item 6 of the patent application, wherein the conductive metal layer may be selected from the group consisting of copper, tin, nickel, copper, titanium, copper-chromium alloy, and tin-boat alloy. 8. The method of claim 5 in which the conductive metal layer may be Page 20 17172 Full 懋 .ptd 1222195 6. Scope of patent application By physical vapor deposition (PVD), chemical vapor deposition (CVD), electroless deposition, chemical precipitation, sputtering (spu 11 ering), evaporation ( evaporation), arc vapor deposition, ion beam sputtering, laser ablation deposition, plasma-assisted chemical vapor deposition and organic metal chemical vapor deposition Either way, it is formed on the surface of the non-metallic heat dissipation material. 17172 Full Punishment.ptd Page 21