TW593789B - Electroplating method for substrate - Google Patents

Abstract

An electroplating method for a substrate includes the following steps. First, a semi-finished substrate is provided with an internal substrate circuit, an upper surface and a lower surface. There are multiple first contact pads and multiple traces on the lower surface. There are multiple second contact pads and multiple traces on the upper surface. There are solder-mask layers positioned on the upper surface and on the lower surface, covering the traces and exposing the first contact pads and the second contact pads. The internal substrate circuit electrically connects the first contact pads and the second contact pads. Next, a conductive seed layer is formed on the lower surface of the substrate. Next, an electroplating process is performed simultaneously to form a first metal layer onto the conductive seed layer and to form a second metal layer onto the second contact pads.

Description

593789 _case number 92119806_year month__ V. Description of the invention (1). [Technical field to which the invention belongs] The present invention relates to a substrate plating process, and in particular, to a plating line that does not require a plating line. ) Can complete the process of double-sided electroplating of the substrate at the same time by using the electric ore method. [Previous technology] In today's information society, high-speed, high-quality, and multi-functional products are pursued. As far as product appearance is concerned, the trend is toward lighter, thinner, shorter, and smaller. In order to achieve the above purpose, many companies now want to reduce the size of the circuit in various ways. Among them, as for the size of the windings in the wafer, the metal wire width in the wafer can be greatly reduced due to the introduction of the concept of copper process. Has entered the stage of the nano level. In order to reduce the volume of the substrate, you can also reduce the line width of the metal lines on the substrate and the distance between the metal lines. In the conventional technology, a metal layer is generally formed on the surface of the substrate by electroplating. Therefore, an extra plating line must be specially added so that when the substrate is placed in an electric boat tank, one of the electrodes It can be electrically connected to the metal layer of the substrate by contacting this plating circuit, so that the metal can be electro-mineralized to the substrate. However, in the above-mentioned conventional technology, an extra plating line must be specially added to perform the plating process, so the winding space of the substrate is wasted, and it is difficult to produce a substrate with a high number of contacts. In addition, after the final electroplating is completed, the plating line used for the electroplating process must be cut off, which increases the time and cost of manufacturing the substrate, and even after the plating line is cut off, a tail is still left on the substrate, and Will not be completely cut off, so when the signal flows through the tail

11477twf1.ptc Page 8 593789 ____ plug number 92119806_year month_____ V. Description of the invention (2) When the circuit is connected, a large amount of noise will be generated, which will reduce the electrical performance of the substrate. In order to improve the above problems, metal can be formed on the substrate by electroless plating. However, the metal formed by this method is very thin 'and the quality of the metal formed by electroless plating is not stable. [Summary of the Invention] The main object of the present invention is to propose a substrate plating process, which uses the design of the conductive seed layer and the plating surface of one-side of the substrate, and can simultaneously complete both-side electrical keys of the substrate. Effectively simplify substrate plating process. Another object of the present invention is to provide a substrate plating process, which can be performed without the need for an additional plating line, so that the substrate has more winding space to produce a substrate with a high number of contacts, and can avoid The problem of reduced electrical performance of the substrate caused by the residual plating lines. In order to achieve the above object of the present invention, a substrate electro-mineralization process is proposed, which includes at least the following steps. First, a substrate having completed the previous process is provided, which has internal circuits of the substrate and a first surface and a corresponding second surface. The first surface has a plurality of first pads and a plurality of circuit patterns (traces). ) 'The first surface has a plurality of second pads and a plurality of circuit patterns, and each of the first and second surfaces has a solder mask layer covering the circuit patterns to expose the first pads and The second pads, wherein the first pads are electrically connected to the second pads through an internal circuit of the substrate; then, a conductive seed layer is formed to cover the first of the substrate. On the surface; then, simultaneously on the substrate

11477twf1.ptc Page 9 593789 _Case No.92119806_ Revised Year of the Month _5. Description of the invention (3) On the first and second surfaces, a metal layer is formed on the conductive seed layer and the second pads . In summary, it is only necessary to form a conductive seed layer on the first surface of the substrate, and through the internal circuit of the substrate electrically connected to the first pad and the second pad, a metal layer can be formed at the same time through the plating step. On the first and second surfaces of the substrate, compared with the conventional technology, the manufacturing process of the substrate can be reduced. In order to make the above-mentioned objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: [Embodiment] The first preferred embodiment, please Referring to FIGS. 1 to 8, there are shown schematic cross-sectional views of a substrate manufacturing process according to a first preferred embodiment of the present invention. Please refer to Figure 1. First, a substrate 100 that has completed the previous process must be provided. For example, a four-layer board is used as an example. It has four metal layers 111, 112, 113, 114, and three insulating layers 115, 116. , 117, metal layers 111, 112, 113, 114 and insulating layer 1 1 5, 5, 1 1 6 and 1 1 7 are laminated and bonded to each other, and each adjacent metal layer 1 1 1, 1 1 2, 1 1 3 One of the insulating layers 1 1 5, 1 1 6, and 117 is arranged between 1 and 4 for electrical isolation, and the material of the metal layers 111, 112, 113, and 114 is, for example, copper. The substrate 100 that has completed the previous process also has a plurality of connection holes 1 1 8 (only one of which is shown in the figure). A metal 1 1 9 is formed on the wall of the connection hole 1 1 8 to electrically connect the metal. Layers 1 1 1, 1 12, 1 1 3, 1 1 4 at least two of them, and the insulating material 1 9 1 can be selectively

11477twf1.ptc Page 10 593789 Case No. 92119806 Amendment V. Description of Invention (4) Fill in the through holes 1 1 8. The substrate that has completed the previous process has two corresponding surfaces 120 and 130. The metal layers 111 and 114 are respectively located on the surfaces 120 and 130 of the substrate 100 that have completed the previous process. For reference, please refer to Figure 2. For example, the steps of lithography can be used to pattern the metal layers 111 and 114. The metal layer ill, for example, has multiple contacts 122 and the circuit pattern 124, and the metal layer 114, for example, has multiple pads. 132 and the line pattern 133, wherein the connection pad 122 can be electrically connected to the pad 1 2 through the metal iig in the connection hole jig, for example. Next, please refer to FIG. 3, for example, a solder mask layer can be formed by screen printing 丨 4〇, 丨 45 on the insulating layer 丨 5, 1 1 7 'fresh cover layers 1 4 0, 1 4 5 respectively With multiple openings i 4 2 and i 4 6, the pads 122 and 132 of the metal layers 111 and 114 are exposed, and the solder mask layers 140 and 145 respectively cover the circuit patterns of the metal gallium layers 1 1 1 and 1 1 4 丨2 4 、 丨 3 3 parts. Please refer to FIG. 4, and then, for example, a conductive seed layer 15 may be formed by a sputtering method or a helmet electroplating method, and the conductive seed layer M will cover the metal layer 114. The pad 132 'wherein the structure of the conductive seed layer 15 is composed of the following metals, osmium, silver, and the above metals; U t layered structure or a multilayer structure. Please refer to Section 5 ®, its plating steps. 132 can be electrically connected to the pad 122 through the internal circuit of the J-board made in advance. Therefore, the metal layer 160 can be formed on the conductive seed layer 150 and the * 4s i connection 122 through the electric ore gold eyebrow sound at 1 ° 62. 'Where the structure of the metal layers 160 and 162 is, for example, an early layer structure or a multi-layer structure composed of the fish genus nickel, gold, and an alloy of the above metals.

593789 --- September 92191986_ Article 5 of the invention description (5) " " " Next, the lithography steps can be performed, so that the patterned metal layer is called with reference to Figure 6 'First To form a masking layer 170 on the metal layer 16 ^ 'The material of the masking layer 170 is, for example, a photoresist, and through steps such as exposure and development, the masking layer 170 will form a covering area 172 and an exposed area 174 [ The covering area 172 of the masking layer is substantially aligned with the position of the junction 132, and the exposed area 174 of the masking layer 170 will expose the metal layer 160. Then, ^ for the remaining process, it is the masking layer 1 7 〇 Covering area 丨 7 2 is used as a mask, and the metal layer j 6 located under the exposed area 174 of the masking layer 170 is etched to form the structure shown in Figure 7. Finally, the masking layer is removed. 7 ′ ′ is formed as shown in FIG. 8, so that the substrate 2000 is completed. The pads 132 can be connected to the fresh balls (not shown) through the conductive seed layer 150 and the metal layer 160 as solder balls. BaU pad, which can pass through the metal layer 150 and the bump (not shown) (Shown) or wires (not shown) are used as bump pads or wire bonding pads (bonding f 1 nger). • In this embodiment, the substrate 200 is a four-layer board as an example. However, in practical applications, the plating concept of the present invention can also be applied to substrates such as six-layer boards, eight-layer boards, or other layers. In the above-mentioned substrate manufacturing process, since only a conductive seed layer 15 is required to be formed, The solder mask layer 145 and the pad 132 are connected through the internal circuit of the substrate 2000 to electrically connect the connector 1 2 2 and 1 3 2. Therefore, the metal layer 160 can be formed at the same time when the power mining step is performed. And 162 are on the conductive seed layer 150 and the pad 122, and after the electric mining process, the step of lithographic etching is not required to pattern the metal layer 1 62, so that the manufacturing process of the substrate can be reduced.

593789

Amendments ^ 'Using the above-mentioned method for the electric mining process, there is no need to configure for electric mining. The electroplating circuit of the process is on the substrate 100 which has completed the previous process, and more space can be left for other It can be used for winding, and can save the process of cutting off the electric power line, so it will not leave a piece of tail on the ancient substrate 2000 because it is not cleaned, which will reduce the electrical performance of the substrate 2000, and On the transmission gate frequency j 5 tiger, the substrate 200 of the present invention also has excellent performance. Fig. 9 of the second preferred embodiment is not limited to the above-mentioned preferred embodiment in practical application, as shown in Fig. 12 of the handle and handle system, which shows the second preferred embodiment according to the present invention. A cross-sectional schematic diagram of the process, wherein if the reference numeral is the same as that of the first preferred embodiment, it means that the component represented by this reference numeral is the same as the component represented by the first preferred reference numeral, and will not be repeated here. FIG. 9 is a diagram of the second embodiment, which is the continuation of the system shown in FIG. 4 of the first preferred embodiment. After forming the mask to the second sub-layer 150 on the solder mask layer 145, it is necessary to further describe the second seed layer. On 150, the material of the masking layer 37 is formed into a plurality of steps. After exposure, development and other steps, the masking layer 3 7 0 will be placed in the shape of a girl: the mouth 7 2 'exposes the conductive seed layer 1 50. The position of the opening 3 7 2 is the position of the pad 132. Please refer to FIG. 10, and then the inner line ^ of the substrate can be used. Because the pad 132 can be completed through pre-fabrication, it can be electrically connected to the pad 1 2 2. Therefore, by electroplating, if at least & M Shi Er, in which the structure ratio of the metal layers 3 6 0, 3 6 2 constitutes "xm 冓 Record, gold and alloys of the above metals,

11477twfl.ptc Page 13 593789 _ Case No. 92119806_year month_iMz_ V. Description of the invention (7) Next, the step of removing the masking layer 370 can be performed, as shown in FIG. 11. Finally, an etching process can be performed, which uses the metal layer 360 as an etching mask to etch the conductive seed layer 150 exposed to the outside, as shown in FIG. 12, and thus the substrate 400 is completed. Conclusion In summary, the present invention has at least the following advantages: 1. Since the substrate process of the present invention only needs to form a conductive seed layer on one surface of the substrate that has completed the previous process, the plating process can be used, Metal layers are respectively formed on the two surfaces of the substrate, and after the electroplating process, it is not necessary to perform a lithography step on both sides of the substrate, thereby patterning the metal layer, so that the manufacturing process of the substrate can be reduced. 2. The substrate process of the present invention does not need to be provided with a plating circuit for the plating process on the substrate, so more space can be left for other purposes for winding, and the process of cutting the plating circuit can be saved. Therefore, a tail is not left on the substrate because the cutting is not clean, so that the electrical performance of the substrate is reduced, and the substrate of the present invention also has excellent performance in transmitting high-frequency signals. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various changes and decorations without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.

11477twf1.ptc Page 14 593789 _Case No.92119806_ Year Month Amendment __ Brief Description of Drawings Figures 1 to 8 show schematic cross-sectional views of the substrate manufacturing process according to the first preferred embodiment of the present invention. 9 to 12 show schematic cross-sectional views of a substrate manufacturing process according to a second preferred embodiment of the present invention. [Illustration of Graphical Symbols] 1 00 semi-finished product of substrate 111 metal layer 112 metal layer 113 metal layer 114 metal layer 115 insulating layer 116 insulating layer 117 insulating layer 118 connection hole 119 metal 120 surface 122 pad 124 line pattern 130 surface 132 pad 133 Circuit pattern 140 Welding cover layer 142 Opening 145 Fresh cover layer 146 Open a 1 50 Metal layer 160 Metal layer 162 Metal layer 170 Masking layer 1 72 Covering area 174 Exposed area 191 Insulating material 200 Substrate 310 Substrate semi-finished product 360 Metal layer 362 Metal layer 370 Masking layer 372 KV 400 substrate

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Claims (1)

593789 Case No. 92119806 Amendment VI. Scope of Patent Application 5 · If applied, it uses no electricity on the surface. Please refer to the substrate plating process described in item 1 of the patent scope, wherein the conductive seed layer is formed by electroplating on the first and second surfaces of the substrate, and the second substrate is formed. The substrate is formed with a plurality of layers. 7. The conductive copper and nickel layer structure 8. 6. A substrate plating process, including at least: providing a substrate that has completed the previous process, having a first surface inside the substrate and a corresponding second surface, A pad and a plurality of circuit patterns on the first surface, a plurality of second pads and a plurality of circuit patterns, and a solder mask layer on the surface respectively covering the circuit patterns; Pads and the second pads, wherein the first internal wiring is electrically connected to the second pads; forming a conductive seed layer on the first surface; forming a masking layer ( mask) on the conductive seed layer, the mask is opened to expose a part of the conductive seed layer; in a plating manner, a first metal layer is formed at the same time as a second metal layer on the conductive pads on the second pads; Except for the cover layer and the conductive line not covered by the first metal layer, the first and second exposed pads are covered by the cover layer with electric seeds and seeds, as described in item 6 of the patent scope. In the substrate electroplating process, the material of the layer is selected from the group consisting of at least one of the following metal materials, gold, tin, silver, and alloys of the above metals. Such as the seed, chromium and multi-layer structure. 11477twf1.ptc Page 17 593789 _ Case No. 92119806_ YYYY__ Sixth, the scope of the patent application The material of the first metal layer and the second metal layer is selected from at least one of the following metal materials, nickel, gold and The alloy of the above-mentioned metals can be either a single-layer structure or a multilayer structure. 9. The substrate plating process according to item 6 of the scope of the patent application, wherein the conductive seed layer is formed on the first surface of the substrate by sputtering. 10. The substrate plating process according to item 6 of the scope of patent application, wherein the conductive seed layer is formed on the first surface of the substrate by means of electroless plating. 1 1. A substrate electroplating process, at least comprising: providing a substrate having completed a previous stage process, having a substrate internal circuit, an upper surface and a corresponding lower surface, the lower surface having a plurality of first pads and a plurality of Traces, the upper surface has a plurality of second pads and a plurality of circuit patterns, and a solder mask layer on the upper surface and the lower surface respectively covers the circuit patterns and is exposed. The first pads and the second pads, wherein the first pads are electrically connected to the second pads through an internal circuit of the substrate; a conductive seed layer is formed to cover the first pads and the second pads. On the lower surface of the substrate; and simultaneously forming a first metal layer on the conductive seed layer and forming a second metal layer on the second pads in the form of electricity. 12. The substrate plating process as described in item 11 of the scope of patent application, wherein the first connection can be a ball pad. 1 3. The substrate plating process as described in item 11 of the scope of patent application, which 11477twf1.ptc Page 18 593789 _ Case No. 92119806_ YYYY__ VI. The second connection in the scope of patent application can be a bump pad or a bonding finger ° 1 4.such as The substrate electroplating process described in item 11 of the scope of the patent application, wherein the material of the conductive seed layer is selected from at least one of the following metal materials, copper, nickel, chromium, gold, tin, silver, and alloys of the above metals. The structure consists of a single-layer structure and a multilayer structure. 15. The substrate electroplating process according to item 11 of the scope of patent application, wherein the material of the first metal layer and the second metal layer is selected from the group consisting of at least one of the following metal materials, nickel, gold, and the above metals. Alloy, the single-layer structure and the multi-layer structure formed by the choice. 16. The substrate electroplating process according to item 11 of the scope of patent application, wherein the conductive seed layer is formed on the lower surface of the substrate by sputtering. 1 7. The substrate plating process according to item 11 of the scope of patent application, wherein the conductive seed layer is formed on the lower surface of the substrate by electroless plating. 11477twfl.ptc Page 19