TW592007B - Build-up circuit board with conductive barrier structure and method for fabricating the same - Google Patents

Abstract

A build-up circuit board with conductive barrier structure and a method for fabricating the same are proposed. A patterned first resist layer is formed on a conductive base and a first circuit layer is formed within the openings of the first resist layer by an electroplating process via the conductive base. Then, the first resist layer is removed and at least an insulating layer with a plurality of openings for exposing the first circuit layer is formed on the first circuit layer via a build up process. A conductive metal layer is formed within the openings by an electroplating process via the conductive base, and a seed layer and a patterned second resist layer are formed in turn on the surface of the insulating layer and the conductive metal layer. A second circuit layer is formed within the openings of the second resist layer by an electroplating process and electrically connected to the first circuit layer via the conductive metal layer. The second resist layer and the conductive film underneath the second resist layer are removed and a metal barrier layer is formed on the surface of the second circuit layer. By the arrangement, it can prevent metal migration and shrinkage of the circuit layer owing to an etching process.

Description

592007

[Technical field to which the invention belongs] The present invention relates to a method and a method for manufacturing the same ', and more particularly to a barrier layer formed on the opposite side to prevent gold and a manufacturing method thereof. The layered circuit of the conductive barrier structure is called the circuit of the layered circuit board of the structure | The circuit board is a particle migration phenomenon. [Previous technology] Because of communication, network and computer and other portable (p〇rtaMe) The rapid growth of mouthpieces such as mobile books, laptops, portable video recorders, or personal digital assistants has led to the production of these electronic products using smaller and thinner circuit boards and electronics than before. Components, and with the trend of shrinking, the development of thin circuit (Fi μ circuit), high-density and small-aperture package substrates is undoubtedly the integrated circuit (1C) industry and other related electronics industries into the next generation of technology R & D Topic. In the circuit board manufacturing industry, in order to achieve this goal, a layer-up technology (Bui ld-up) has been developed. The so-called layer-up technology basically refers to the interactive stacking of multiple insulating layers and conductive layers on the surface of a core board. Then, an electrical via is formed in the insulating layer to provide electrical connection between the conductive layers. In order to achieve the process of designing reliable vias in a multilayer circuit board, the ones shown in Figures 2A to 2C are three common via processes in the industry, which are described as follows: Figure 2A shows a plated via. (Piated thrugh hole, PTH). The opening of the via extends through the insulating layer 201 and the circuit layers 20 2 and 203 covering the surface.

] 7446 全懋 .ptd Page 7 592007 V. Description of the Invention (2) An electrical layer is formed on the side wall of the via. After the power money is completed, a conductive or non-conductive filler material 205 is filled to fill the remaining gaps to ensure the reliability of the vias. Figure 2B shows another form of via hole, the so-called blind via (β 丨 丨 nd via). The opening of the blind via extends into the insulating layer 206, but does not penetrate the circuit layer 207. After the plating layer 20 8 is deposited, a conductive or non-conductive filler material 209 is filled in the recess to provide proper flatness for subsequent fabrication. Figure 2C shows two types of vias. The opening of the blind hole extends through the insulating layer 2 10 but does not penetrate the circuit layer 2 丨 丨. After the via holes are filled with the conductive material 213, the circuit layer 212 is formed. The above-mentioned conventional technology needs to be filled into the gap of the through hole. However, when the diameter of the through hole is less than 0.5 mm, the manufacturing process will become difficult to implement. Therefore, in general mass production, the above three processes must be implemented. It can be implemented when the diameter of the through hole is above 0 · 7 5 mm. In this case, the circuit board cannot meet the requirements of higher wiring density due to the limitation of the process technology of the via size. In addition, compared to the traditional Subtractive money engraving method, the industry currently adopts the Additive method that can produce finer lines to respond to higher wiring density circuit boards; the typical method is to Copper electroplating forms a seed layer (Seed 1 ayer) on the insulating circuit board, and then directly forms a circuit layer on the insulating layer. This method can be further divided into fully-additive and semi-additive methods (Semi-additive) two processes. At present, the typical process of semi-additive method for making thinner circuits is shown in Figure 3. First, please refer to Figure 3A. A core circuit board 3 01 includes a patterned one.

17446 Quan 懋 .ptd Page 8 592007 V. Description of the invention (3) Circuit layer 3 0 2 is located between the insulating layer 3 0 2 between the two circuit layers 3 0 2 and one is electrically within the circuit layer 3 2 2 Connected plated vias 3 0 4. Two organic insulating layers 3 0 5 are vacuum-bonded on the surface of the core circuit board 3 1 1 as shown in FIG. 3 B; then, referring to FIG. 3 C, a majority of blinds are formed on the organic insulating layer 3 5. The hole 3 06 ′ forms an electroless copper thin layer 3 7 on the surface of the organic insulating layer 3 05, and a patterned resist layer 308 is disposed on the electroless copper thin layer 3 7. Then, a plating layer is used to form a circuit layer 309 in the opening 310, as shown in FIG. 3D. After that, the resistance layer 308 and a part of the electroless copper thin layer 307 are removed, and the process is complete. Bottoms 1 ~ 300-layer four-layer circuit board 300 'The four-layer circuit board 300 series contains-9 hard-working φ circuit board 3 0 1 and two layered structures 3 1 1, and the layered structure 3 1 1 includes an * insulating layer 3 0 5 and a circuit layer 3 0 9, and the circuit layer 3 0 9 is made by the conventional + mechanical circuit (Circuit f〇rmat i〇n) semi-additive method As shown in Figure 3E. The package substrate made by the aforementioned process can already process the wires of the circuit layer to between 20 ~ 3 0 # m, and it can be applied to higher-performance chips and = inch pieces, but if you want to further the precision of the wires In order to improve the wiring density, the mounting process accuracy cannot be overcome; in addition, in these insulating layers, when a blind hole is formed, a large amount of slag is easy to remain, and the slag will become The cause of poor conduction between the blind hole and the inner layer conductor caused the connection to be broken and the wire was broken, which caused the difficulty of the substrate manufacturing process to increase, and the manufacturing process to decrease. In addition, the seed layer used as the current conduction path of the electric circuit layer in the above-mentioned conventional semi-additive layering technology, that is, the electroless copper thin layer ^ f 成

592007 V. Description of the invention (4) When the seed layer is engraved by removing the material layer and the electrical continuum formed, it shrinks and deforms. This situation, especially for circuit boards, will cause another line of electronic products. The design of shrinking circuits is becoming more and more dense, and if the complexity of the circuits increases, the layers between layers become thinner and thinner. The conductive copper particles of the material lines have layers, which makes the two The current of Copper migration is due to the narrowness of the insulation between the two lines. When there is electrical conduction in the insulation layer of the edge part, it is easy to cause two paths, making the circuit board unable to properly particles. The phenomenon of migration will increase more and more clearly, making the insulation partly effective. And with the high-density layer between the lines or between the lines, because of the thinness, how to overcome the important issue of the steel atom migration exhibition to be solved is the same road layer, which is all metallic copper, and it will cause the circuit layer to suffer. It severely shrinks and deforms the formation of thin lines and high accumulation paths. Requirements for increasing the number of circuit boards and functions. The area and thickness of the receiving circuit board must be increased by adding layers. The tighter the circuit board's characteristics, the more likely it will migrate and diffuse and infiltrate the insulating part of I when the line current is conducted. Copper particles migrate like. Or the layers are very dense. When the copper particles migrate, the copper particles cause the insulation effect to move between the lines or between the layers; and with the increase of the use time, it causes the Steel gradually has electrical conductivity and loses the tendency of insulation development, making the limits of layered circuit board materials and the phenomenon of insulation layers' becoming the limit of future electrical circuits and back to the side # the density of circuit boards, so, or layers, Constitute the insulation to relatively reduce the formation of the formation of short j] XJ 9 ^ ineffective layers and more and more products

] 7446 全懋 .ptd Page 10 592007 V. Description of the invention (5) [Summary of the invention] In view of the lack of the conventional technology, the main purpose of the present invention is to provide a layered circuit board with a conductive barrier structure and its The manufacturing method is to cover and isolate the circuit layer in the circuit board by a metal barrier layer, and suppress the migration of metal particles to avoid short circuits or interference, so that the wiring of the multilayer circuit board can be densely arranged, and Space is thinner and thinner to make more layers of circuit boards. Another object of the present invention is to provide a layered circuit board with a conductive barrier structure and a manufacturing method thereof, so as to avoid etching and removing the seed layer that is commonly used for electroplating, and also damage the formed circuit layer. problem. Another object of the present invention is to provide a layered circuit board with a conductive barrier structure and a method for manufacturing the same. The circuit layer is covered with a metal barrier layer, so that the circuit layer and the insulation can be enhanced by the metal barrier layer. Layer adhesion. Another object of the present invention is to provide a layered circuit board with a conductive barrier structure and a method for manufacturing the same. The insulating layer between the circuit layers first forms an opening, and then a conductive metal layer is formed by electroplating in the opening. The conductive metal layer is electrically connected to the circuit layers on both sides of the insulating layer, and the via structure is not known to simplify the manufacturing process. Another object of the present invention is to provide a build-up circuit board with a conductive barrier structure and a method for manufacturing the same, so as to form an asymmetric structure with stacked through holes and fine lines. In order to achieve the above object, the present invention provides a layered circuit board with a conductive barrier structure and a method for manufacturing the same. The preferred implementation steps include: providing a conductive base layer and forming a conductive base layer thereon;

] 7446 全懋 .ptd Page 11 592007 V. Description of the invention (6) A patterned first resistive layer is formed so that the conductive resistive layer is exposed outside the opening of the first resistive layer, and the conductive resistive layer is passed through the conductive resistive layer in the opening. The first circuit layer is formed by electroplating, and then the first resistance layer is removed to expose the first circuit layer. Then, a build-up process is used to form at least one patterned insulation on the first circuit layer. Layer, and the insulating layer has a circuit layer exposed underneath the opening, and a conductive metal layer is electroplated in the opening, and then a seed layer is formed on the surface of the insulating layer and the conductive metal layer, Then, a patterned second resist layer is formed on the surface of the seed layer, and the second resist layer has an opening to expose the seed layer. The second resist layer is electroplated in the opening to form a second circuit layer, and then the second layer is removed. The resistive layer and the seed layer covered by the resistive layer expose the second circuit layer, and then a metal barrier layer is formed on the surface of the second circuit layer. After that, an insulating layer and a circuit layer can be continuously formed on the second circuit layer, and a metal resist layer is formed on the surface of the circuit layer. After the electroplating process is completed, the conductive base layer can be removed as a conductive path for the plating current. The surface of the first circuit layer is exposed outside to complete the layered circuit board with a conductive barrier structure of the present invention. Through the aforementioned process, the present invention also provides a layered circuit board with a conductive barrier structure. The circuit board mainly includes: a first circuit layer, which is formed by electroplating through a conductive base; at least one An insulating layer is formed on the first circuit layer, and a conductive metal layer formed by the conductive base layer in an electroplating manner is electrically connected to the first circuit layer; at least one seed layer ), Is patterned on the surface of the insulating layer, and electrically connects the seed layer to the conductive metal layer; at least one second circuit layer,

17446 Quan 懋 .ptd Page 12 592007 V. Description of the invention (7) The conductive base layer is formed on the seed layer, and the conductive metal layer is electrically connected to the first circuit layer; and at least one The metal barrier layer is covered on the surface of the second circuit layer. In the present invention, the surface of the circuit layer is covered with a metal barrier layer, such as a group composed of chromium (Cr), nickel (Ni), cobalt (Co), palladium (Pd), button (Ta), and titanium (Ti). One of them is to suppress the migration of metal particles between layers or adjacent circuits, so the insulating layer in the circuit board can be thinner and lighter, so that a thinner and lighter multilayer circuit board can be manufactured. At the same time, the metal barrier layer (for example, using chromium metal) can be used to inhibit the migration of metal particles, and can also be used to enhance the adhesion between the circuit layer and the insulating layer, so that the circuit layer is tightly bonded to the insulating layer to avoid Occurrence of detachment results in better use. Furthermore, in the layer-increasing technology of the present invention, it is used as a current conduction path for forming a circuit layer by electroplating. The material of the seed layer can be a metal barrier material different from the copper material of the circuit layer. When seeding the layer, the circuit layer can be prevented from shrinking due to its side name, and the circuit layer formed on the seed layer can provide a good effect of suppressing the migration of metal particles; and the conductive metal of the insulating layer can be used. The layers are electrically connected to increase the circuit layer between layers, and there is no known via structure to simplify the process. In addition, the present invention is to build a first, a second circuit layer, or more layers on a conductive base layer, and only performs a build-up process on a single surface of the conductive base layer, and has an upper and lower asymmetric structure. [Embodiment] In order to make the purpose, characteristics and effects of the present invention more understandable and agreeable, the detailed description with the drawings is as follows. Of course, the present invention can be many

17446 Quan 懋 .ptd Page 13 592007 V. Description of the Invention (8) Implementation of various forms ′ The following description is a preferred embodiment of the present invention and is not intended to limit the scope of the present invention. Please refer to FIG. 1A to FIG. 1K, which are schematic cross-sectional views of a manufacturing method of a conductive barrier structure according to an embodiment of the present invention. As shown in Figure 1A, 'a conductive base layer 10 is first provided. The material of the conductive base layer 10 is mainly metallic copper, and the conductive base layer 10 is mainly used for subsequent electroplating in a circuit board to form a circuit layer. The main current conduction path. A patterned first resist layer 11 is formed on one surface of the conductive base layer 10, and the first base layer 11 is formed with a plurality of openings 1 10 to expose the conductive base layer 10. The first resist layer 11 may be, for example, a dry film or a photoresist layer such as a liquid photoresist, and the first resist layer may be made by a patterning process such as exposure and development. The layer 11 is formed with a plurality of openings 1 1 0 to expose a part of the conductive base layer 10 °

As shown in FIG. 1B, 'Electroplating through the conductive base layer 10 as a current conduction path to form a first circuit layer 13 in the opening 110 of the first resistive layer 丨 and the first The material of the circuit layer 1 3 is mainly electroplated gold or nickel / gold metal layer or even copper layer. The queue is as follows: firstly bond a layer of gold and then bond a layer of nickel and copper on top of it, and finish the final plating process. When the conductive base layer 10 is removed and completed, the gold or nickel / gold metal layer in the first electrical layer is exposed on the surface of the circuit board, and is used as an electrical connection pad for connecting conductive elements. ^ W as shown in Figure 1C, and then remove the _ Yang Meng]] θ 1 and layer 1 1, 俾 revealed this

17446 Quan 懋 .ptd 592007 V. Description of the invention (9) First circuit layer 13. As shown in FIG. 1D, a patterned first insulating layer 14 is formed on the exposed first circuit layer 13, and the insulating layer 14 has a portion of the first circuit layer 13 exposed outside the opening 1440. The first insulating layer 14 may be a photosensitive (P h 〇 t 〇- sensitive) insulating layer, for example, a material such as a photo developing resin (P hotoimageab 1 eresi η), and the photoresist is processed by a photolithography technology. The insulating insulating layer is subjected to processes such as exposure and development to selectively form the openings 140, so that the first circuit layer 13 exposes the openings 140. In addition, the insulating layer may also be a thermosetting resin for forming an opening 1 40 by laser-via, but the opening 1 40 is preferably a photosensitive insulating layer through a micro- Shadow technology. As shown in FIG. 1E, an electroplating process is performed to pass the conductive base layer 10 as a current conduction path, and a conductive metal layer 1 41 is formed in the opening 1 4 0 of the first insulating layer 14 and the The conductive metal layer 1 4 1 is electrically connected to the first circuit layer 13. Next, a seed layer 15 is formed on the outer surface of the first insulating layer 14 and the conductive metal layer 141, and the seed layer 15 is electrically connected to the conductive metal layer 141. Through the conductive base layer, The first circuit layer, the conductive metal layer, and the seed layer serve as a current conduction path required for electroplating to form a subsequent patterned build-up structure. The seed layer 15 can be formed by physical vapor deposition (PVD), chemical vapor deposition (CVD), electroless plating, or chemical deposition, such as sputtering, evaporation, and arc vapor deposition. (Arc

17446 Quan 懋 .ptd Page 15 592007 V. Description of the invention (ίο) vapor deposition, ion beam sputtering, laser ablation deposition, plasma-assisted chemical vapor deposition or It is formed by methods such as electroless plating; in addition, in order to avoid problems such as contraction and deformation of the circuit layer due to side erosion and metal particle migration when the circuit layer is removed after subsequent electroplating, the seed crystal The material of the layer may be a barrier metal different from the material of the circuit layer (metal copper), such as chromium (Cr), nickel (Ni), cobalt (Co), Ibar (Pd), Iden (T a) One of the groups consisting of titanium (T i). And the resistance values of these barrier metals at room temperature are: nickel (1 3 # Ω -cm) 'chromium (6.84 // Ω -cm), starting (6 · 24 // Ω -cm), and ( 10.8 // Ω -cm) 'group (11.5 / ζ Ω -cm), “(80 // Ω -cm) (refer to Modern Electroplating published by John, Wiley & Sons, Inc 2000), and another copper The resistance value is 1.67 3 / ζ Ω -cm, so these barrier metals are all good conductors of electricity. In addition, the inventor has sputter-plated a # 1 chromium layer on a organic material as a conductive layer in a previous study, and then used copper sulfate as a plating solution to form a 20 // copper layer by electroplating. Based on this experimental basis, it can be inferred that chromium (C r), nickel (Ni), cobalt (Co), palladium (Pd), tantalum (Ta), and titanium (Ti) as conductive layers can also be successfully deposited on it with low resistance values. Electroplating to form a circuit layer made of copper. As shown in FIG. 1F, a patterned second resist layer 16 such as a dry film or a liquid photoresist is formed on the surface of the seed layer 15 and the second resist layer 16 has an opening other than 160 A part of the seed layer is exposed. As shown in FIG. 1G, an electric mining process is performed to pass through the conductive base layer 10, the first circuit layer 13, the conductive metal layer 141, and the seed crystal.

17446 Quan 懋 .ptd Page 16 592007 V. Description of the invention (11) Layer 15 is used as a current conduction path, and a second circuit layer 17 is formed on the seed layer within the opening 16 of the second resistive layer 16 The second circuit layer 17 is electrically connected to the first circuit layer 13 by the conductive metal layer 141. As shown in FIG. 1, the second resistive layer 16 and the seed layer 15 covered by the second resistive layer 16 are removed, and the second circuit layer 17 is exposed. And when removing part of the seed layer 15, because the material is different from the formed circuit layer, the size of the circuit layer will not be destroyed when it is removed by etching or the like, which will prevent the circuit from shrinking and even affecting the circuit layer. Its electrical continuity and other issues. As shown in FIG. 1I, the surface of the exposed second circuit layer 17 continues to pass through the current conduction path formed by the conductive base layer, the conductive metal layer, and the circuit layer, and the surface of the second circuit layer is electroplated. A metal barrier layer 18 is formed to suppress migration of metal particles, so that the second circuit layer 17 is isolated by the metal barrier layer 18. The material of the metal barrier layer 18 is, for example, one of the group consisting of chromium (Cr), nickel (Ni), origin (Co), handle (Pd), tantalum (Ta), and titanium (T i). By. Since the present invention uses the conductive base layer 10 as the current conduction path required for the electroplated metal layer to first fabricate the first circuit layer 13 and then to form the insulating layer 14 and the second circuit layer 17 for layering, and The second circuit layer 17 is covered with a metal barrier layer 18, so that the metal barrier layer 18 or even the seed layer 15 having conductive resistance characteristics can be used to cover and block the second circuit mainly composed of copper, respectively. Layer 17 to avoid the phenomenon of copper particle migration, so that the wiring of the circuit layer can be made tighter without causing short circuits or interference. As shown in Figure 1J, the circuit can be further increased in accordance with the foregoing steps to form a second insulating layer on the circuit layer on the surface of the circuit increased structure.

17446 Quan 懋 .ptd Page 17 592007 V. Description of the invention (12) 1 4 ', and then made on the second insulating layer 1 4 according to the above steps, a conductive metal layer 141' is electroplated in the opening, and at the same time by Previously, the conductive metal layers and circuit layers were formed with stacked vias 19 in the circuit board. In addition, subsequent paths also continue in the circuit's metal protective layer to protect conductive components, such as a good electrical connection of a gold plate. Direct electroplating is formed (predicted by S). The surface circuit of the conductive base board can be used to power on the surface wires, bumps, and pre-soldering functions of the circuit board, or even a current-conducting mirror composed of power supply 10 in the fresh tin material can be formed as a nickel / gold road And can provide connection to external devices with the rest or solder balls and the surface circuit of the chip or circuit board (not shown in Figure 1 κ, after which, the bottom layer 13 must be removed to complete more than one The layered structure of the multilayer electric circuit board is used to make a conductive base layer 10, and the circuit board is exposed outside.

In the present invention, the circuit board with a conductive barrier structure layer 10 is used as a current conduction path to directly apply electricity thereto, and a V-based substrate is used.

13, 17, and a gold layer is formed on the surface of the circuit layer by electroplating. There is a circuit layer to effectively suppress the migration of copper particles between adjacent circuits, and the barrier layer 18 and the marginal portion can be thinner and thinner, so To make more =, the circuit board is absolutely called the circuit board. In addition to the metal barrier layer 18, in addition to the phenomenon of multi-layer anti-migration, when the barrier layer is chromium, it also suppresses the adhesion between the metal particles and the insulating layer 14 to make the circuit layer 1 γ is tightly connected to the 9 strong circuit layers 1 7 1 4 to avoid the occurrence of detachment, and provides a more social organization to combine the first circuit layer 13 and the second circuit with the sound and government effects. An opening 1 4 0 is formed, and then a lightning conducting layer a and a plutonium layer 14 are formed in the opening 1 4 0 to form an electric metal layer 141.

592007 V. Description of the invention (13) The first circuit layer 13 and the second circuit layer 17 are connected by the conductive metal layer 141, so that the circuit can be added by stacking, and the conductive structure must be made first. Sexual through holes, and then fill the trouble and inconvenience of the material, so the process must be simplified to reduce manufacturing costs. In addition, in the present invention, the first circuit layer 13 and the second circuit layer 17 are sequentially stacked and fabricated on the conductive base layer 10 by using its active current conduction path, and another insulating layer can be continuously stacked and fabricated according to the above manufacturing method. And circuit layer to become an asymmetric circuit board structure. In summary, the above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the essential technical content of the present invention. The essential technical content of the present invention is broadly defined in the scope of patent applications described below. The completed technical entity or method, if it is completely the same as defined in the patent application scope described below, or the same equivalent change, will be considered to be covered by this patent application scope.

17446 懋 .ptd Page 19 592007 Schematic illustrations [Schematic illustrations] Figures 1A to 1K are schematic cross-sectional views of the method of manufacturing a circuit board with a conductive barrier structure according to the present invention; Figure 2A is an exercise Schematic diagram of the plating vias of the known technology; Figure 2B is a schematic diagram of the blind hole structure filled with a filling material after the plating layer of the conventional technology is deposited; Figure 2C is the blind of the conventional technology completely filled with the conductive material Schematic diagram of the hole structure; and FIGS. 3A to 3E are schematic diagrams of a semi-additive process for making thinner circuits in the conventional art. 10 conductive base layer 11 first resistive layer

17446 懋 .ptd page 20 592007

Schematic description 201 Insulation layer 202, 203 Circuit layer 204 Plating metal 205 Filling material 206 Insulation layer 207 Circuit layer 208 Plating layer 209 Filling material 210 Insulation layer 211,212 Circuit layer 213 Conductive material 300 Four-layer circuit board 301 Core circuit board 302 Circuit Layer 303 Insulating layer 304 Plating via 305 Organic insulating layer 306 Blind L 307 Electroless copper thin layer 308 Resistive layer 309 Circuit layer 310 Resistive layer opening 311 Additive structure] 7446 Full 懋 .ptd page 21

Claims (1)

592007 VI. Application Patent Scope 1. A method for manufacturing a layered circuit board with a conductive barrier structure, comprising: providing a conductive base layer; and forming a patterned first resistive layer on the conductive base layer, so that The first resistive layer is formed with an opening to expose the conductive base layer; a plating process is performed to form a first circuit layer in the opening of the first resistive layer; the first resistive layer is removed, and a build-up process is performed to expose the Forming at least one patterned insulating layer on the first circuit layer, and the insulating layer having the first circuit layer exposed outside the opening; performing a plating process to form a conductive metal layer in the opening of the insulating layer; outside the insulating layer and the conductive metal layer A seed layer is formed on the surface; a patterned second resist layer is formed on the surface of the seed layer; the second resist layer has an opening to expose the seed layer; and is formed in the opening of the second resist layer A second circuit layer, electrically connected to the first circuit layer through a conductive metal layer; removing the second resistive layer and the seed layer covered by the second circuit layer; and performing an electroplating process on the second circuit layer Road barrier layer forming the surface of the metal barrier layer. 2. For the method of manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the scope of patent application, the method further includes forming an insulating layer on the second circuit layer on which the metal barrier layer has been formed, and following the layering process described above. Forming at least one second circuit layer with a metal barrier layer and a conductive metal layer to form a multilayer 17446 懋 .ptd Page 22 592007 6. Scope of Patent Application Asymmetric circuit board. 3. The method for manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the scope of the patent application, which further comprises forming a nickel / gold metal layer on the surface circuit layer of the circuit board by electroplating. 4. For the method of manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the scope of the patent application, the method includes pre-fresh tin material formed on the surface of the circuit board by electroplating. 5. For the method of manufacturing a layered circuit board with a conductive barrier structure in the scope of patent application No. 2, 3 or 4, the method further includes removing the conductive base layer serving as a current conduction path after the layered circuit board is completed. . 6. For the method of manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the patent application scope, wherein the seed layer is a conductive barrier metal. 7. For the method for manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the patent application scope, wherein the metal barrier layer and the seed layer are chromium (Cr), nickel (Ni), and cobalt (Co) One of the groups consisting of palladium (Pd), button (Ta), and titanium (Ti). 8. For the method of manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the patent application scope, wherein the first circuit layer comprises electroplated gold, nickel, and copper metal. 9. For example, a method for manufacturing a layered circuit board with a conductive barrier structure according to item 1 of the scope of the patent application, wherein the insulating layer is a photosensitive (P h 〇 t 〇-s en n s i t i v e) insulating layer. 10. The method of manufacturing a layered circuit board with a conductive barrier structure according to item 9 of the scope of patent application, wherein the photosensitive insulating layer can be manufactured by exposure and development. 17446 懋 .ptd Page 23 592007 6. Scope of patent application to selectively form openings. 1 1. The method for manufacturing a layered circuit board with a conductive barrier structure according to item 9 of the scope of patent application, wherein the photosensitive insulating layer may be a photoimaging resin (Photo i mageab 1 e resin) 0 1 2. — A layered circuit board with a conductive barrier structure includes: a first circuit layer, which is formed by a conductive base through a conductive base; at least one insulating layer covering the first circuit layer And the insulating layer has a conductive metal layer formed by the conductive base layer in an electrical clock manner to be electrically connected to the first circuit layer; at least one seed layer is patterned and formed on the insulating layer Surface, and the seed layer is electrically connected to the conductive metal layer; at least one second circuit layer is formed on the seed layer by the conductive base layer, and is electrically connected to the conductive metal layer by the conductive metal layer The first circuit layer; and at least one metal barrier layer are coated on the surface of the second circuit layer by electroplating the conductive base layer. 1 3. The layered circuit board with a conductive barrier structure according to item 12 of the patent application scope, wherein the metal barrier layer and the seed layer are chromium (C r), copper (Ni), or ( Co), one of the groups consisting of (Pd), la (Ta), and titanium (Ti). 14. The layer-added circuit board having a conductive barrier structure according to item 12 of the scope of patent application, wherein the first circuit layer comprises metal plated with gold, nickel, and copper. 17446 懋 .ptd Page 24 592007 VI. Application for patent scope 1 5. For example, the application of the patent scope 12 for a layered circuit board with a conductive barrier structure, wherein the insulating layer is a photosensitive (Photo- sensitive) Insulation. 16. The layer-added circuit board with a conductive barrier structure according to item 15 of the scope of patent application, wherein the photosensitive insulating layer can be selectively formed with openings through exposure and development processes. 17. The layered circuit board with a conductive barrier structure according to item 15 of the scope of patent application, wherein the photosensitive insulating layer may be a photoimageable resin. 17446 懋 .ptd Page 25