TW588441B - Packaging microelectromechanical systems - Google Patents

Packaging microelectromechanical systems Download PDF

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Publication number
TW588441B
TW588441B TW092102790A TW92102790A TW588441B TW 588441 B TW588441 B TW 588441B TW 092102790 A TW092102790 A TW 092102790A TW 92102790 A TW92102790 A TW 92102790A TW 588441 B TW588441 B TW 588441B
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thermal decomposition
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TW092102790A
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TW200304691A (en
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John Heck
Michele Berry
Daniel Wong
Valluri Rao
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Intel Corp
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00277Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
    • B81C1/00293Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS maintaining a controlled atmosphere with processes not provided for in B81C1/00285
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00912Treatments or methods for avoiding stiction of flexible or moving parts of MEMS
    • B81C1/0092For avoiding stiction during the manufacturing process of the device, e.g. during wet etching
    • B81C1/00936Releasing the movable structure without liquid etchant
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/01Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0102Surface micromachining
    • B81C2201/0105Sacrificial layer
    • B81C2201/0108Sacrificial polymer, ashing of organics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)

Description

I:發明戶斤屬之技術領域3 588441 本發明大致上係關於微機電系統(MEMS )以及特別 是關於封裝此類系統的技術。 L先前技術3 5妓 MEMS元件一般為精細的機械結構,其係由容許元件 自由移動的蝕刻設備所形成。因此,需要封裝MEMS元 件以供控制該等元件操作之環境壓力及組成。此等元件亦 · 需要保護以免遭受包含在包括切割及清淨之標準封裝中的 10 破壞性加工。再者,需要藉由降低封裝所使用之晶粒空間 量來降低封裝MEMS元件的成本。一般而言,所使用之 晶粒空間愈大,所得到的MEMS愈昂貴。 因此,對於封裝MEMS元件的較佳方法仍有需求。 t發明内容3 15 本發明揭露一種方法,包含:在一半導體結構上形成 一微機電系統;利用一熱分解層覆蓋該系統;在該熱分解 ® 層上形成一覆蓋件;以及熱分解位在該覆蓋件下方的該熱 分解層。 圖式之簡要說明 20 第1圖為根據本發明之一具體實施例之經封裝的 MEMS元件的放大截面圖; 第2圖為根據本發明之一具體實施例之如第1圖所示 的元件在製造之早期階段的放大截面圖; · 第3圖為根據本發明之一具體實施例之元件在製造之 0續次頁(發明說明頁不敷使用時,請註記並使用續頁) 588441
一後續階段的放大截面圖; 第4圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 5 10 第5圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第6圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大戴面圖;
第7圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第8圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖;以及 第9圖為根據本發明之另一具體實施例的放大截面圖 I:實施方式3 15 詳細說明 參考第1圖,封裝體10可包括一微機電系統( # MEMS )元件18於凹洞22内,該凹洞係界定於一覆蓋件 20及一半導體結構12之間。在本發明之一具體實施例中 ,在覆蓋件20中的孔32可插塞插接線24。 20 MEMS元件18與外部環境之電氣連接可經由一互連 層16來產生,該互連層係包埋在該半導體結構12内。尤 其,互連層16可位在一層14之上方及一層13之下方, 該等層可由任何介電材料形成。在一具體實施例中,層 _ _ 13為一氧化物。因此,可使MEMS元件18繞過覆蓋件 0續次頁(發明說明頁不敷使用時,請註記並使用續頁)
20來產生電氣連接,以及避免穿透覆蓋件20的需求。穿 ‘ 588441 透覆蓋件20可能危及凹洞22内的環境,以及若覆蓋件 · 20具導電性時,電氣連接16將為電氣短路。在某些具體 例中,凹洞22可為真空凹洞,但一般而言,在許多具體 5 例中,其較理想為維持在凹洞22内的密閉密封中。 參考第2圖,第1圖所示之封裝體1〇的製造係由在 半導體結構12上沈積一犧牲層15開始。犧牲層15可包 括一熱分解膜,其可藉由例如旋塗法形成。此膜在一具體 φ 例中,在高於350°C之溫度下,可分解形成氣體。在一具 10 體例中,膜可為在溫度425°C下分解之聚降冰片烯。聚降 1 冰片稀的製備係由Bhusari等人描述於“Fabrication of Air-Channel Structures for Microfluidic, Microelectro-mechanical, and Microelectronic Applications ^ ” Journal of Microelectromechanical Systems,第 10 卷,第 3 期,2001 15 年9月,第400頁。在一具體例中,以三乙氧矽烷基( TES)官能化的聚降冰片烯係黏附至氧化物,故層13可 φ 為氧化物。 參考第3圖,膜15可利用習用技術來圖案化,以形 成貫通膜26之孔。如第4圖所示,MEMS元件18可藉由 20 沈積及圖案化技術來形成。 參考第5圖,熱分解膜之第二層25可接著如第5圖 所示般形成。因為施加圖案化層15及MEMS元件18,在 某些具體例中可能造成隆起的構形。如第6圖所示,層 ~ 25可圖案化以形成邊緣28。 0續次頁(發明說明頁不敷使用時,請註記並使用續頁)
如第"7 同 一 —λ 邊纖挪.、 回所不,覆蓋件20可藉由例如沈積、封裝
MEMS元件彳}^ u a 曰15及25來形成。在本發明之一具體 例中’孔3 2可刹田固& J和用圖案化技術形成於覆蓋件中。覆蓋件 。可由各種不同的材料形成,該材料包括金屬或介電物 質或金屬與介電物質之組合,其可形成-密_障壁件。 孔32可經圖案化’故犧牲層25及15可藉由熱分解去除 /考第8圖,第7圖顯示之結構可暴露至高溫下,該 同/皿造成層15及25熱分解及脫離mems元件Μ及 10 位在覆蓋件20 it f & 仵20下方的凹洞22。在一具體例中,、經熱分解 的材料因應加熱而昇華且以氣體形式通過孔32。可用於 加熱層15及25的任何技術包括烘烤或暴露至紅外線或其 他能量來源。 參考第1圖,插接線24可簡單地直接沈積或印刷在 15孔32以㈣㈣22 °在-具體例中1封處理可在經控 制之環境中進行,以致於凹洞22在所欲的壓力下,含有 所欲的室溫氣體。孔可定位在足夠遠離元件18處,元件 18於該處不受沈積處理的影響。插接線24可由以環氧化 物々料或玻璃熔塊為三例子的材料形成。 』 接下來參考第9圖,根據本發明之另一具體實施例, 密封材料34可形成在整個覆蓋件2〇上,同時密封孔32 。密封整個覆蓋件20可改良覆蓋件之維持密閉凹洞22的 能力。在-具體實施例中’可在無孔32下形成覆蓋件2〇 ,其係藉由使覆蓋件20具有充分的多孔性以通過經分解 E續次頁(發明說明頁不敷使用時,請註記並使用續頁)
的層15及25。在此一具體實施例中,密封材料34接著 提供密封凹洞22所需的障壁件。 588441 本發明之一些具體實施例可具有各種不同的優點。舉 例而言,一些具體實施例可能有利用的,因為在晶圓等級 5 已完成脫離處理,去除對於昂貴之晶粒等級處理的需求。 尤其,第1 一 9圖所示之具體實施例可為尚未切斷成切片 的晶圓。因此,在一些具體例中,所有圖中顯示的處理, 皆可在晶圓等級時完成。如此在一些具體例中,去除對於 昂貴之晶粒等級處理的需求。 10 根據本發明之一些具體實施例,在晶粒上用於封裝 MEMS元件18的區域量較小。再者,降低用於封裝技術 之晶粒區域量,使所得之經封裝產品的成本降低。 在一些具體實施例中,脫離處理使用熱分解膜,去除 任何黏貼問題。黏貼發生在使用液體蝕刻劑來脫離MEMS 15 元件的處理中。液態蒸氣彎月面迫使精細的元件接觸,其 中固體橋鍵、凡得瓦爾力及/或氫鍵可造成結構的永久接 合。 在一些具體例中,封裝處理可利用標準沈積及蝕刻方 法完成。此等處理可容易地與現有的處理過程整合。 20 此外,在一些具體例中,一旦元件18經密封,可利 用傳統的積體電路封裝技術。因此,不需要例如晶圓接合 之用於MEMS封裝的昂貴特殊處理。 雖然本發明已參考有限的具體實施例來描述,該等熟 習該項技術者將由該等揭示内容瞭解許多改良及變化。後 E續次頁(發明說明頁不敷使用時,請註記並使用續頁) 10 588441
5 10 15 附的申請專利範圍意欲涵蓋所有此類改良及變化,以及落 於本發明之實質精神及範疇内。【圖式簡單說明】 第1圖為根據本發明之一具體實施例之經封裝的 MEMS元件的放大截面圖; 第2圖為根據本發明之一具體實施例之如第1圖所示 的元件在製造之早期階段的放大截面圖; 第3圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第4圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第5圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第6圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第7圖為根據本發明之一具體實施例之元件在製造之 一後續階段的放大截面圖; 第8圖為根據本發明之一具體實施例之元件在製造之 一後績階段的放大截面圖;以及
20 第9圖為根據本發明之另一具體實施例的放大截面圖 【圖式之主要元件代表符號表】 10 封裝體 13 層 12 半導體結構 14 層 0續次頁(發明說明頁不敷使用時,請註記並使用續頁) 11 588441
15 犧牲層 25 層 16 互連層 26 膜 18 MEMS元件 28 邊緣 20 覆蓋件 32 子L 22 凹洞 34 密封材料 24 插接線
12

Claims (1)

  1. 588441 )《年S 一…、.二/補恭 拾:、申請專利範圍 — ,—— --' ' - . -' : .. .-: . :.:: ;. 第921〇279〇號專利申請案申請專利範圍修正本 93.( 1 一種封裝微機電系統之方法,包含: 在一半導體結構上形成_微機電系統; 利用一熱分解層覆蓋該系統; 5 在該熱分解層上形成一覆蓋件;以及 熱分解位在該覆蓋件下方的該熱分解層。 2. 如申明專利|巳圍第1項之方法,其中熱分解包括造成 該熱分解層昇華。 3. 如申請專利範圍第2項之方法,包括在該覆蓋件中形 成孔,以容許經昇華之層脫離。 4. 如申請專利範圍第3項之方法,包括在該層已熱分解 後松閉該孔。 5·如申請專利範圍第4項之方法,包括塗覆該覆蓋件以 密閉該孔。 15 6· 7. 8. 20 如申請專利範圍第4項之方法,包括沈積一密封材料 在該孔上’但未覆蓋整個該覆蓋件。 如申请專利範圍第1項之方法,包括容許熱分解材料 經由該覆蓋件脫逸及接著密封該覆蓋件。 如申請專利範圍第1項之方法,包括移除該熱分解層 及在該覆蓋件及環繞該微機電系統的該結構之間,形 成一密閉凹洞。 9·如申請專利範圍第1項之方法,包括提供一電氣連接 經由該半導體結構至該微機電系統。 0續次頁(申請專利範_不敷使觸,請註記並使麵頁) 13 閃441 %”月、蚊/更正/補充 :申請專利範圍末頁 包括形成一電氣連接 拾、审_利範圍 10.如申請專利範圍第丨項之方法 至該系統,但未穿透該覆蓋件 11 · 一種微機電結構,包含·· 一半導體層; 一微機電系統,其係形成於該層上; …刀解層,其係形成在該系統上;以及 覆蓋件,其係覆蓋該熱分解層。 12.如中請專㈣圍第^之結構,其中該結構為半導體 晶圓。 13.如中請專㈣圍第Μ之結構,其中該熱分解層係由 °在冋於350C之溫度下分解的材料所形成。 14·如申請專利範圍第13項之結構’其中該材料包括聚 降冰片烯。 15. ^請專利範圍第11項之結構,其中該熱分解層係由 當加熱時昇華形成氣體的材料所形成。 16·如7請專利範圍第11項之結構,其中該«件為充分 非夕孔f生,以界定一密閉凹洞。 A如中請專利範15第U項之結構,其中該覆蓋件包括貫 通該覆蓋件之多數孔。 18·如申請專利範圍帛U項之結構,包括一經包埋之互連 層,其延伸穿透該半導體層並與該系統電氣编合。 A ^請專利範㈣U項之結構,包括熱分解材料之第 人層’其係至少部分形成在該系統下方,以及熱分 解材料之第二次層,其係形成在該系統上。 14
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