TW586227B - Manufacture of bipolar transistors including silicon-germanium/silicon heterojunction - Google Patents

Abstract

A semiconductor substrate used for manufacturing heterojunction bipolar transistors. The semiconductor substrate includes a substrate mainly formed from silicon, a silicon-germanium layer disposed to cover the silicon substrate, and a protective silicon layer substantially consisting of silicon. The protective silicon layer is deposited on the silicon-germanium layer.

Description

586227

面 、 面 _ 'r; — * .. *-: ·;:! «.. ...; .....,.: The month should state the technical field, prior art, content, Brief description of the implementation mode and diagram)

Background of the Invention The present invention relates to a method for manufacturing a bipolar transistor (HBT) containing a germanium oxide / lithium oxide heterojunction, and a semiconductor substrate suitable for manufacturing a body. Japan / Bipolar Transistors (HBTS) containing germanium silicide / silicide heterojunctions operate at high frequencies of 10 gigahertz (GHz) or higher and are therefore used for high-speed communication devices or high-speed power transistors. ^ Figure 1 shows a cross-section of a bipolar transistor (HBT) without a conventional heterojunction. The main surface of the silicon substrate 102 is covered with an epitaxial silicide layer 103 used as an HBT collector. The upper surface of this epitaxial silicide layer 103 is covered with a germanium silicide layer ι01 which is used as the HBT base. A heavily doped fossil material layer 104 for use as an hbt emitter is deposited on the germanium silicide layer 101. The collector electrode 105 is deposited on the back surface of the silicon substrate 102. The emitter electrode ιo is formed on the silicide layer 104. The base electrode 107 is formed on the germanium silicide layer 101. Traditional HBT has a small input impedance and therefore operates at high speed. A germanium silicide film is usually formed by chemical vapor deposition (CVD). Figure 2 shows a conventional CVD apparatus for the deposition of a germanium silicide film. The CVD apparatus includes a deposition reaction chamber 109, a substrate holder 110, and a shaking reactor 111. The substrate 10 covered with the germanium silicide film is loaded into the deposition reaction chamber 109 and fixed to the substrate holder 110. The substrate holder 110 includes a heater (not shown) to raise the temperature of the silicon substrate 108. During the deposition of germanium silicide film

(2) The deposition reaction chamber 109 supplies a deposition gas containing a hydrosilicide gas, such as silane and disilane, and a germanohydrogen gas, such as germane. The reaction of hydrosilicide and germanohydrogenide forms a silicide film. The germanium silicide layer 101 is deposited by the following process. The silicon substrate 102 covered with the epitaxial stone layer 103 is transferred to the deposition reaction chamber 109 via the load-shaking reaction chamber U1 and fixed to the silicide bracket 11. Next, the Shi Xi substrate 102 is heat-treated at a temperature of 800 ° C to 900 ° C for 10 to 60 minutes. The heat treatment removes oxygen and carbon from the surface of the stupid banding layer 103. Then, the temperature of the Shi Xi substrate 102 is adjusted to an ideal deposition temperature ', which is generally in a range of 500 ° C to 800 ° C. A deposition gas is then supplied into the deposition reaction chamber 109, while the silicon substrate 102 is maintained at a desired deposition temperature. Then, by stopping the supply of the deposition gas, or cooling the silicon substrate 108, the deposition of the germanium silicide layer 10 i is stopped. The thickness of the staggered oxide layer 101 can be adjusted by the deposition time and / or the pressure of the deposition reaction chamber. The concentration of germanium silicide film can be adjusted by the composition of the deposition gas. After the germanium silicide layer 101 is deposited, a silicide layer 104 is deposited on the germanium silicide layer 101 by the same CVD method as the germanium silicide layer 101. The germanium oxide layer 101 and the silicide layer 104 are deposited in different CVD reaction chambers to avoid contamination. The germanium silicide layer 101 and the silicide layer 104 have different conductivity types, and the silicide layer 104 is generally required to be heavily doped. If the germanium silicide layer 101 and the silicide layer 104 are deposited in the same reaction chamber, it will leave heavily doped impurities in the reaction chamber. Residual impurities may contaminate the wrong petrochemical layer 101. Different reaction chambers are used for the deposition of the stone oxide layer 101 and the stone oxide layer 104 to effectively avoid the contamination of impurities. 586227

(3) The silicide layer 104 is deposited by the following procedure. The silicon substrate 102 covering the germanium silicide layer 101 is transferred to the deposition reaction chamber. Next, the silicon substrate 102 is heat-treated at a temperature of 800 ° C to 900 ° C for 10 minutes to 10 minutes. The heat treatment removes oxygen and carbon from the surface of the germanium silicide layer 100. Next, the temperature of the Shixi substrate 102 is adjusted to an ideal deposition temperature, which is generally in the range of 500 ° C to 800 ° C. Hydrosilicide is then supplied to the deposition reaction chamber while the silicon substrate 102 is maintained at the desired deposition temperature. Then, by stopping the supply of hydrosilicide, or cooling the silicon substrate 108, the deposition of the silicide layer 104 is stopped. The thickness of the silicide layer 104 can be adjusted by the deposition time and / or the pressure of the deposition reaction chamber. The improvement of process yield and the performance of germanium silicide heterojunction bipolar transistors (HBTs) requires that the germanium silicide layer and silicide layer have fewer defects and flatness. Defects contained in the germanium silicide layer and the silicide layer cause leakage current. In addition, the poor flatness of these layers deteriorates the accuracy of the process and reduces the process yield. Defects and poor flatness of the germanium silicide layer and silicide layer are a problem in the fabrication of germanium silicide heterojunction bipolar transistors (HBTs). The defects in flatness and poor flatness are caused by the following two reasons. One reason is the stress contained in the germanium silicide layer and the silicide layer, and the other cause is the contamination of the surface of these layers. The stress is caused by a slight difference between the lattice constants of the germanium silicide layer and the silicide layer. The lattice constant of the germanium silicide layer increases as the germanium concentration increases. Therefore, there is a lattice misalignment on the junction surface of the germanium silicide layer and the silicide layer. The lattice dislocation causes a stress of 586227 on the germanium oxide layer and the stone layer. The stress causes a dislocation ' in the germanium silicide layer and thus causes a stacking error. Stacking errors result in poor flatness of the germanium silicide layer. Bean and others in Applied Physics Communication (Applied Physics No. 54 (1989), p. 925) revealed that proper germanium concentration and germanium silicide layer thickness effectively reduce defects in germanium silicide layers. Revealed The conditions effectively avoid the occurrence of defects and flatness deterioration caused by stress. The optimization of the deposition conditions of the germanium oxide layer is not effective in suppressing the generation of defects and flatness deterioration caused by pollution. Especially during the transfer between sedimentation reaction chambers, it is difficult to remove the contaminants deposited on the whetstone layer. The contaminants on the surface of the germanium silicide layer cause stacking errors in the silicide layer, thus silicifying The flatness of the material layer deteriorates. It is currently believed that the pollutants on the surface of the germanite layer include oxygen, carbon, fluorine, and metal elements. The reduction of pollutants has traditionally been achieved by chemical cleaning and high temperature heat treatment in a vacuum reaction chamber. RCA cleaning is a typical method of chemically removing contaminants. RCA cleaning includes the following steps: (1) pure water for several minutes; (2) immersed in the solution at 75 degrees Celsius Minutes, this solution consists of ammonium hydroxide, hydrogen peroxide, and water; (3) washed with pure water for several minutes; (4) immersed in 1% by weight of hydrofluoric acid for several minutes at room temperature (5) Wash with pure water for several minutes; (6) Soak in the solution for several minutes at room temperature. This solution consists of hydrochloric acid, hydrogen peroxide, and water; (7) Wash with pure water for several minutes; 586227

(5) (8) immersed in 1% weight percent hydrofluoric acid for several minutes at room temperature; (9) washed with pure water for several minutes; (10) immersed in solution for several minutes at room temperature This solution consists of sulfuric acid, hydrogen peroxide, and water; (11) cleaned with pure water for several minutes; and (12) spin-dried. However, because the acid silicide layer is used to chemically clean the silicon silicide layer, the chemical cleaning forms etched depressions on the surface of the germanium silicide layer, thereby deteriorating the flatness of the germanium silicide layer. Etching depressions reduce the process yield of germanium silicide heterojunction bipolar transistors (HBTs). Cleaning on the surface of the germanium silicide layer can be achieved by using an organic solvent such as propylene. However, contaminants cannot be effectively removed by organic solvents. Another problem is the stray vapor from the germanium silicide layer caused by the heat treatment before the silicide layer is deposited. As described above, before the silicide layer is deposited on the germanium silicide layer, the substrate is heat-treated at a temperature of 800 ° C to 900 ° C to remove contaminants on the surface of the germanium silicide layer. The heat treatment effectively reduces the concentration of oxygen and carbon on the surface of the germanium silicide layer to below the detection limit. However, thermal treatment causes germanium to evaporate from the germanium silicide layer. The germanium vapor deteriorates the flatness of the germanium silicide layer. The poor flatness of the germanium silicide deteriorates the flatness of the silicide layer provided thereon. It would be beneficial to provide a technique that effectively excludes defects from heterojunction bipolar transistors (HBTs) and improves the flatness of the layers contained in the HBTs. 586227

SUMMARY OF THE INVENTION It is therefore an object of the present invention to eliminate defects from a heterojunction bipolar transistor (HBT) including a germanium silicide / silicide junction and to improve the flatness of a layer included in the HBT. In one aspect of the present invention, a semiconductor substrate includes a substrate mainly formed of silicon, a germanium silicide deposited to cover the silicon substrate, and a protective silicide layer consisting essentially of a silicon oxide. A protected silicide layer is deposited on the germanium silicide layer.

The protective layer should be deposited to completely cover the upper surface of the germanium silicide layer. The thickness of the protective layer should be equal to or more than 50 Angstroms, and is so limited that the protective layer has no substantial effect on the operation of the heterojunction bipolar transistor. The substrate may include a heavily doped silicon substrate and a lightly doped epitaxial silicide layer. In another aspect of the present invention, a method of manufacturing a semiconductor substrate for producing a heterojunction bipolar transistor includes: providing a substrate mainly formed by silicide; and depositing a germanium silicide layer to cover The substrate;

A protective silicide layer is deposited on the upper surface of the germanium silicide layer. In yet another aspect of the present invention, a method for manufacturing a heterojunction bipolar transistor includes: providing a semiconductor substrate including: a substrate formed mainly of silicide; and a germanium silicide deposited to cover the substrate Layer; a protected silicide layer is deposited on the germanium silicide layer, this protected -10- 586227

The silicide layer is substantially composed of a silicide; a silicide layer is deposited on the upper surface of the protected silicide layer. _ This manufacturing method should include: Chemical cleaning of the semiconductor substrate using an acid solution. • Chemical cleaning may include at least one of a first immersion bath in a hydrochloric acid solution and a second immersion bath in a solution consisting of sulfuric acid and hydrogen peroxide. It is beneficial if the manufacturing method includes the following: Exposing the semiconductor substrate to an ozone environment. It is beneficial if the manufacturing method also includes the following: € The semiconductor substrate is thermally cleaned before the deposit layer is deposited. Thermal cleaning should be achieved by heat treatment at a temperature higher than 800 degrees Celsius. Brief Description of the Drawings Figure 1 shows a cross-sectional view of a conventional heterojunction bipolar transistor (ΗΒτ); Figure 2 shows a conventional CVD apparatus for manufacturing a conventional heterojunction bipolar transistor (ηβτ); and Figure 3 shows the present invention In a specific embodiment, a semiconductor substrate for manufacturing a heterojunction bipolar transistor (HBTs) is shown in FIG. 4; FIG. 4 shows a CVD apparatus for manufacturing a semiconductor base board in a specific embodiment of the present invention; & 5 to 9 are cross-sectional views showing a process for manufacturing a semiconductor substrate in this embodiment; FIG. 10 shows a process for manufacturing heterojunction bipolar transistors (HBTs) in this embodiment. Another CVD apparatus;-· Figs. 11 to 14 are sectional views showing the fabrication of a different embodiment in this specific embodiment-586227

程 Manufacturing process of HBTs; Figure 15 shows a cross-section view of the fabricated HBTs. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Fig. 3 shows a semiconductor substrate for manufacturing heterojunction bipolar transistors (HBTs) in a specific embodiment of the present invention. As shown in FIG. 3, the semiconductor 2 board includes an n-type silicon substrate 9-1, a p-type germanium silicide layer 9-2, and a thin protective silicide layer 9-3. The germanium silicide layer 9_2 is deposited on the main (upper) surface of the silicon substrate, and the protective silicide layer 9-3 is deposited on the germanium silicide layer 9-2. The protective silicide layer 9-3 completely covers the upper surface of the germanium silicide layer 9_2. As will be described below, the silicide layer 9_3 is used as a protective layer. It should be noted that the silicon substrate 9-1 may include a heavily doped n-type substrate, and a lightly doped epitaxial silicide layer (not shown) deposited on the heavily doped n-type substrate. In this case, the germanium oxide layer 9-2 is deposited on the skeletal oxide layer. The semiconductor substrate shown in FIG. 3 is provided for the fabrication of a heterojunction bipolar transistor (HBT). By depositing a silicide layer with an appropriate thickness on the protective silicide layer 9_3, this fabrication allows the formation of an ideal structure. SiGe / Si interface. It is advantageous if the thickness of the protective fossil material layer 9-3 is 50 angstroms or more. A protective silicide layer having a thickness equal to or more than 50 angstroms, 3 effectively protects the shredded layer 9-2 from chemical damage during chemical cleaning. On the other hand, if the thickness of the protective silicide layer 9-3 is so thin that it allows the protective silicide layer 9-3 to have no substantial effect on the operation of the heterojunction bipolar transistors (hbts), it is also beneficial. of. -12- 586227

(9) The following is a process for manufacturing the semiconductor substrate shown in FIG. 3. FIG. 4 shows a CVD apparatus 10-1 for manufacturing a semiconductor substrate. The germanium silicide layer is deposited by the CVD device 10-1 through the deposition of the layer 9-2 and the protective silicide layer 9-3. The CVD apparatus 10-1 includes a deposition reaction chamber 1-1. The vacuum pump 2-1 "is connected to the deposition reaction chamber 1 -1 to evacuate the deposition reaction chamber 1 -1. The substrate holder 3-1 for fixing the substrate 6-1 is placed in the deposition reaction chamber 1-1. The substrate The support 3-1 includes a heater 4-1 to heat the substrate to a desired temperature. The deposition reaction chamber 1-1 has a source gas 5-1. The source gas 5-1 contains metazite and stilbene. For thin films with η-type or p-type impurities, phosphine® gas and diborane gas can be added to the source gas 5-1. Arrange to carry the shaking reaction chamber 7-1 and the channel valve 8-1 to the substrate 6- 1 is loaded into the deposition reaction chamber 1-1. The substrate 6-1 is loaded into the deposition reaction chamber 1 -1 from the load-shaking reaction chamber 7-1 through the passage valve 8-1. The process of manufacturing a semiconductor substrate begins by providing The Shixi substrate 9-1 shown in Figure 5. This Shixi substrate 9-1 has a crystal orientation of < 100 > and a diameter of 4 inches (in). Before the deposition of the germanium silicide layer 9-2, The surface of the silicon substrate 9-1 is cleaned and washed with RC A. As mentioned above, rc A cleaning includes a series of steps: (1) pure water for several minutes; · (2) immersed in a solvent at 75 ° C For several minutes, this solution consists of ammonium hydroxide, hydrogen peroxide, and water; (3) Wash with pure water for several minutes; (4) Soak in 1% by weight of hydrofluoric acid at room temperature For several minutes;-(5) Wash with pure water for several minutes; / (6) Soak in the solution for several minutes at room temperature. This solution consists of hydrochloric acid-13-586227 (ίο), and water. Composition; (7) Wash with pure water for several minutes; (8) Soak in 1% weight percent hydrofluoric acid for several minutes at room temperature; (9) Wash with pure water for several minutes; (10) At room temperature , Immersed in the solution for several minutes, this solution consists of sulfuric acid, hydrogen peroxide, and water; (11) pure water for several minutes; and (12) spin drying. After RAC cleaning, as shown in Figure 6 As shown, the silicon substrate 9-1 is loaded into the deposition reaction chamber 1-1, and then fixed to the substrate holder 3-1. Then, the deposition reaction chamber 1-1 is evacuated to 1 X 1 〇- with a vacuum pump 2-1. 9 Torr (Torr) ❶ After vacuuming, as shown in Figure 7, the silicon substrate 9-1 was thermally cleaned at a temperature of 800 ° C and 900 ° C for 5 minutes. The heat treatment was effectively moved from the surface of the silicon substrate 9-1 Oxygen and carbon After the thermal cleaning, the temperature of the silicon substrate 9-1 is then adjusted to 700 degrees Celsius. Then, as shown in FIG. 8, the detailed process of the deposition of the germanium silicide layer 9-2 and the protective silicide layer 9-3 It is as follows. A source gas 5-1 containing disilane and germane is supplied to the deposition reaction chamber 1-1. The partial pressure of germane is adjusted to 4 × 10.5 Torr. The source gas 5-1 is 10 minutes A 2000 angstrom germanium silicide layer 9-2 was deposited on a silicon substrate 9-1. The deposition temperature exceeds 500 degrees Celsius, which effectively helps the reaction of samarium silane, thereby improving the crystallinity of the germanium silicide layer 9-2. The deposition of the germanium silicide layer 9-2 and the protective silicide layer 9-3 is achieved by a reaction represented by the following reaction equation: 586227

〇i)

Si2H6 (gas) + 2Si — 2Si (absorption) + 6H (absorption),

GeH4 (gas) + 4Si — 2Ge (absorption) and 4H (absorption), and 2H (absorption) —H2 (gas). After the germanium silicide layer 9-2 was deposited, the supply of germane was stopped, but the supply of disilane was continued. A supply of disilane for 10 seconds deposits a protective silicide layer 9-3 of 50 angstroms. After the deposition of the protective silicide layer 9-3, the supply of disilane and the heating of the silicon substrate 9-1 are stopped. The manufacturing process of the semiconductor substrate is completed. The semiconductor substrate covering the germanium silicide layer 9-2 and the protective silicide layer 9-3 is referred to as a semiconductor substrate 13. The semiconductor substrate 13 is then removed from the deposition reaction chamber 1-1 and exposed to the air shown in FIG. 9. Protecting the silicide layer 9-3 effectively prevents the surface contamination of the germanium silicide layer 9-2. The protective silicide layer 9-3 covers the germanium silicide layer 9-2 and functions as a protective layer. Exposure of the semiconductor substrate 13 to air does not cause contamination of the surface of the fragile material layer 9-2. The exposure of the semiconductor substrate 13 to the air may contaminate the surface of the protective silicide layer 9-3. However, it is easy to remove the contaminants on the surface of the protective stone layer 9-3 by chemical cleaning. The protective silicide layer 9-3 is acid-resistant, which allows the semiconductor substrate 13 to be cleaned using chemical cleaning. The semiconductor substrate 13 is suitable for manufacturing bipolar transistors (HBTs) each including a dream / hard heterojunction junction. The process for manufacturing heterojunction bipolar electric crystals (HBTs) is described below. The manufacturing process begins with chemical cleaning of the surface of the semiconductor substrate 13. First, the semiconductor substrate 13 is immersed in a hydrochloric acid solution. This solution was prepared by diluting 45 weight percent hydrochloric acid with pure water. Effectively move in immersion in HCl solution -15-

586227 Removes natural oxides on the surface of the semiconductor substrate 13. The volume ratio of hydrochloric acid solution to pure water is 1:49. Next, the semiconductor substrate 13 is immersed in a solution composed of sulfuric acid and hydrogen peroxide. The volume ratio of sulfuric acid to hydrogen peroxide solution is 丨 2. This solution contains sulfuric acid and hydrogen peroxide, which effectively removes contaminants on the surface of the semiconductor substrate 13. The protection silicide layer 9-3 effectively protects the germanium silicide layer 9-2 from the chemical etch of the acid, and thus maintains the flatness of the staggered silicide layer 9_2. Optical lithography after chemical cleaning has confirmed that no surface irregularities, such as etched depressions, are observed. X-ray photoelectron spectroscopy can be used to analyze the concentration of contaminants on the surface of the protective silicide layer 9-3. The carbon concentration is less than 5x10u atoms / cm2 (atoms / cm2), and the metal concentration is less than the lower detection limit, that is, less than lx 10 atoms / cm2 (at0ms / crn2). Carbon and metal concentrations have proven to be sufficiently low. The oxygen concentration is on the order of 1 × 10 5 atoms / cm 2. The oxygen concentration of about 10i5 atoms / cm2 (at0ms / cm2) is not a problem, because about 1x 1015 atoms / cm2 (at0ms / cm2) of oxygen can be removed by the thermal cleaning described below. Pollutants. It is beneficial that the semiconductor substrate 13 is exposed to an ozone environment before or after chemical cleaning. The ozone environment can be generated by ultraviolet radiation to the air. The ozone environment effectively reduces the carbon concentration on the surface of the semiconductor substrate 13.

After chemical cleaning, a thick silicide layer is deposited on the protective silicide layer 9-3 as an emitter. The silicide layer is deposited by using another CVD apparatus 10-2 shown in FIG. The configuration of this CVD device 10-2 and CVD -16- ° 〇 ^ 27

The configuration of signature 1 / \ and heart 1 are exactly the same. The CVD apparatus 10-2 includes a deposition reaction chamber 190. A vacuum pump 2-2 series is connected to the deposition reaction chamber 1-2 to

= U evacuates. The substrate holder 3-2 for holding the substrate 6-2 includes a heating element 4 · 2 to heat the substrate 6-2 to a desired temperature. The deposition reaction chamber 1-2 has & source gas 5_5. The source gas 5-2 contains silane and germane. When depositing a thin film doped with n-type or p-type impurities, phosphine gas and diboron combustion gas may be added to the source gas 5-2. The load-bearing shaking reaction chamber 7-2 and the channel wide door 8.2 are arranged to load the substrate 6-2 into the deposition reaction chamber 1-2. The substrate 6-2 is loaded into the deposition reaction chamber 1-2 from the load-bearing shaking reaction chamber 7-2 via the passage valve 8-2. The deposition of a thick silicide layer starts by loading the semiconductor substrate 13 into a deposition reaction chamber 1-2 shown in FIG. As shown in FIG. 12, after the deposition reaction chamber 1-2 is evacuated, the semiconductor substrate is thermally cleaned at a temperature of 800 ° C to 900 ° C for 13 minutes. The thermal cleaning removes oxygen on the surface of the semiconductor substrate 13.

The protective silicide layer 9-3 completely covers the germanium silicide layer 9-2 to avoid the evaporation of germanium from the germanium silicide layer 9-2 during the thermal cleaning. Experiments by the inventors have confirmed that a protective silicide layer 9-3 having a thickness of 50 angstroms or more effectively suppresses the evaporation of germanium. After the thermal cleaning, the temperature of the semiconductor substrate 13 is adjusted to 700 degrees Celsius, and then a source gas 5-2 containing disilane (Si2H6) is introduced into the deposition reaction chamber 1-2 shown in FIG. The pressure of the disilane gas is adjusted to 2.2 × 1 (Γ4 Torr). Phosphine or diborane gas can be added to the source gas 5-2. The silicide layer of the disilane gas deposits 9-4. Silicide The material layers 9-3 and 9-4 are combined to form a thick stone material layer 9-6, which is used as an emitter. The stone material layer 9-6 has a thickness of 6000 angstroms. In the silicide layer 9-4 After the deposition, the semiconducting -17-586227

The body substrate 13 will be referred to as a semiconductor substrate 14 hereinafter. It should be noted that the impurities diffuse through the thin silicide layer 9-3. The conductivity type of the protection silicide layer 9-3 can be changed to the same conductivity type as the silicide layer 9-4. The deposition of the stone oxidant layer 9-4 is preferably performed at a temperature higher than 500 degrees Celsius. Deposition temperatures below 500 degrees Celsius reduce the deposition rate to less than 10 Angstroms / minute and increase the time (TAT) of the entire process of manufacturing heterojunction bipolar transistors (HBTs). Next, as shown in FIG. 14, the semiconductor substrate 14 is unloaded from the deposition reaction chamber 1-2. Optical lithography has confirmed that the semiconductor substrate 14 is extremely superior in crystallinity and flatness. No irregularities were observed on the surface of the silicide layer 9_6. At the same time, the concentration of crystal defects was reduced to less than 1000 / cm2 (cm2). After the silicide layer 9-6 was formed, the portion was etched The silicide layer is exposed to expose a part of the germanium silicide layer 9-2. The base electrode 9-7 is formed on the exposed portion of the germanium silicide layer, and the emitter electrode 9_8 is formed on the silicide layer 9_6. The collector electrode system is formed on the back surface of the silicon substrate 9]. The silicon substrate 9 "is used as a collector, the germanium silicide layer 9_2 is used as a base, and the silicide layer 9_6 is used as an emitter. It should be noted that the silicon substrate in FIG. 15 includes a heavily doped Shi Xi substrate 9-la and a lightly doped epitaxial silicide layer 9-lb. The protective silicide layer 9-3, which incorporates the silicide layer 9-6, has substantially no effect on the operation of the heterojunction bipolar transistor (HBT) because of its thin thickness. Comparative experiments have been performed to confirm the advantages of the manufacturing process in this particular embodiment. The first sample substrate has been manufactured with exactly the same as this specific 586227

(15) The structure of the semiconductor substrate 13 in the embodiment is not integrated except for protecting the silicide layer 9_3. Then, the first sample substrate was subjected to the above-mentioned thermal cleaning. After thermal cleaning, a silicide layer is deposited directly on the germanium oxide layer 9-2 (corresponding to the silicide layer 9-4). A large number of stacking errors have been observed in the deposited silicide layers. The concentration of stacking errors is on the order of hundreds of thousands per square centimeter. It has been considered that the stacking error is due to the inscription depression generated on the germanium silicide layer. In addition, thermal cleaning prior to the silicide layer deposition has forced germanium to evaporate from the germanium silicide layer 9-2. The evaporation of germanium has reduced the germanium concentration in the germanium silicide layer 9-2. Other sample substrates have been manufactured that each include a protective stone layer on the germanium oxide layer 9_2. The thickness of the protective silicide layer is less than 50 angstroms. One sample ασ substrate contains a protective stone layer with a thickness of 30 angstroms, and the other is a protective stone layer with a thickness of 40 angstroms. Both sample substrates are chemically cleaned. After chemical cleaning, etched depressions were observed in both sample substrates. Next, a thick silicide layer is formed on each of the sample substrates. After the thick silicide layer was deposited, thousands of stacking errors per square centimeter were observed in both sample substrates. It has been confirmed that the protective silicide layer 9-3 thinner than 50 Angstroms deteriorates the crystallinity of the silicide layer 9-4 deposited on the protective silicide layer 9-3. Although the present invention has been described in its particular preferred form to a considerable degree, it should be understood that the preferred form of the present invention can be changed in construction details, and partial combinations and arrangements can be adopted without departing from the scope of the present invention, which is under the scope of patent application Spirit and scope. -19- 586227 (16) Symbolic representation of the diagram 102 Fragmented substrate 103 Epitaxial silicide layer 101 Whetstone layer 104 Heavy doped silicide layer 105, 9-9 Collector electrode 106, 9-8 Emitter Electrode 107, 9-7 Base electrode 109 Deposition reaction chamber 110 Substrate holder 111 Carrying shaking reaction chamber 9-1 η-type silicon substrate 9-2 P-type silicon oxide layer 9-3, 9-4 Protective silicide layer 10 -1, 10-2 Chemical vapor deposition equipment 1-1, 1-2 Deposition reaction chamber 2-1, 2-2 Vacuum pump 3-1, 3-2 Substrate holder 4-1, 4-2 Heater 6 -1, 6-2 Substrates 5-1, 5-2 Source gases 7-1, 7-2 Carry the shaking reaction chamber 8-1, 8-2 Channel valves 13, 14 Semiconductor substrates

-20- 586227 (17)

9-6 9-la 9-lb thick shattered layer heavily doped silicon substrate lightly doped silicon substrate -21-

Claims (1)

1. Patent application scope 1. A conductor substrate for manufacturing a heterojunction bipolar transistor, including a substrate mainly formed of silicon; a germanium silicide layer deposited to cover one of the silicon substrates; and substantially made of stone One of the components is a protective silicide layer, which is deposited on the germanium silicide layer. 2. For the semiconductor substrate of claim 1 of the patent scope, the protective layer is deposited to cover the upper surface of the germanium oxide layer. 3. If the semiconductor substrate of the first patent application scope, the thickness of the protective silicide layer is equal to or more than 50 angstroms. 4. If the semiconductor substrate of the third patent application scope, the thickness of the protective silicide layer is determined so that the operation of the protective silicide layer on the heterojunction bipolar transistor is substantially ineffective. 5. The semiconductor substrate according to item 1 of the scope of patent application, the substrate comprising: a doubly doped Shi Xi substrate, and a small amount of doped epitaxial silicide layer. 6. · A method of manufacturing a semiconductor substrate for producing a heterojunction bipolar transistor, the method comprising: providing a substrate mainly formed by silicide; depositing a germanium silicide layer to cover the substrate; depositing a protective layer The silicide layer is on the upper surface of the germanium silicide layer. 7. The method according to item 6 of the patent application, wherein the substrate comprises: a heavily doped silicon substrate, and a lightly doped epitaxial silicide layer on which the germanium silicide layer is deposited. The thickness of the protective silicide layer is equal to or more than 50 angstroms as in the method of the patent application No. 6. For a semiconductor substrate with the scope of patent application No. 8, the thickness of the protective silicide layer is determined so that the operation of the protective silicide layer for the heterojunction ^ bipolar transistor is substantially ineffective. A method of manufacturing a heterojunction bipolar transistor, comprising: providing a semiconductor substrate comprising: a substrate formed mainly of stone oxide; a germanium band layer deposited to cover the substrate; and a protective layer A silicide layer is deposited on the germanium silicide layer, and the protected silicide layer is substantially composed of silicide; a silicide layer is deposited on the upper surface of the protected silicide layer. If the method of claim 10 is applied, the thickness of the protective silicide layer is equal to or more than 50 angstroms. For a semiconductor substrate with the scope of application for item 10, the thickness of the protective silicide layer is determined so that the operation of the protective silicide layer on the heterojunction bipolar transistor is substantially ineffective. The method of claim 10, further comprising: chemically cleaning the semiconductor substrate using an acid solution. For example, the method of claim 13 in the patent application, wherein the chemical cleaning may include at least one of a first dipping bath in a hydrochloric acid solution and a second dipping bath in a solution consisting of sulfuric acid and hydrogen peroxide. The method of claim 13 may further include: exposing the semiconductor substrate to an ozone environment. 586227 16. The method of claim 10, further comprising: thermally cleaning the semiconductor substrate before depositing the silicide layer. 17. The method according to item 16 of the patent application scope, wherein the thermal cleaning is achieved by heat treatment at a temperature higher than 800 degrees Celsius.