TW577035B - Substrate for a display device, array substrate, inspection circuit, inspection method and method of fabricating liquid crystal cell - Google Patents

Abstract

Disclosed is novel inspection circuits integrating array inspection circuits and cell inspection circuits together, which are also capable of reducing the number of probes required upon inspection. Provided is a first inspection circuit for supplying signals for inspection with respect to a plurality of data signal lines constituting an active-matrix display device. The first inspection circuit includes a first circuit portion for selectively supplying a common first inspection signal to any of a prescribed number of the data signal lines, and a second circuit portion for independently supplying a second inspection signal to the prescribed number of the respective data signal lines.

Description

577035

BACKGROUND OF THE INVENTION The present invention relates to an inspection circuit for inspecting during the manufacture of an active matrix display device. The widely used thin film transistor (TFT) color liquid crystal display device manufacturing process can be divided into three processes: a liquid crystal cell process; a liquid crystal module process; and a liquid crystal monitor process. The liquid crystal module is completed by connecting a liquid crystal cell to the driver 1C, a driving circuit for generating a control signal to be input to the driver 10, and mounting a backlight and mechanical components. In addition, the LCD monitor is completed by further connecting the LCD module to a graphics adapter card for generating a signal containing the image information to be input, and installing a mechanical component. In the process of manufacturing a liquid crystal display device, it is basically necessary to detect defects caused by dust incorporation during the process or defects caused by dimensional errors in order to improve manufacturing efficiency. Therefore, in each step of the liquid crystal display device manufacturing process, various inspections such as a gap inspection and a light emission inspection are performed. For example, Japanese Unexamined Patent Publication No. 60 (1985) -2989 discloses a method for detecting disconnection and short circuit of a data / scanning signal line of a TFT array substrate used to construct a liquid crystal cell. The method implements a broken line detection in the data / scanning signal line of a liquid crystal display device that includes only an X-drive circuit system. The method detects the problem by providing a set of transistors for inspection on the reverse side of the X-drive circuit Disconnection and short circuit of measured data / scanning signal line. Specifically, the inspection is performed by inputting a specific inspection signal outputted by a driving circuit from a transistor for inspection. In addition to the previous method, Japanese Unexamined Patent Publication No. 3 (199 1) -18891, No. 3 (1991) -20721, and No.-5- this paper is suitable for the standard _ turn to the standard _) A4 size (Envy)

Binding

577035 A7 ------ B7 V. Invention Description (2) No. 5 (1993) -5897 and Case No. 5 (1993) -1 1000 Published Inspection of TFT Array Substrate 'The method is to use the signal line or The switching circuit is connected to an active matrix array on the opposite side of the driving circuit. In addition, Japanese Unexamined Patent Report No. 2 (1990) · 154292 was published by using an t-selective circuit with an analog switch function to check the active matrix array for disconnection before connecting to the driver 1C. . One of the various inspections is the image quality inspection, which is an inspection performed after the TF-LCD cell is completed. Although various methods for inspecting the image quality of a TFT liquid crystal cell are known, the inspection method mainly used is called a multi-probe mode. The way to perform the probe mode is to use the probe to independently connect all signal input terminals of the liquid crystal cell in the final step of manufacturing the liquid crystal cell, and input the electronic signal equivalent to the input signal from the driver IC in the liquid crystal module. In this way, the driving of the liquid crystal cell of the final product can be completely reproduced to thereby perform the inspection by visually checking the display screen of the final product. In this case, the prepared input signal is displayed on a screen. However, checking according to the multi-probe mode involves several issues, as described below. First of all, more probes are extremely costly and also require considerable production time. For example, a LCD unit with 1024 pixels ((multiplied) 3 pixels) (multiplied) 768 columns contains wiring for inputting at least 3840 signal lines. Therefore, in order to perform an image quality check, it is necessary to prepare a probe capable of contacting almost 4,000 signal input terminals. There is also the issue of checking stability. In recent years, due to the increase in j-crystal units and the development of high definition, the probe points have increased and the density has been increased, which has caused the problem of unstable electrical contact of the probe. When electrical contact is not

Pack-order

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V. Description of the invention (3) When stable ′ The inspection screen along the wiring that does not actually provide an input signal will not be displayed, so the inspection efficiency is greatly reduced. This is critical for performing automatic inspections by using image processing and so on. In addition, with the development of high-definition liquid crystal cells, the space between two probes adjacent to each other has been reduced. Therefore, the problem is not only that the stability of the inspection is reduced, but also that the manufacturing of the probe itself is reaching its limit. In addition, because the multi-probe is not suitable for various modules, it also causes cost increase and inspection efficiency decrease. Such problems are attributed to the fact that, according to the various modules of the manufactured liquid crystal cell, because of the difference in specifications between the modules, it is very difficult to standardize the probe arrangement among the various modules. Therefore, it is necessary to prepare a probe set for each module, thereby changing the probe set on the inspection system whenever a different module is inspected. For the reasons mentioned earlier, an inspection method capable of reducing the number of probes has been required, even though the inspection method can only display a limited type of inspection screen. Revealed in "> ^ 1〇61 ^ & 1 ^ 〇11 丁? 丁 -Array Testing for High-Resolution / High-Content AMLCDs" published by Society Kodate et al. On Society for lnformati〇I1 Display International Symposium in 1999 An improved method for inspecting a TFT array substrate. This inspection method includes, around the TFT array substrate, a first selection element (TFT) for selecting a signal line for measuring the amount of charge charged by the pixel, and a first selection element for storing the potential of the signal line that is not measured. Two selection elements (TFT). In addition, the inspection method is characterized in that an inspection circuit is formed, which is constructed by binding a plurality of signal lines together via the first selection elements. Since this paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) 577035 A7 _____ B7 V. Description of the invention (4) In the inspection circuit, a plurality of signal lines will be tied together via these first selection components , So you can reduce the number of probes required for inspection. Japanese Unexamined Patent Publication No. 1 (1999) -338376 has published an inspection circuit capable of reducing the number of probes required for inspection, and even performs inspection of imaging products after forming a TFT liquid crystal cell. In the inspection circuit published in Japanese Unexamined Patent Publication No. 11 (1999) -338376, the inspection TFTs for switching the supply of inspection display signals or scanning signals are individually and individually connected to a plurality of data signal lines and scanning signals. line. The inspection circuit further includes an inspection display signal line for supplying the inspection display signal to an inspection TFT connected to the data signal line, and the inspection display signal line is connected to a common respective element. At this time, the inspection circuit includes: 3 respective control signal lines according to the display color, for inputting control signals to process or turn off the inspection TFT. As described above, inspection circuits or inspection methods have been developed that can reduce the number of probes required for inspection. However, in these inspection circuits or inspection methods, an array substrate inspection circuit and a liquid crystal cell inspection circuit are formed separately and independently. SUMMARY OF THE INVENTION The object of the present invention is to provide a novel inspection circuit incorporating an array substrate inspection circuit and a unit inspection circuit. The inspection circuit can also reduce the number of probes required for inspection. The invention is a display device substrate comprising: a substrate body; pixel components arranged on a matrix of the substrate body; a plurality of signal lines' for transmitting the 彳 § number to the pixel components; and an inspection circuit , Its -8-This paper size applies Chinese National Standard (CNS) A4 specification (210X 297 mm) 577035 A7

It is formed on this substrate body. Here, the inspection circuit includes: an inspection signal input terminal for inputting a first inspection signal to all M (M is an integer greater than 1) lines of the signal lines; a plurality of first selection elements' each The first selection elements are arranged between the signal line and the check signal input terminal; the first control wiring is composed of n (multiplication) M (n is a positive integer) lines' these lines are used to connect A control signal is respectively supplied to the plurality of first selection elements; a plurality of second selection elements, each of which is connected to the signal lines respectively; check the signal wiring, which is composed of a plurality of lines' The plurality of lines are used to respectively supply a second inspection signal to the signal lines and the second control wiring via the plurality of second selection elements, which are composed of n (multiplied) M (n is a positive integer) The circuits are used to supply a control signal to the plurality of second selection elements respectively. In an inspection circuit regarding a substrate of a display device according to the present invention, a circuit for performing inspections on disconnection and short circuit of a TFT array substrate (hereinafter, such inspections are referred to as array inspections) and a circuit for A circuit for performing an image quality inspection of a liquid crystal cell (hereinafter, such inspection is referred to as a cell inspection) is integrated. In other words, when performing an array inspection, a first inspection signal of the array inspection is input from the inspection signal input terminal, and a signal line to which the first inspection signal is to be supplied is selected by the first selection element. In this case, the second selection elements can be used to maintain the potential of unselected signal lines. Conversely, when unit inspection is performed, the order supplied to the inspection signal wiring

Installation m -9- 577035 V. Description of the invention (6 70 The second inspection signals of the inspection f are supplied to the signal lines via the second selection elements. In this case, each inspection signal has a mutual In the state of the opposite polarity potential, since a plurality of lines are provided in the inspection signal wiring, these inspection signals can be supplied to adjacent signal lines. In addition, 'independent inspection signals can be supplied to adjacent signal lines, so Any color or pattern can be formed during the unit inspection. In addition, the invention provides inspection signal input terminals for all M signal lines wired in parallel. Therefore, the number of probes required for array inspection can be reduced. (Two or more lines) enough to check the signal wiring 'so the number of terminals required for this can be reduced to a very small number. / In order to obtain the results described above, the display device substrate of the present invention has the most It further includes the following structures. Specifically, the preferred mode of the present invention includes the following features: Connection check # input terminal The plurality of first selection elements are respectively connected to different lines of the first control wiring; the number of the first selection element is violated; the first selection element is connected to a line of the common first control wiring; A plurality of second selection elements of the terminals are respectively connected. Different lines of the first control wiring · A specified number of second selection elements such as the first selection TL are connected to one line of the common second control wiring; The second selection elements are respectively connected to different lines of the inspection signal wiring; and 10-: 297 mm) Binding V. Invention Description (7) M is a multiple of 6 or 6. The display device substrate according to the present invention described herein can be implemented as an array substrate of a TFT display device. In other words, the present invention provides an array soil plate with pixel elements having switching elements on a column substrate arranged in a matrix. The array substrate includes: a plurality of signal lines for transmitting a signal to the pixel components; first inspection transistors, which are respectively connected to the plurality of signal lines, and the first inspection transistors control the first inspections The input of signals to the pixel components; the first control wiring, which is composed of a plurality of lines, which are used to supply a control signal for controlling the opening and closing of the first inspection transistor; The second inspection circuit is connected to a plurality of signal lines, and the second inspection transistors control the input of the second inspection signals to the pixel components; the potential supply wiring is composed of a plurality of lines. Composition, the plurality of lines are used to supply a specified potential to the second inspection transistors; and the second control wiring is composed of a plurality of lines, which are used for supply to control The control signals for turning on and off the second inspection transistors. In the array substrate of the present invention, although the circuit portion used for the array inspection can be removed after the array inspection is completed, such a circuit portion can be kept as it is. In addition, although the inspection circuit can be removed after the unit inspection is completed, the inspection circuit can be removed. It can also be left as it is. In the array substrate of the present invention, the number of contact probes can be reduced by providing an inspection signal input terminal for each specified number of signal lines. The inspection signal input terminal is used to input the first inspection signals. To -11-577035 A7 ___ B7 V. Description of the invention (8) Deer Hai Temple first inspected the transistor. In addition, in the array substrate of the present invention, it is preferable that a plurality of first inspection transistors connected to an inspection signal input terminal are respectively connected to different lines of the first control wiring. In addition, in the array substrate of the present invention, the first control wiring is preferably provided with a specified number of M or an integer multiple of M, where 乂 is the number of signal lines connected to the inspection signal input terminal. In the array substrate of the present invention, it is preferable that a plurality of second inspection transistors connected to an inspection signal input terminal are respectively connected to different lines of the second control wiring. In addition, in the array substrate of the present invention, it is preferable that the second control wiring is provided with a specified number of M or an integral multiple of M, where "is the number of signal lines connected to the inspection < 5 input element. In addition, in In the array substrate of the present invention, it is preferable that the second inspection transistors adjacent to each other are respectively connected to different lines of the potential supply wiring. For example, the present invention provides the following inspection circuits developed on the array substrate. Specifically, The present invention provides an inspection circuit including: a first signal supply wiring for supplying a first inspection signal; a source (or a drain) of a plurality of first thin film transistors such as a plurality of first thin film transistors-4 are all Connected to the first signal supply wiring; a first control wiring composed of a plurality of lines connected to the gates of the plurality of first thin film transistors; a plurality of second thin film transistors, the second The non-electrode (or source) of the thin-film transistor is connected to the non-electrode (or source) of the plurality of first thin-film transistors; the second control wiring is connected to the A plurality of second thin film transistors -12 ·

577035 V. Description of the invention (composed of a plurality of lines of the gate of 9: and the second signal supply wiring, basin, which is connected to the source (or drain) of the plurality of second thin film transistors ㈣: 旻 several The second signal supply wiring is used to supply a second inspection signal for each specified number of second thin-film transistors. For example, the inspection circuit of the present invention can be constructed on a 117-D array substrate. In addition, the inspection circuit of the present invention may also reside in a liquid crystal cell or a liquid crystal display device including a TFT array substrate. Since the inspection circuit of the present invention includes a configuration as described above, the inspection circuit of the present invention is constructed to perform an array inspection A unified circuit for unit inspection. In the inspection circuit of the present invention, it is preferable to connect the second thin film transistors adjacent to each other to different lines of the second signal supply wiring. In the inspection circuit of the present invention, when the supply When the first inspection signal is used for array inspection, the supplied signals and potentials are as follows. Specifically, the first inspection signal will be Check that the signal is supplied to the first signal supply wiring. • Via the first control wiring, a selection potential is supplied to any one of the plurality of first thin film transistors, and a non-selective potential is supplied to A first thin-film transistor other than the first thin-film transistor; and supplying a non-selective potential to the second thin-film transistors through the second control wiring to a first thin-film that supplies a selective potential to the first thin-film transistor The second thin-film transistor of the transistor, and a selection potential is supplied to a second thin-film transistor other than the aforementioned second thin-film transistor. In addition, in the inspection circuit of the present invention, when the first inspection for the unit inspection is supplied When the number is #, the supplied signals and potentials are as follows. To be clear -13-This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 public love) 577035

DESCRIPTION OF THE INVENTION (10) In the state towel where the selection potential is supplied to all thin film transistors via the second control wiring, the second inspection signal is supplied to the ::: supply wiring. ~ It is clear from the foregoing description The present invention provides an inspection circuit including: a function for selectively supplying a common inspection signal to any one of the data signal lines of a specified number of data signal lines; and a method for transmitting two or two inspection signals to The function of supplying the specified number of data number lines separately and independently. 5 Specifically, the present invention provides an inspection circuit for supplying an inspection signal to a plurality of signal lines constructing an active matrix display device: = places The inspection circuit includes a first inspection signal supply circuit for selectively supplying a common first inspection signal to any of the h-number lines of a specified number of signal lines, and a second inspection signal supply circuit for applying A different second inspection signal is supplied to the adjacent signal lines of the specified number of signal lines. ~ In the inspection circuit of the present invention, the An inspection signal supply circuit preferably includes: an inspection signal wheel-in terminal for inputting the first inspection signal; and a switching device composed of a thin film transistor, the switching device selecting a signal from the specified number of signal lines. The first inspection signal from the first inspection signal wheel-in terminal is supplied to the signal line there. In the inspection circuit of the present invention, the second inspection signal supply circuit preferably includes a thin film transistor, etc. The thin film transistors are respectively connected to the specified number of signal lines; the inspection signal wiring is composed of the specified number of lines, and the specified number of lines are used to separately supply the second inspection signals to -14-this paper size applies China National Standard (CNS) A4 specification (2i0x297 public love) binding, invention description (11) should be to these thin film transistors; and control wiring, which consists of a specified number of lines, these specified number of lines are used For supplying control signals for controlling the opening and closing of the thin film transistors. In addition, in the inspection circuit of the present invention, although these signals The circuits can be reduced to data signal lines and scanning signal lines, but these signal lines are preferably the data number lines. If the number of data signal lines is greater than the number of scanning k lines, this applies to the application of the inspection circuit of the present invention. In the case of the data line k. For example, the present invention provides the following inspection method for the display device substrate as described above. Specifically, the present invention provides a display device substrate inspection method. The display device substrate includes: A substrate body; a pixel component which is & listed on a matrix of the 4 substrate body; a plurality of signal lines for transmitting signals to the pixel components; and an inspection circuit having an inspection signal input terminal, It is used to input a first inspection signal to such signals and all M (M 疋 greater than 1) lines of this circuit; a plurality of first selection elements, each of which is configured between the signals Between the circuit and the inspection signal input terminal; the first control wiring is composed of n (multiplication) M (n is a positive integer) lines, which are used to connect a The control signals are respectively supplied to the plurality of first selection elements; the plurality of second selection elements, each second selection element is respectively connected to the signal lines; check the signal wiring, which is composed of a plurality of lines, the The plurality of equal lines are used to separately supply the second inspection signals to the signal lines via the plurality of second selection elements such as 泫; the second control wiring is composed of n (multiplication) M (n is a positive integer) lines These circuits are used to respectively supply control signals to the plurality of fifth, invention description (12) Πΐselection elements; and an inspection circuit formed on the substrate body. Here, the inspection method includes a second inspection in the first row. In addition, the first way of performing the inspection after the inspection is as follows: when a control signal is supplied to the first selection elements through the first control wiring and the fth control wiring supplies the control signal to the first Second option: The first inspection signal is input to the inspection signal input terminal. And 'the second inspection is performed in a manner that when a "control signal is supplied to the second selection elements via the second control wiring" , The second inspection signal No. 4 is supplied to the inspection signal wiring. A inspection Γ ′ supplies the control signal to the plurality of -selection elements of the -selection elements via the first control wiring Γ: = The non-selection k number is supplied to the first selection element other than the aforementioned -selection element 1 and further 'in the -inspection' supplies the control k number to the execution of the second selection elements via the second control wiring. The method is: supplying a selection signal to the second inspection element 'the second inspection element corresponds to the first selection element where the selection signal is supplied; and supplying a selection signal to the second selection element other than the aforementioned second selection element Outer second Selection element β In addition, in the second inspection, the execution method of supplying the control signal to the second selection elements via the second control wiring is to supply a selection signal to all the second selection elements. In addition, the present invention provides a method for manufacturing a liquid crystal early 7C according to the foregoing inspection method. Specifically, the method for manufacturing a liquid crystal cell minus the present invention includes the step of forming an inspection circuit on an array substrate. Description of the invention (13) The inspection circuit has: a first signal supply wiring for supplying a first inspection number; a plurality of first thin film transistors, and the sources (or drains) of the plurality of first thin films are all Is connected to the first signal supply wiring; the first: the wiring is made up of a plurality of lines connected to the gates 2 of the plurality of first thin film transistors; the plurality of second thin film transistors, etc. The drains (or sources) of the two thin film transistors are connected to the drains (or sources) of the plurality of first Z film transistors; the second control wiring is connected to the plurality of first Z film transistors. The second thin film transistor is composed of a plurality of lines; and the second signal supply wiring is composed of a plurality of lines connected to the source (or drain) of the plurality of second thin film transistors. The second signal supply wiring is used to supply a second inspection signal to the second thin film transistors; the first-inspection step is used to supply the selection potential to the plurality of first thin film transistors via the first control wiring; When any first thin film transistor of a thin film transistor is supplied with a non-selected # potential to a first thin film transistor other than the aforementioned first thin film transistor, and a non-selected potential is supplied to the second control wiring via the When the second thin film transistor which is connected to the first thin film transistor where the selection potential is supplied and the second thin film transistor other than the aforementioned second thin film transistor is supplied with the selection potential, the first inspection signal is supplied. To the first signal supply wiring; a step of forming a unit by laminating the array substrate and a color phosphor substrate while sandwiching a liquid crystal material in between; and A second checking step for, when the selection control line via the second potential is supplied to all such second thin film transistor, the second inspection signal supplied to the second signal supply line. Simple illustration

This paper is a national standard (CNS) A4 size (210X297 mm) 577035 A7 B7 V. Description of the invention (μ) For a better understanding of the invention and its advantages, please refer to the detailed description accompanying the description of the drawings. [Fig. 1] Fig. 1 is a plan view showing a schematic construction of a liquid crystal cell according to a specific embodiment of the present invention. [Fig. 2] Fig. 2 shows a liquid crystal cell according to a specific embodiment. [Fig. 3] Fig. 3 shows a schematic diagram of a configuration of a first inspection circuit and a second inspection circuit according to a specific embodiment. [Fig. 4] Fig. 4 shows a schematic diagram of a circuit structure of a first inspection circuit according to a specific embodiment. A schematic diagram of the circuit structure of the element [FIG. 5] FIG. 5 shows a second inspection electrical diagram according to a specific embodiment. Overview of Road Structure [FIG. 6] FIG. 6 shows a diagram for explaining an array inspection operation according to a specific embodiment. [Fig. 7] Fig. 7 shows another diagram for explaining an array inspection operation according to a specific embodiment. [FIG. 8] FIG. 8 shows another diagram for explaining an array inspection operation according to a specific embodiment. 18 · This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) 577035 A7 B7

[Fig. 9] Fig. 9 is a block diagram showing the construction of an array tester used for array inspection in a specific embodiment. [Fig. 10] Fig. 10 shows a diagram for explaining a unit inspection operation according to a specific embodiment. The m in diagram π shows another diagram for explaining the unit inspection operation according to the specific embodiment. [Fig. 12] Fig. 12 is a diagram showing a waveform of a signal supplied when a unit inspection is performed according to a specific embodiment. [Fig. 13] Fig. 13 is a schematic diagram showing a modified example of the inspection circuit according to a specific embodiment. [Fig. 14] Fig. 14 is a diagram showing an example of a defect in a first inspection circuit according to a specific embodiment. Detailed Description of the Preferred Embodiments The present invention will be described below based on the preferred embodiments. FIG. 1 is a schematic diagram showing the overall construction of a liquid crystal cell according to a specific embodiment of the present invention. In FIG. 1, reference numeral 丨 indicates a liquid crystal cell, reference numeral 2 indicates a TFT array substrate, and reference numeral 3 indicates a reverse substrate arranged in a manner parallel to the TFT array substrate 2. Although not shown in the figure, the liquid crystal is filled with a sealing member and a sealing resin between the TFT array substrate 2 and the back substrate 3 • 19- V. Description of the invention (16 ★ An alignment layer is formed on the liquid-day-day unit 1 , Transfer, polarizing film, etc., and the space between the substrates is used to fix the gap between the substrates. In this specific embodiment, the reverse substrate 3 is a color filter substrate, An RGB color filter is formed thereon. An alignment layer is formed face-to-face on the respective panels of the two substrates to define the initial alignment of the liquid crystal. A sealing member is formed around the display area 6 so as to adhere the two substrates to each other. Together, and seals the liquid between the substrates. In addition, a sealing resin is formed to seal an unformed zone called a liquid crystal injection port in a previously provided sealing member, which is a process in which liquid is injected through the liquid crystal injection. It is executed after entering the substrate. The M spacer is an insulator used to define the gap between the two substrates, which is provided on one of the substrates. The transfer formed outside the display area 6 is related to conductive materials, The same electrode on the common substrate potential transferred from the terminals of the TFT array substrate 2 to the reverse substrate]. Polarizing films are separately provided on the outer panels of the two laminated substrates: It is used to control the polarized light incident on the liquid crystal cell. In FIG. 1, reference numeral 4 designates a first inspection circuit for performing an array inspection, and reference numeral 5 designates a second inspection circuit for performing a cell inspection. The circuit 4 and the second inspection circuit 5 are formed on the claw array substrate.] The reference numeral 6 indicates a display area where the display is actually performed on the liquid crystal display. The reference numeral 7 indicates a surrounding area of the display area 6. Among them, the surrounding area is combined. Connection for inputting the image display signal to the display area ㈣ driver 1C 〇 Figure 2 shows a schematic diagram of the circuit structure of the display area 6 of the TFT array substrate 2. In FIG. 2, the reference numeral η indicates a direction extending in parallel with each other This paper size applies to China National Standard (CNS) Α4 specification (210X297 public envy Τ-20- 577035 A7

5. Description of the Invention (18) As will be described later, the first inspection circuit 4 and the second inspection circuit 5 also include amorphous silicon-type TFTs as selection elements. Therefore, by adding a pattern to the mask, the first inspection circuit 4 and the second inspection circuit 5 can be formed at the same time when the TFT 14 is formed. In addition, when the $ TFT 14 is formed, the wirings and the inspection terminals of the first inspection circuit 4 and the second inspection circuit 5 may be formed at the same time. As a result, no additional processing is required for forming the first inspection circuit 4 and the second inspection circuit 5. Although the TFT array substrate 2 process is performed using a deposition process and an etching process using a photoresist, since these process processes are publicly known techniques, detailed descriptions thereof are not provided in this specification. Next, the first inspection circuit 4 and the second inspection circuit 5 will be described with reference to Figs. 3 to 5. FIG. 3 shows a diagram in which a first inspection circuit * and a second inspection circuit 5 are arranged on the TFT array substrate 2. Please note that the drawing only depicts a partial construction of the circuit, and for ease of illustration, the drawing does not depict the entire construction of the circuit. As shown in FIG. 3, a first inspection circuit 4 and a second inspection circuit 5 are formed along the periphery of the display area 6, respectively. The first inspection circuit 4 is connected to the data signal line ^ and is used to supply an inspection signal of the data signal line 12 when performing array inspection and unit inspection. The second inspection circuit 5 is connected to the scanning signal line η and is used to supply an inspection signal regarding the scanning signal line 11 when performing array inspection and cell inspection. These inspection signals are supplied to arbitrary pixels 内 in the display area 6 under the control of the first inspection circuit 4 and the second inspection circuit 5. Fig. 4 shows a schematic circuit diagram of the first inspection circuit 4, and Fig. 5 shows a schematic circuit diagram of the second inspection circuit 5. First, referring to Fig. 4, the construction of the search circuit 4 will be explained. As shown in FIG. 4, the first inspection circuit 4 is a paper standard located on the paper line above the dotted line in the national standard (CNS) A4 specification (210X297). • 22- ::: Road part 4a and located in the drawing The second circuit section below the dotted line ㈣-circuit component 4a includes: _array inspection terminal 21; _th control line 22; first control signal input terminals 24a to 24f, which are connected to respective lines of the first control wiring 22, · And the first-selection it piece 23d23f, whose ^ electrodes are connected to the first control wiring 22, respectively. /. Regarding the first circuit component 4a, the first choice corresponding to the respective lean signal lines 12a to 12f is connected between the array inspection terminal 21 and a plurality of (in this specific embodiment) data signal lines 12 Components 23 & to £ 23. In other words, the source electrodes (or drain electrodes) of the first selection elements 23a to 23f are connected to the first signal supply wiring 21a extending from the array inspection terminal 21, and the drain electrodes (or source electrodes) of the first selection elements 23a to 23f are connected To the respective data signal lines 12a to 12f. The gate electrodes of the first selection elements 23a to 23f are connected to the first control wiring 22. Specifically, the gate electrode of the first selection element 23 a is connected to the position in the first control wiring 22 where the first control signal input terminal 24 a is connected; the gate electrode of the first selection element 23 b is connected to the first control wiring 22. The position of the first control signal input terminal 24b; the gate electrode of the first selection element 23c is connected to the position of the first control wiring 22 where the first control signal input terminal 24c is connected; and the gate electrode of the first selection element 23d and the like It is connected to the first control wiring 22. Therefore, the first selection elements 23a to 23f are controlled to be turned on or off by the control signals respectively input from the first control signal input terminals 24a to 24f. Finally, the inspection signals input from the array inspection terminal 21 are input to the data signal lines 12a to 12f in accordance with the control signals input from the first control signal input terminals 24a to 24f. -23- The size of this paper is applicable to China National Standard (CNS) A4 (210 X 297 mm) 577035 A7 -------------B7 V. Description of Invention (20) " Touch- ---- _ 1 = The circuit component 4b includes the potential supply wiring 25; the potential input terminals are connected to the potential supply wiring 25 respectively; the second control wiring 1, a free-running signal input terminal 29a to 29f, which are respectively connected to The first, second, and first selection members 27a to 27f have their gate electrodes connected to the second control wiring 28, respectively. In the first circuit part 4b, the potential input terminals 26a to 26f are connected to the leads of the potential supply wiring 25 serving as the second signal supply wiring, respectively. In addition, the potential supply wiring connected to the potential input terminal 26a is connected to the source electrode (or the drain electrode) of the second selection element 27a; the potential supply wiring 25 connected to the potential input terminal 26b is connected to the second selection element. The source electrode (or drain electrode) of the 27 kn; the potential supply wiring 25 connected to the potential input terminal 26c is connected to the source electrode (or the drain electrode) of the second selection element 27c; and the second selection element 27d and the like are also Connect to potential input terminals and so on. Meanwhile, the drain electrodes (or source electrodes) of the second selection elements 27a to 27f are connected to the data signal lines 12a to 12f, respectively, and the data signal lines 12 & to are connected to the first selection elements 23a to 23f, respectively. In addition, the gate electrodes of the second selection elements 27a to 27f are connected to the second control wiring 28, and the second control signal input terminals 29a to 29f are connected to the second control wiring 28, respectively. Since the first circuit part 4b includes the construction as described above, the second selection elements 27a to 27f are controlled to be turned on or off by the control signals input from the second control signal input terminals 29a to 29f, respectively. Finally, the second selection elements 27a to 27f controlled by the control signals input from the second control signal input terminals 29a to 29f supply the t 5 tiger potentials input from the potential input terminals 26a to 26f to the respective data signal lines 12a to 12 Bu Therefore, on the single -24- This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 public love) 577035 A7

577035 V. Description of the invention (22) Also as described above, the specified number of second selection elements 27 should be connected to the common second control wiring 28. Next, the construction of the second inspection circuit 5 will be described with reference to FIG. 5. As shown in FIG. 5, the second inspection circuit 5 is composed of a first circuit component 5 a above the dotted line in the drawing and a first circuit component 5 a below the dotted line in the drawing. Composition of two circuit components. The-= way component 5a includes: an array inspection terminal 31; a _ control wiring 32; first control signal input terminals 34a to 34f connected to respective lines of the first control wiring 32; and first selection elements 33a to, The gate electrodes are connected to the first control wirings 32, respectively. Regarding the first circuit component 5a, a first selection element 33 & corresponding to the respective scanning signal line 11 is connected between the array inspection terminal 3 and a plurality of (six in this embodiment) scanning signal lines 丨 丨. To 33 {^. In other words, the source electrodes (or no electrodes) of the k-th selection elements 33a to 33f are connected to the slave array inspection terminal 31, and the drain electrodes (or source electrodes) of the first selection elements 33 & to 3 玎 are connected to the respective scan signals Lines lla to nf. The gate electrodes of the first selection elements 33 a to 33 f are connected to the first control wiring 32. Specifically, the gate electrode of the first selection 70 piece 33a is connected to the position of the first control wiring 32 connected to the first control signal input terminal 34a; the gate electrode of the first selection element 33b is connected to the first control wiring 32 The position where the first control signal input terminal 3 is connected, the gate electrode of the first selection element 33c is connected to the position where the first control signal input terminal 3 is connected in the first control wiring 32; and the first selection element 33d, etc. The gate electrode is also connected to the first control wiring 32. Therefore, the control signals input through the input terminals 34a to 34f of Yordi Control # are the paper size standard (_ M specification (Zheng Nuo Ai)) • 26. V. Description of the invention (23, Control first Check Ilf. Turn on or off the first selection elements 33a to 33f. Finally, press the control signal input terminal 34a to 34f to input the control signal, and input the inspection signal input from the scan terminal 31 to the scan signal. The lines 11a to the second circuit part 5b include a potential supply wiring 35; potential input terminals 36a to 36f, which are respectively connected to the potential supply wiring 35; a second control wiring 38; and a second control signal input terminal 39a to 39f, which Are connected to the second control wiring 38 respectively; and the gate electrodes of the second selection elements 3 to 3 are connected to the second control wiring 38 respectively. In the second circuit part 5b, the potential input terminals 36a to 36b are respectively connected to A lead connected to the potential supply wiring 35. In addition, a portion of the potential supply wiring 35 connected to the potential input terminal 36a is connected to a source electrode (or a drain electrode) of the second selection elements 3 and 37e; and connected to the potential input terminal. The part of the potential supply wiring 35 of issue seven is connected to the source electrodes (or drain electrodes) of the second selection elements 37b, 37d * 37f. At the same time, the drain electrodes (or source electrodes) of the second selection elements 37a to 37f are connected to the scanning electrodes, respectively. The signal lines 丨 u to lf, and the scanning signal lines 11a to 11f are connected to the first selection elements 33a to 33f, respectively. In addition, the gate electrodes of the second selection elements 37 & to 37 £ are connected to the second control wiring ", and to The second control signal input terminals 39a to 39f are connected to the second control wiring 38, respectively. Since the second circuit part 5b includes the structure as described above, it is inputted from the second control signal input terminals 39 & to 39f, respectively. The control signal 'controls the second selection element 37 & to 37f on or off. Finally, the paper size is controlled by the control signal input from the second control signal input terminals 39a to 39f. B Family Standard (CNS) A4 Specifications (21〇: 297 mm) -27- V. Description of the invention (24) The second selection elements 37a to 37f supply the potentials input from the potential input terminals 36 & to 3615 to the respective scanning signal lines 丨 la Lf. Therefore, the potentials supplied to the scanning signal lines Ua to Uf will be displayed according to the respective pixels 13 of the channels Ua to Uf according to the data transmission. Next, the description will be made by using as described above. The specific operation of the array inspection and the unit inspection performed by the first inspection circuit 4 and the second loose inspection circuit 5. First, the array inspection will be described with reference to FIGS. 6 to 8. In the array inspection, only during a specified time period, The specified potential will be continuously written into each pixel 13 on the TFT array substrate 2. After that, the charge is retained for a specified period of time, and then the corresponding pixel 13 is read. It is judged whether the read value is a normal value of the corresponding pixel 13. This potential is supplied to the data signal lines 12a to 12f. Therefore, in the array inspection, it is necessary to supply potentials to the respective data signal lines 12a to 2f and to the respective self-scanning signal lines 11a to 11f in an independent manner. Fig. 6 shows the operation of supplying the potential to be written to the data # 5 line 12a in the first inspection circuit 4. The specified potential as the first inspection signal is supplied to the array inspection terminal 2 1. In Fig. 6, the state of the supply potential is indicated by a thick line. In this case, the selection potential is supplied to the first control wiring 22 portion connected to the first control signal input terminal 24a, so among the first selection elements 23a to 23f, the first selection element connected to the data signal line 12a 23a is turned on. The non-selection potential is supplied to the first selection elements 23b to 23f other than the first selection element 23 &. In this case, in order to block the second selection element 27a corresponding to the first selection element 23a, that is, the second selection element 27a connected to the data signal line 12a, the non-selection potential is supplied to the paper standard applicable to the country of China Standard (CNS) A4 size (210X297 male) -28- 577035 A7

5. Description of the invention (26) Any one of the data signal lines 12a to 12f supplied from the array inspection terminal 21 to a specified number of data signal lines. At the same time, the second inspection circuit $ includes a circuit for selectively supplying a common inspection signal, wherein the common inspection signal is supplied from the array inspection terminal 31 to any one of the scanning signals of a specified number of scanning signal lines u to 11 f line. As described above, the designated potential is supplied to the data #line 12a by the first inspection circuit 4, and the designated potential is supplied to the scanning signal line 11a by the second inspection circuit 5. Then, as shown in FIG. 8, by The pixel 13 designated by the data signal line 12a and the scan signal line 11a becomes active. In FIG. 8, the active pixel 13 is painted black. The array check continuously activates the pixel 3, writes the specified potential into the pixel, and reads the charge. Specific examples will be described below. FIG. 9 shows a circuit configuration of the tester 40 for writing and reading potentials. In FIG. 9, the tester 40 includes: an integrator, which has a reset switch (Reset-SW) and a capacitor (C); a switch (sw-1); and a power source (Vd ). Regarding the tester 40, the write terminal on the switch (SW-1) side is considered to be connected to the array check terminal 21 of the first check circuit 4, and the other write terminal is considered to be connected to the AD converter (ADC). First, a 'Reset-SW' is connected to reset the integrator. In this case, the capacitor (C) is charged. Then, the switch (sw-1) is connected to the power source (Vd), whereby the potential ¥ (1 is supplied to the data signal line 12a via the array inspection terminal 21. At this time, the selection potential (Vgh) is supplied to the scanning signal line na 'As a result, the auxiliary capacitor (Cs) 18 of the pixel 13 is charged with Vd. Then, a retention potential (VgL) is supplied to the scanning signal line 丨 a ^, and then the switch • 30- V. Description of the invention (27) (SW- 1) After connecting to the integrator, the potential of the data signal line ⑵ is set to the GND level. Then, the reset switch (Reset -SW) is released. When the selection potential (Vgh) is supplied to the scan again When the signal line is 1 la, the charge in the auxiliary capacitor (Cs) 18 of the Jiansu 3 element u is transferred to the synergy of the integrator (C). In accordance with the previous description, the output potential of the integrator is reduced. Then, VgL It is supplied to the scanning signal line Ua again. After a specified period of time, the output potential of the integrator is sampled and held, and it is converted to a digital value using AD conversion (ADC). Then the number of pixels is judged from this value-when About scanning the signal line !! a and borrow f material signal line] 2 a After the inspection and measurement of the specified pixel 13 is completed, the inspection and measurement of the pixel 13 specified by the other, the signal line 11b, etc. and the other data signal lines ⑵, etc. are continuously performed. After the array inspection is completed, the -circuit component 4 recognizes the -circuit component 5 & becomes redundant. Therefore, after the array inspection is completed, the first circuit component 4a can be removed by cutting along the dotted lines shown in Figs. 4 and 5. And the first circuit component 53. Of course, the circuit component 4 " and the first circuit component 5a can also be guaranteed. As far as the first circuit component 4a and the first circuit component 5a are retained, the liquid crystal cell i will be held on the array substrate 2. Process to form the first circuit component such as and 5a and the second circuit component Pak Wo Wai. The following outlines this process. First, the TFT array substrate 2 and the reverse substrate 3 are laminated, while the liquid crystal material is sandwiched. In the middle, it is known that the sealing member is used for the lamination process. When the liquid crystal cell is obtained, the cell inspection is performed by using the second circuit parts 4b and 55. Next, a description will be given of a method according to the present embodiment. Meta inspection 'that is' specific to image quality inspection 577035 A7 ----- B7 V. Description of the invention ~~-Contents. The image quality inspection method of the liquid crystal cell i according to this embodiment will be described. The specific implementation In the example, an example is shown in which the entire screen is displayed in yellow. As shown in FIG. 10, in the first inspection circuit 4, the second inspection signals (potentials) labeled D (Bui to D㈣) are respectively supplied to the data signals. The heart of the line. D (j + 1) and D (j + 4) are potentials supplied to the red ⑻ pixel 13 · d and D (j + 5) are potentials supplied to the green (G) pixel 13; and D (j + 3) And D (j + 6) 疋 are supplied to the potential of the blue (B) pixel 13. That is, different inspection signals are supplied to the adjacent data signal line 12. Such potentials are supplied from the potential input terminals 26 & 26f, respectively. As a necessary condition for supplying the potentials 0 (b1) to 0 (b6) to the data signal line 12 & to i2f, the selection potential is supplied to the second control signal input terminals 29a to 29f, thereby turning on the second selection element 27a As shown in FIG. 11 to 27f, in the second inspection circuit 5, inspection signals labeled G (k + 1) to G (k + 6) are supplied to the scanning signal lines na to uf, respectively. As a necessary condition for the inspection signals G (k + 丨) to G (k + 6) supplied to the scanning signal lines 1 ia to 丨 丨 f, a selection potential is supplied to the second control signal input terminals 39a to 39f. Two selection elements 37a to 37f. Fig. 12 shows an example of the inspection driving waveforms supplied to the first inspection circuit 4 and the second inspection circuit 5 in this embodiment. These examples show cases driven by pixel inversion (inverted picture), showing the entire screen in yellow. Figure 12 shows only the part to be supplied with a check mark. In fact, a signal exactly the same as ^ shown in the drawing is continuously input to the liquid crystal cell 1. In Fig. 12, the horizontal axis indicates the time axis. The time ranges T (l), T (2), and T (3) all indicate a frame -32- The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) V. Description of the invention (29) ( frame), and the time range D (1) is different from the strictness and j of the time range, and the phases of the signals D (j + 1) and D (j + 6) are opposite to each other. Although the ranges T⑴ and T (2) are set to one cycle at a time, as long as the Z-plane is displayed, these signals will be repeatedly and continuously input to the LCD unit. -Other driving examples include column inversion driving, row inversion driving, and so on. If you modify the input signal, you can easily receive these necessary drivers. In addition, by providing the input signal voltage variable, you can implement any level of display. In addition, since R, 0, and 3 signals can be input independently in this example, two colors can be displayed continuously. In FIG. 12, when the inspection signals G (k + i) and G (k + 2) are supplied to the scanning signal lines 11a and lib, the time-sharing processing is performed according to the time period. In the time range U τ (υ, the The inspection signal potentials D (j + 1) to D (j + 4) supplied to the potential input terminals 26a to 26d are supplied to the pixels 13 corresponding to the respective data signal lines 12 / to 1. After that, the inspection signal potential is retained for a period During this time, the inspection signals G (k +!) And G (k + 2) are supplied to the scanning signal lines 11a to 11b until the time period T (2). As shown in FIG. 12, it is provided in the time range τ (2) The polarity of the potential waveform is inversely opposite to the polarity of the potential waveform provided in the time range τ (1): At the same time, the polarity of the potential provided in the time range T (3) is the same as that of the potential provided in the time range D (1). As shown in FIG. 12, since D (j + 1) 'D (j + 2) and D (j + 4) have small amplitudes, the pixels 13 corresponding to R and G appear bright. Because 〇 (Bu 3); ^, so the pixel 13 corresponding to B appears dark display. Therefore, the entire display area 6 will be displayed using monochrome yellow. Check, by using the time-scale of the present paper material as described above 297_ -33-577035

In this method, a very small number of signal input terminals can be used to display a display pattern required for inspection, so that stable and low-cost inspection can be achieved. After performing the unit inspection as described above, the driver IC and the driving circuit for generating a control signal to be input to the driver ic are connected to the liquid crystal unit 1, and the backlight and mechanical components are mounted to complete the liquid crystal module in this manner. When driving the final product, the TFTs for inspection are turned off, that is, the first selection elements 23a to 23f and 33a to 33f, and the second selection elements 27a to 27f and 37a to 37. The foregoing purpose is to bind inputs when performing inspections separately and safely. In this embodiment, as shown in FIG. 13, a driver IC connection pad 50 may be further disposed between the first selection elements 23a to 23f and the potential supply wiring 25, respectively. In this case, the first circuit component 乜 is removed. Notwithstanding the foregoing description, in this specific embodiment, the first inspection circuit 4 and the first inspection circuit 5 including the first circuit component 乜 may be retained until the finished product. In this case, the driver 1C connection pad 50 is disposed outside the first control wiring 22. As described above, since the specific embodiment includes the inspection circuit constructed as described above, signals required for the array inspection and the cell inspection can be input to the liquid crystal cell 1 without using multiple probes, thereby enabling Efficient inspection becomes feasible. In addition, since the first inspection circuit 4 and the first inspection circuit 5 according to the present embodiment integrate the circuits for the array inspection and the circuits for the unit inspection ', it is possible to reduce the area occupied by the TFT array substrate 2 by these circuits. . In terms of providing the array inspection circuit and the unit inspection circuit independently, a total of 3 columns of selection element groups are required, that is, 2 columns of selection element groups for the array inspection circuit 'and 1 column of selection element groups for the cell inspection circuit. . However, according to this embodiment, it is used for array inspection and cell inspection.

5. The circuit of the invention description (31) can be constructed by a total of 2 columns of selection groups. In addition, the conventional array circuit is not regarded as an area outside the remaining area of the liquid crystal cell. According to this embodiment, almost half of the circuit can be formed in the remaining area of the liquid crystal cell 1. For example, the available area of the mother glass for the TFT array substrate 2 can be expanded. In the specific embodiment, the integration of the array inspection circuit and the unit inspection circuit also has an advantage. The defect of the unit inspection circuit can be detected during the array inspection. For example, as shown in FIG. 14, when the first inspection circuit 4 If there is a short-circuit defect between the source and the non-electrode of the second selection element 2_7b (marked as 制 in the drawing), such defects should be detected during the array inspection. The short-circuit cannot be seen during the unit inspection. However, when a liquid crystal display device is completed, a short-circuit defect may constitute a defect (line defect). Therefore, it is necessary to «this kind of defect in advance., When an array inspection is performed, a holding potential (Vh () ld) is supplied to the potential supply wiring η, If there is a change in Vhod and the read value shows a similar change, it can be found that there is a short-circuit defect between the source and the drain. In addition, as shown in FIG. M, for example, when it is between the open electrode of the second selection element W When there is a short circuit defect (marked as ⑻ in the drawing) between the electrode and the electrode, such defects can be detected during the array inspection. However, when the liquid crystal display device is completed, the short circuit defect will constitute a U product defect (circuit Defects). The short-circuit defect was discovered by Benefit Method during the unit inspection. However, because this defect is a correctable defect in the addition of array bases, finding such defects during array inspection can prevent product defects. That is, If the non-selection potential for controlling the second selection element 27c is read during the array inspection, it can be found that

Short circuit defect. Open circuit P "Not shown in Fig. 14. For example, when there is: = (marked as 图 中 in the drawing) on the second selection element 27d, this defect will not be a problem when the array inspection is completed. It is necessary to detect such defects in advance, because the unit cell II will constitute a defect. That is, when the array inspection is performed, if Vhold cannot be read when the P ~ to -th selection element 27d is selected, then It can be found that in the specific embodiment, the inspection circuit system according to the present invention is formed using the scanning 2 line U and the data signal line 12. However, the-= line according to the present invention can also be used for the scanning signal line and the data signal. Either of the lines "• The line is provided and the inspection signal is input to other line groups via a conventional multi-pin probe. For example, a multi-pin probe may be connected instead of the second inspection circuit 5. Since the number of pixels in the row direction is generally larger than the number of pixels in the column direction, the inspection circuit according to the present invention is very suitable for the data signal line 12. In addition, the number of input terminals can be increased or decreased according to the type of display or driving conditions. Specifically, in this embodiment, although two sets (potential input terminals 26a to 26f and second control signal input terminals 29a to 29f) of the connection terminals are connected to the data signal line 12, by increasing the number of connection terminals, Finer block display is possible.

Conversely, it can be understood that the number of input terminals is decreased. For example, in the case where only a full-screen color display inspection is performed as an image quality inspection, the inspection circuit located on the surface of the scanning signal line 11 is provided with only one common source terminal. In the inspection circuit located on the scanning wiring surface, only the ruler and G -36 are formed. This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm)

Binding Warm V. Description of the invention (33) ^ B Common source terminal of pixel 13 'Each terminal is for each color. By using these inspection batteries to control the voltage supply, at least full-color full-screen display can be implemented. In addition, according to this specific embodiment, by using the first inspection circuit 4, an electrodeposition film can be formed on the TFT array substrate 2. The electrodeposited film can be used as a color light plate. For example, in FIG. 4, the selection potential is supplied to the second control wiring 28 portion for controlling the second selection elements 27a to 27f corresponding to any one of the colors of RG and B, and the specified potential is provided To the potential supply wiring 25 m connected to some of the second selection elements 27a to 27f, if all the scanning signal lines i 1 for controlling the pixels 13 are set to the selection potential, the potential Ve will be supplied to All pixel electrodes of the selected color. In other words, a color light-transmitting plate of a desired color may be formed on a pixel electrode located inside the electrodeposition tank. Finally, R and GW color calender plates can be formed on the TFT array substrate 2 by repeating the process described above for one-man's same color change. Note that it is preferable to supply a potential equal to the potential of the opposite electrode inside the electrodeposition tank to the portion corresponding to the potential supply wiring 25 of the non-selected color. In addition, the inspection circuit of the present invention is applicable not only to the liquid crystal cell 1 but also to a display device using other active elements, or to a liquid crystal display device without using a color phosphor plate. Examples of other display devices include a self-luminous display that uses an active matrix polymer light-emitting diode (AM-PLED) that controls light emission by operating a voltage to be supplied to an organic film containing an active element, Organic light emitting diode (ΑΜ_〇 [Εϋ) and so on. As mentioned above, according to the present invention, the present invention discloses a novel inspection circuit for integrating the array inspection circuit 577035 A7 B7 5. Invention Description (34) Circuit and unit inspection circuit, these inspection circuits can also reduce the inspection The number of probes required. Although the preferred embodiments of the present invention have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the scope of the appended patents. -38- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

Scope of patent application 'A substrate for a display device, the substrate comprising: a substrate body; pixel components arranged on a matrix of the substrate body; a plurality of signal lines for transmitting signals to the pixel components; And 'an inspection circuit formed on the substrate body; The inspection circuit includes: an inspection signal input terminal for inputting a first inspection signal to each of M (M is an integer greater than) lines of the signal lines; a plurality of first selection elements, each The first selection elements are all arranged between the line ^ and the inspection signal input terminal; the first control wiring is composed of η (multiplication) M (n is a positive integer) lines. Supplying a control signal to the plurality of first selection elements respectively; A8 B8 C8 D8 A plurality of second selection elements, each second selection element is respectively connected to the signal lines; check the signal wiring, which is composed of a plurality of lines, which are used to pass through the A plurality of second selection elements respectively supply a second inspection signal to the signal lines; and a second control wiring 'which is composed of n (multiplication) M (n is a positive integer) lines, and the other lines are used for A control signal is respectively supplied to the plurality of second selection elements. 2. If the display device substrate of item 1 of the scope of patent application, the plurality of first selection elements connected to a check k input terminal are connected to the _____- 39- This paper size applies to China National Standard (CNS) A4 Specifications (210X297 public directors) 6. Scope of patent application A8 B8 3. 4. 5. 6. Different lines of control wiring. Such as the application of the patent scope of the first chapter of the display device's board of the member 'of which the first selection of the specified number of the first selection element ^ Lidi-the selection element is connected to the first control wiring a common line . For example, in the scope of the patent application, for the signal input terminal, "Seibo", "Beibei Device Substrate", where a plurality of second selection elements are connected and inspected, a plurality of second selection elements are respectively connected to different lines of the first control wiring. For example, the display device substrate of item 4 in the range of the patent application, in which the second selection element of the second selection 7L is connected to a common line of the second control wiring. For example, please refer to the display device substrate of the first item of the patent scope, in which the second selection elements are connected to different lines of the inspection signal wiring. 7. For the display device substrate of item i in the scope of patent application, wherein the secret is any value of a multiple of 6 and 6. 8. An array substrate on which pixel components including switching elements are arranged in a matrix, the array substrate including: a plurality of signal lines for transmitting signals to the pixel components; a first inspection transistor , Which are respectively connected to the plurality of signal lines, and the first inspection transistors control the input of the first inspection signals to the pixel components; a first control wiring, which is composed of a plurality of lines, such that The plurality of lines are used to supply control signals for controlling the opening and closing of the first inspection transistors; -40-This paper size is suitable for financial standards (CNS) A4 specification (210 X Norwegian public love) To apply for a patent, check the transistors, which are connected to these multiple signal lines, respectively. The first inspection transistor, such as Hai, controls the input of the second inspection pixel components; like the potential supply wiring, which is composed of a plurality of lines, the plural lines are used to supply the designated f bits to the A second inspection transistor; and a second control wiring composed of a plurality of lines for supplying a control signal for controlling the opening and closing of the second inspection transistor. 9. The array substrate according to item 8 of the scope of patent application, wherein each specified number of these signal line configurations_inspection signal input terminals are used to input the first inspection signals to the first inspection transistors. • The array substrate of No. 8 in the patent application of Shenzhen, in which the inspection transistors connected to an inspection signal input terminal are respectively connected to different lines of the first control wiring. U. If the array substrate of the scope of patent application No. 9, wherein the-control wiring is provided with the specified number or any number of integer multiples of the specified number of lines, the amount of wire is connected to the inspection signal input terminal The number of such " ίLu lines. 12. As in the "Patent Application", the array panel of 8 items, in which the second inspection transistors connected to the inspection part number input terminals are respectively connected to different lines of the second control wiring. Item of the array substrate, wherein the second control wiring is provided with the specified number or any number of the multiple of the specified number of -41-X 297 mm) 7 paper size suitable financial ss home materials (CNS applied for patent scope lines 'The far specified number is the number of these signal lines connected to the inspection signal input terminal. 14. As for the array substrate of the scope of patent application item 8, wherein the adjacent second inspection transistors are connected to the potential supply wiring, respectively. 15 · —A kind of inspection circuit, including: a first h-number supply wiring for supplying a first inspection signal; a plurality of first thin film transistors, a source of the plurality of first thin film transistors (or (Drain) are connected to the first signal supply wiring; a first control wiring is formed by a plurality of bars connected to respective gates of the plurality of first thin film transistors Circuit; second thin-film transistors, the drains (or sources) of the second thin-film transistors are all connected to the respective drains (or sources) of the plurality of first thin-film transistors; Two control wirings, which are composed of a plurality of lines connected to the respective gates of the plurality of second thin power crystals; and a second signal supply wiring, which is composed of a plurality of second thin films The second signal supply wiring supplies a second inspection signal to each of a specified number of these second thin-film transistors. For example, the inspection circuit of the scope of patent application No. 15, in which a specified number of the second thin film transistors are connected to a common line of the second signal supply wiring. Inspection circuit, where the first inspection signal is supplied to the first -42- 577035 A8 B8 C8 in the following states 4 Lu supply wiring: through the first control wiring, a selection potential is supplied to any of the first thin film transistors of the plurality of first thin film transistors, and a non-selected potential is supplied to The first thin-film transistor other than the first thin-film transistor; and a non-selective potential is connected to the second thin-film transistor through the second control wiring. The second thin film transistor of the third thin film transistor there is supplied with the selection transistor to the second thin film transistor except the non-selective potential has been supplied to the second thin film transistor there. 1 8. The inspection circuit according to item 17 of the scope of patent application, wherein the second inspection signal is supplied to the second thin film transistor in a state where a selection potential is supplied to all of the second thin film transistors through the second control wiring. Signal supply wiring ^ ~ 19. A kind of inspection circuit for supplying inspection signals to a plurality of lines 彳 § of the dynamic matrix display name, the inspection circuit includes: a first inspection signal supply circuit for applying a common The first inspection signal is selectively supplied to any of the signal lines of the specified number of signal lines and a first inspection signal supply circuit for supplying a different second inspection signal to the adjacent signals of the specified number of signal lines line. 2．If the inspection circuit of item 19 of the patent application is applied for, the first inspection signal supply circuit includes:-an inspection signal input terminal 'for inputting the-inspection signal; and a switching device, which is made of a thin film The switching device consists of a transistor Order • 43- Patent application The signal line of the specified number is selected to be a signal line to which the first inspection signal input from the first inspection L 5 tiger input terminal is supplied. σ A 21 · If the inspection circuit of item 19 of the patent application scope, wherein the second inspection signal supply circuit includes: B thin film transistors, the thin film transistors are respectively connected to the specified number of signal lines; inspection signal wiring, which Is composed of a specified number of lines, and the index lines are used to separately supply the second inspection signals to the thin film transistors; and control wiring, which is composed of the specified number of lines, the Equal-number circuits are used to supply control signals used to control the thin-film transistors and turn them off. Open 22. If the inspection circuit of the 19th in the scope of patent application, the signal lines are data signal lines. 23. An inspection method for a display device substrate, the substrate including a substrate body; pixel components arranged on a matrix of the substrate body; a plurality of signal lines for transmitting signals to the substrates A pixel component; and an inspection circuit including an inspection signal input terminal for inputting a first inspection signal to each of M (m is an integer greater than 1) lines of a signal line such as 泫; a plurality of A first selection element, each of which is disposed between the signal line and the check signal input terminal; a first control wiring, which is composed of η (multiplication) M (n is a positive integer) lines The AB c D 577035 lines are used to respectively supply a control signal to the plurality of first selection elements, and the plurality of second selection elements, each of which is connected to the signal lines; The inspection signal wiring is composed of a plurality of lines for supplying a second inspection signal to the signal lines via the plurality of second selection elements, respectively. A second control wiring, which is composed of n (multiplication) M (n is a positive integer) lines for supplying control signals to the plurality of second selection elements, respectively; and an inspection circuit, which Formed on the substrate body; wherein the inspection method includes a first inspection step; and a second inspection performed after the first inspection, the first inspection step includes, when a control signal is transmitted through the first control wiring A step of inputting the first inspection # number to the inspection signal input terminal when supplying to the first selection element and supplying a control signal to the second selection element via the second control wiring; and the second The inspection step includes the step of supplying the second inspection number to the inspection signal wiring when a control signal is supplied to the second selection elements via the second control wiring. I. 24. If the inspection method of the 23rd scope of the patent application is applied, the second step: In the inspection step, the execution method of the first-selection element via the first-control wiring is ... will-nr :: etc. The signal of the first-selection element is supplied to the first-selection element other than the first-selection element of the first-selection element; and in the first inspection step of the first selection element, Di Yi ,, by the second control wiring of the Hai Hai, the control smart scale standard fits the SS Home Standard (CNS) 577035 A8 B8 C8 No. is supplied to the second selection element ^ ^ σ. ^ The vanadium method is to supply a non-selection bluff to the second selection element, and the technical / difficult / first selection file corresponds to the 、 Select signal is supplied to one of the places-^ ^ ^ ^ Select element; and supply one option 4 5 tigers to the first place except to send the non-prohibited product to the first place. The second selection elements other than the k selection element. A The inspection method according to item 23 of the scope of patent application, wherein in the second inspection step, the control signal is supplied to the 7L pieces via the second control wiring. The execution method is' Supply_selection signal to All such second selection elements. 26 · A method for manufacturing a liquid crystal cell, comprising: a step of forming an inspection circuit on an array substrate, the inspection circuit comprising: a first signal supply wiring for supplying a first inspection signal; Crystals, the source (or drain) of the plurality of first thin-film transistors are connected to the first signal supply wiring; the first control wiring is formed by connecting to the plurality of first thin-film transistors A plurality of lines of respective gates; a plurality of second thin-film transistors, and the drain (or source) of the second thin-film transistors are all connected to the respective first thin-film transistors Drain (or source); a second control wiring composed of a plurality of lines connected to respective gates of the plurality of second thin film transistors; and a second signal supply wiring composed of a connection The second signal supply wiring is used to supply a second inspection signal to the first source (or drain) of the plurality of second thin-film transistors. Thin film transistor; -46- This paper size is in accordance with Chinese National Standard (CNS) A4 specification (210 X 297 mm) 577035 A8 B8 C8 ________D8___ Six applications for patent scope The first inspection step is used when the first control wiring A selective potential is supplied to any one of the plurality of first thin film transistors and a non-selective potential is supplied to a first thin film other than the first thin film transistors of the first thin film transistors A transistor, and when a non-selective potential is supplied via the second control wiring to the second thin-film transistor connected to the first thin-film transistor that supplies a select potential thereto and a select potential is supplied to When the non-selective potential reaches the second thin-film transistor other than the second thin-film transistor there, the first inspection signal is supplied to the first signal supply wiring; a step of forming a unit 'the unit includes the array A substrate, a color filter substrate laminated on the array substrate, and a liquid crystal material sandwiched between the array substrate and the color filter substrate; and A second inspection step 'is for supplying a second inspection signal to the second signal supply wiring when a selection potential is supplied to all of the second thin film transistors via the second control wiring. -47- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)