KR20110063045A - Liquid crystal display with scanner and driving method of the same - Google Patents

Abstract

PURPOSE: A liquid crystal display with a scanner and a driving method of the same are provided to reduce the number of a readout line by allowing a plurality of pixels to share one readout line. CONSTITUTION: In a liquid crystal display with a scanner and a driving method of the same, a plurality of first gate lines(110) and a plurality of second gate lines(111) are crossed with each other. A plurality of data line(120) and a plurality of readout line are alternately arranged with each other in the cross direction of a first gate line or a second gate line. A display transistor(Td) is formed at the crossing of the data lines and first or second gate lines. A switching transistor(Ts) is formed on the crossing a readout lien and first or the second gate line. The switching transistor is connected to one of the first gate lines.

Description

LCD built-in LCD and its driving method {LIQUID CRYSTAL DISPLAY WITH SCANNER and DRIVING METHOD OF THE SAME}

The present invention relates to a scanner-embedded liquid crystal display device and a driving method thereof, and more particularly, to a scanner-embedded liquid crystal display device and a method of driving the same which can reduce manufacturing costs and improve yield.

In recent years, as the information age has entered, the display field for visually expressing electrical information signals has been rapidly developed, and various flat panel display devices having excellent performance of thinning, light weight, and low power consumption have been developed. Flat Display Device has been developed to quickly replace the existing Cathode Ray Tube (CRT).

Specific examples of such a flat panel display device include a liquid crystal display device (LCD), a plasma display panel device (PDP), a field emission display device (FED), and an electroluminescent display device. Electro luminescence Display Device (ELD) and Electro-Wetting Display (EWD). Such flat panel displays essentially include a display panel that implements an image by bonding a pair of insulating substrates to each other with a unique light emitting or polarizing material layer interposed therebetween.

Among them, the liquid crystal display device displays an image by using the light transmittance of the liquid crystal that is adjusted according to the electric field, and has the advantages of miniaturization, thinning, and low power consumption, and is used for notebook computers, office automation devices, and audio / video devices. It is widely used.

1 is an equivalent circuit diagram illustrating a liquid crystal panel of a general liquid crystal display device.

A general liquid crystal display device includes a liquid crystal panel for displaying an image and a driving circuit portion for driving the liquid crystal panel. Among them, the liquid crystal panel includes a spacer for maintaining a constant cell gap between the thin film transistor array substrate and the color filter array substrate, the thin film transistor array substrate, and the color filter array substrate. A liquid crystal layer filled between the thin film transistor array substrate and the color filter array substrate is formed to form a pixel array including a plurality of pixels.

As illustrated in FIG. 1, each of the plurality of pixels is arranged to cross each other to define a pixel area, a plurality of gate lines GL, a plurality of data lines DL, a gate line GL, and a data line DL. The thin film transistor T and the liquid crystal capacitor Clc connected to the thin film transistor T are formed in the crossing region.

Herein, the liquid crystal capacitor Clc refers to the capacitance of the liquid crystal layer corresponding to the pixel region. The thin film transistor T is turned on and off according to the gate signal applied through the gate line GL, and when turned on, the thin film transistor T outputs the data signal applied through the data line DL to one end of the liquid crystal capacitor Clc. At this time, while a predetermined charge is charged in the liquid crystal capacitor Clc, an electric field is formed in the liquid crystal layer corresponding to the liquid crystal capacitor Clc, and the direction of the liquid crystal cell provided in the liquid crystal layer is adjusted by such an electric field, so that the light transmittance is increased. Adjusted. In this manner, the liquid crystal display device displays an image by adjusting the light transmittance of each of the plurality of pixels.

On the other hand, liquid crystal display devices tend to be developed to perform functions other than an image display function. In particular, a function of a scanner is added by adding a light sensing array for sensing light to a pixel array for displaying an image. An embedded liquid crystal display device with a scanner has been proposed.

2 is an equivalent circuit diagram of a liquid crystal panel of a scanner-embedded liquid crystal display device according to the prior art.

The liquid crystal panel provided in the scanner-embedded liquid crystal display device according to the related art forms a pixel array to which a light sensing array is added. Each of the pixels included in the pixel array is divided into a display area for image display and a sensing area for light sensing.

That is, as illustrated in FIG. 2, each of the plurality of pixels includes a plurality of gate lines GL, a plurality of data lines DL, a gate line GL, and a data line that are arranged to cross each other so that the pixel region is defined. A plurality of first transistors T1 formed in a region where DL intersects, a plurality of liquid crystal capacitors Clc connected to the plurality of first transistors T1, and a plurality of gate lines GL, respectively. A plurality of second transistors formed in a region in which a plurality of readout lines RL and gate lines GL and the readout line RL intersect and are alternately arranged in parallel with each other; And a sensing capacitor Csc respectively connected to the T2 and the plurality of second transistors T2.

The descriptions of the plurality of gate lines GL, the plurality of data lines DL, the first transistor T1, and the liquid crystal capacitor Clc are the same as those of the general liquid crystal display device described with reference to FIG. The description will be omitted.

The sensing capacitor Csc stores an optical voltage corresponding to the amount of light incident from the outside. In this case, the photovoltage is a voltage that the sensing thin film transistor (not shown) disposed in the sensing region outputs to the sensing capacitor Csc in response to the amount of light incident from the outside.

The second transistor T2 is turned on and off in response to a gate signal applied through the gate line GL, and when turned on, the second transistor T2 applies an optical voltage stored in the sensing capacitor Csc to the readout line RL.

The conventional scanner-embedded liquid crystal display device configured as described above includes a plurality of pixel arrays each including a display area and a sensing area, and may be driven in a screen display mode or a scanner mode.

However, in the conventional scanner-embedded liquid crystal display device, as illustrated in FIG. 2, one gate line GL is disposed corresponding to pixels arranged in one row (horizontal row), and one column (vertical row). One data line DL and one readout line RL are disposed corresponding to the pixels disposed in the. That is, as the number of vertical lines increases in the pixel array, the number of data lines DL and readout lines RL increases. In particular, when the scanner-embedded liquid crystal display device is provided with a resolution of WXGA (Wide eXtended Graphics Array, 1366 x 768) or more, the vertical line of the pixel array becomes 768 x (R + G + B), and the readout (RL) is proportional thereto. ) And the number of readout driving integrated circuits (hereinafter referred to as "RL-IC") for driving the readout RL are increased. Since the RL-IC needs to recognize each of the photo voltages applied to the plurality of readouts RL, the RL-IC is relatively more complicated than the gate driving integrated circuit driving the gate line GL (hereinafter, referred to as "GL-IC"). , Sensitive, and expensive. Therefore, the conventional scanner-embedded liquid crystal display device has a problem in that as the resolution is higher, the number of RL-ICs increases in proportion to the increased number of readouts RL, resulting in a very high manufacturing cost.

In addition, an integrated circuit (IC) for driving the gate line GL, the data line DL, and the readout line RL is mounted on a tape carrier package (TCP) or a substrate. However, since the RL-IC is complicated and sensitive, and is likely to be defective by the IC mounting process, as the number of RL-ICs to be mounted increases, it is possible to predict a decrease in yield of the scanner-embedded liquid crystal display device. Therefore, the conventional scanner-embedded liquid crystal display device has a problem that the higher the resolution, the number of RL-ICs increases in proportion to the increased number of read-outs RL, thereby decreasing the yield.

Accordingly, the present invention provides a scanner-embedded liquid crystal display device and a method of driving the same, which can reduce manufacturing cost and improve yield.

In order to solve such a problem, the present invention provides a plurality of first gate lines and a plurality of second gate lines that are alternately disposed; A plurality of data lines and a plurality of lead-out lines disposed alternately with each other in a direction crossing the plurality of first gate lines or the plurality of second gate lines such that a plurality of pixels are defined; A display transistor formed in an area where the first gate line or the second gate line and the data line cross each other; And a switching transistor formed at an area where the first gate line or the second gate line and the lead-out line cross each other. In this case, the pixels arranged in the first column and the second column adjacent to each other with one lead-out line among the plurality of pixels include the switching transistors connected to the one lead-out line.

In addition, the present invention provides a method of driving a scanner-embedded liquid crystal display device in a scanner mode, wherein the scanner-embedded liquid crystal display device includes a first group of pixels arranged in one row and connected to a first gate line; A second group of pixels disposed in a row of the second gate line and connected to a second gate line alternated with the first gate line, and applying a gate signal to the first gate line to provide an optical voltage of the pixel of the first group Recognizing each; And applying a gate signal to the second gate line to recognize optical voltages of the second group of pixels, respectively.

As described above, according to the present invention, a plurality of pixels arranged in two adjacent columns with one lead-out line therebetween share one lead-out line, so that the number of necessary lead-out lines corresponding to the plurality of pixels is increased. Can be reduced. Accordingly, the number of lead-out driving integrated circuits driving the lead-out line may be reduced in proportion to the reduced lead-out line. In addition, a plurality of pixels arranged in two adjacent columns with one data line therebetween share one data line, so that the number of necessary data lines corresponding to the plurality of pixels may be reduced. Therefore, the number of read-out driving integrated circuits and data driving integrated circuits driving the data lines can be reduced, so that manufacturing costs can be reduced, and the yield rate can be improved by lowering the defective rate, and in particular, high resolution scanner-embedded liquid crystals. It can be usefully applied to the display device.

Hereinafter, a scanner-embedded liquid crystal display device and a driving method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

According to an embodiment of the present invention, a scanner-embedded liquid crystal display device includes a liquid crystal panel for displaying an image, a backlight unit for irradiating light to the liquid crystal panel, and a driving circuit unit for driving the liquid crystal panel.

Here, the liquid crystal panel includes a thin film transistor array substrate (hereinafter referred to as a TFT substrate), a color filter array substrate (hereinafter referred to as a “CF substrate”), and a TFT substrate facing each other. And a liquid crystal layer filled between the TFT substrate and the CF substrate and a spacer for maintaining a constant cell gap between the substrate and the CF substrate, and corresponding to any one of R (Red), G (Green), and B (Blue). To form the pixel. In this case, one unit pixel may be defined by a combination of R, G, and B pixels. Each of the plurality of pixels is divided into a display area for displaying an image and a sensing area for sensing light, and are actually provided as a combination of a display array and a light sensing array.

3 is a plan view illustrating pixels of a scanner-embedded liquid crystal display device according to an exemplary embodiment of the present invention.

As illustrated in FIG. 3, the pixel 100 includes alternately arranged pixel regions including the first gate line 110 and the second gate line 111, the display region P, and the sensing region S. FIG. Data lines 120 disposed in a direction crossing the first gate line 110 and the second gate line 111 so as to be defined, in a direction crossing the first gate line 110 and the second gate line 111. Corresponds to the lead-out line 130 alternately arranged with the data line 120, the display transistor Td and the display area P formed in an area where the first gate line 110 and the data line 120 cross each other. And a pixel electrode (not shown) arranged to be connected to the drain electrode of the display transistor Td, a common electrode (not shown) corresponding to the display area P and disposed to face or alternately face the pixel electrode (not shown), The phototransistor Tp and the phototransistor Tp disposed in the sensing area and configured to sense light to output an optical voltage are firstly provided. The first driving voltage supply line 140 for applying the same voltage, the sensor storage capacitor (Cst) for storing the optical voltage output from the phototransistor (Tp), the sensor storage capacitor (Cst) is connected to the phototransistor (Tp) The sensor storage capacitor Cst is formed in an area where the second driving voltage supply line 141 and the second gate line 111 and the readout line 130 cross each other to apply a second driving voltage different from the first driving voltage. It is configured to include a switching transistor (Ts) connected to.

Here, the display transistor Td is turned on and off by the first gate signal applied through the first gate line 110, and when turned on, the display transistor Td receives the data signal applied through the data line 120. ) When the display transistor Td is turned on and the data signal is applied, the pixel electrode (not shown) forms an electric field in the liquid crystal layer corresponding to the pixel region P together with the common electrode (not shown) to which the common voltage is applied. The light transmittance of the pixel is adjusted. In this case, a storage capacitor (not shown) is formed in an overlapping region between the first gate line 110 and the pixel electrode (not shown) or the common electrode (not shown), so that the liquid crystal layer even after the display transistor Td is turned off. It allows the electric field formed in the to be maintained.

The phototransistor Tp outputs an optical voltage corresponding to the amount of incident light according to the image placed on the liquid crystal panel. For example, the phototransistor Tp may be a device that outputs a high optical voltage in response to a high brightness image and outputs a low optical voltage in response to a low brightness image.

The sensor storage capacitor Cst is generated in an overlapping region between the lower electrode connected to the second driving voltage supply line 141 and the upper electrode connected to the source electrode of the switching transistor Ts, and is output from the phototransistor Tp. Save the voltage.

The switching transistor Ts is turned on and off by the second gate signal applied through the second gate line 111, and when turned on, the switching transistor Ts applies the optical voltage stored in the sensor storage capacitor Cst to the readout line 130. do.

Meanwhile, the driving circuit unit may include a gate driving integrated circuit applying respective gate signals to the first gate line 110 and the second gate line 111, a data driving integrated circuit applying a data signal to the data line 120, and The readout line 130 may include a readout driving integrated circuit configured to receive a signal applied to the readout line 130 and sense the amount of light sensed by the phototransistor Tp. In this case, the gate driver integrated circuit sequentially applies the gate signal to the first gate line or the second gate line, while the data driver integrated circuit is a circuit that applies each data signal to the plurality of data lines 120. The out driving integrated circuit is a circuit that recognizes each of the optical voltages applied to the plurality of lead out lines 130. That is, the data driver integrated circuit and the lead-out driver integrated circuit are relatively complicated, sensitive, and have a high price compared to the gate driver integrated circuit. In addition, a defect is likely to occur due to a process of mounting a tape carrier package (TCP) or a substrate.

Accordingly, an embodiment of the present invention allows the pixels arranged in two adjacent columns to share the data line 120 with the data line 120 interposed therebetween, and the two adjacent lines with the readout line 130 interposed therebetween. A plurality of pixels are arranged such that the pixels arranged in the column share the readout line 130. In this way, since the number of data lines 120 and the number of lead-out lines 130 corresponding to the plurality of pixels can be reduced, the number of data driver integrated circuits and the number of lead-out driver integrated circuits can be reduced. . In this case, in order to distinguish between pixels sharing the data line 120 or the readout line 130, the pixels arranged in one row are divided and connected to two gate lines.

4 is a block diagram illustrating a plurality of pixels of a scanner-embedded liquid crystal display according to an exemplary embodiment of the present invention. 5 shows waveforms of gate signals corresponding to one frame according to an embodiment of the present invention.

FIG. 4 exemplarily shows only a part (a 3x4 matrix) of a plurality of pixels according to an exemplary embodiment of the present invention, and briefly illustrates only components necessary for describing a pixel arrangement.

As illustrated in FIG. 4, a plurality of gate lines defining a plurality of pixels are divided into a first group and a second group, and gate lines of the first group and gate lines of the second group are alternately disposed. For example, the gate lines of the first group may be disposed in odd rows (or even rows), and the gate lines of the second group may be disposed in even rows (or odd rows). For ease of explanation, the gate lines of the first group are disposed odd-numbered in FIG. 4, respectively, and are disposed on the upper side of the pixel. The gate lines of the second group are arranged even-numbered in FIG. 4 to be positioned below the pixel (GLeven (1), GLeven (2), GLeven (3), hereinafter even-numbered gates). Line).

As shown in FIG. 4, a first pixel (1,1), a fifth pixel (2,1), and a ninth pixel (3,1) disposed in a first column, and a second pixel disposed in a second column ( 1,2, and the sixth pixel 2,2 and the tenth pixel 3,2 are disposed adjacent to each other with the first lead-out line RL (1) therebetween, and the first lead-out line ( RL (1)).

That is, the first odd gate line GLodd (1) and the first even gate line GLeven (1) are disposed in a first row, and are adjacent to each other with the first lead-out line RL (1) therebetween. The first pixels 1 and 1 and the second pixels 1 and 2 positioned in such a manner include switching transistors Ts connected to the first lead-out line RL (1), respectively. In this case, the switching transistor Ts of the first pixel 1 and 1 is disposed at the intersection of the first odd gate line GLodd (1) and the first lead-out line RL (1) and the second pixel. The switching transistor Ts of (1, 2) is disposed at the intersection of the first even gate line GLeven (1) and the first lead-out line RL (1).

The second odd-numbered gate lines GLodd (2) and the second even-numbered gate lines GLeven (2) are disposed in a second row and adjacent to each other with the first lead-out line RL (1) therebetween. The fifth and sixth pixels 2 and 1 and 2 and 2 that are positioned so as to include switching transistors Ts connected to the first lead-out line RL (1), respectively. In this case, the switching transistor Ts of the fifth pixel 2 and 1 is disposed at the intersection of the second even gate line GLeven (2) and the first readout line RL (1), and the sixth pixel. The switching transistor Ts of (2, 2) is disposed at the intersection of the second odd gate line GLodd (2) and the first lead-out line RL (1).

The third odd gate line GLodd (3) and the third even gate line GLeven (3) are disposed in a third row, and are adjacent to each other with the first lead-out line RL (1) therebetween. The ninth pixel 3, 1 and the tenth pixel 3, 2 positioned so as to include a switching transistor Ts connected to the first lead-out line RL (1), respectively. In this case, the switching transistor Ts of the ninth pixel 3 and 1 is connected to the intersection of the third odd gate line GLodd (3) and the first lead-out line RL (1). The switching transistor Ts of the tenth pixel 3 and 2 is disposed at the intersection of the third even gate line GLeven (3) and the first lead-out line RL (1).

Pixels (third pixels (1,3)) arranged in the second column (second pixels (1,2), sixth pixels (2,2), and tenth pixels (3,2)) and pixels arranged in the third column The seventh pixels 2 and 3 and the eleventh pixels 3 and 3 are disposed adjacent to each other with the second data line DL (2) interposed therebetween, and the second data line DL (2). Share it.

In more detail, the second pixel (1,2) and the third pixel (1,3) arranged in the first row, the sixth pixel (2,2) and the seventh pixel (2) arranged in the second row 3) and the tenth pixel (3,2) and the eleventh pixel (3,3) arranged in the third row includes a display transistor (Td) connected to the second data line DL (2), respectively. That is, the display transistor Td of the second pixels 1 and 2 is disposed at the intersection of the first odd gate line GLodd (1) and the second data line DL (2), and the third pixel ( The display transistors Td of 1 and 3 are disposed at the intersection of the first even gate line GLeven (1) and the second data line DL (2). The display transistor Td of the sixth pixel 2 and 2 is disposed at the intersection of the second even gate line GLeven (2) and the second data line DL (2). The display transistor Td of 3) is disposed at the intersection of the second odd gate line GLodd (2) and the second data line DL (2). The display transistor Td of the tenth pixel 3 and 2 is disposed at the intersection of the third odd gate line GLodd (3) and the second data line DL (2). The display transistor Td of 3) is disposed at the intersection of the third even gate line GLeven (3) and the second data line DL (2).

Like the pixels in the first and second columns disposed adjacent to each other with the first lead-out line RL (1) therebetween and sharing the first lead-out line RL (1), the second lead-out line ( Pixels in the third column (third pixel (1,3), seventh pixel (2,3), and eleventh pixel (3,3)) and fourth column of pixels arranged adjacently with RL (2) interposed therebetween (Fourth pixels 1 and 4, eighth pixels 2 and 4, and twelfth pixels 3 and 4 share a second lead-out line RL (2) disposed therebetween.

That is, the third pixel (1,3) and the fourth pixel (1,4) arranged in the first row, the seventh pixel (2,3) and the eighth pixel (2,4) arranged in the second row and The eleventh pixels 3 and 3 and the twelfth pixels 3 and 4 arranged in the third row each include a switching transistor Ts connected to the second lead-out line RL (2).

As described above, pixels disposed in two adjacent columns with one data line DL interposed therebetween correspond to one data line DL disposed therebetween. The pixels arranged in two adjacent columns with one lead-out line RL interposed therebetween correspond to one lead-out line RL disposed therebetween. Instead, the pixels arranged in one row correspond to two gate lines GLodd and GLeven. In order to drive the plurality of pixels arranged as described above, as illustrated in FIG. 5, all of the first group of gate lines GLodd (1) to GLodd (n) and the second group of gate lines during one frame. The gate signals should be sequentially applied to GLeven (1) to GLeven (n). That is, one frame is divided into a period corresponding to the first group and a period corresponding to the second group.

For example, when driving the pixels arranged in the first column in the scanner mode, applying a gate signal to the first odd gate line GLodd (1), and applying the gate signal to the first even gate line GLeven (1). And applying a gate signal. Here, in the step of applying the gate signal to the odd gate line GLodd (1), by outputting the optical voltages applied to the plurality of read-out lines RL (1) to RL (m), odd gate lines ( The optical voltages of some pixels connected to the switching transistor Ts to the GLodd 1 are respectively recognized. In the step of applying the gate signal to the even gate line GLeven (1), by outputting the optical voltages applied to the plurality of read out lines RL (1) to RL (m), the even gate lines ( The light voltages of some pixels connected to the switching transistor Ts to GLeven (1) are respectively recognized.

Similarly, when driving the pixels arranged in the first column in the screen display mode, applying a gate signal to the first odd gate line GLodd (1) and the first even gate line GLeven (1). And applying a gate signal to the. That is, in the step of applying the gate signal to the odd gate line GLodd (1), each data signal is applied to the plurality of data lines DL (1) to DL (m), and the odd gate line GLodd ( Some pixels connected to 1)) are driven. In the step of applying the gate signal to the even gate line GLeven (1), each data signal is applied to the plurality of data lines DL (1) to DL (m), and the odd gate line GLeven (1) is applied. Some pixels connected to 1)) are driven.

As described above, according to the exemplary embodiment of the present invention, the pixels disposed in two columns adjacent to one data line DL each include a display transistor Td connected to one data line DL. The pixels arranged in two columns adjacent to one lead out line RL each include a switching transistor Ts connected to one lead out line RL disposed therebetween. Instead, pixels arranged in one row correspond to two gate lines GLodd and GLeven. In this case, the number of gate driving integrated circuits driving the gate lines GLodd and GLeven should be increased, whereas the lead-out driving the data driving integrated circuits driving the data lines DL and the lead-out line RL are required. The number of drive integrated circuits can be reduced by up to half. Accordingly, the manufacturing cost of the scanner-embedded liquid crystal display device can be reduced, and the yield can be improved. In particular, in the case of a high-resolution scanner-embedded liquid crystal display device, even if it includes a plurality of pixels arranged in a large number of columns, the number of gate lines and lead-out lines does not increase in proportion to this, and therefore, manufacturing cost and yield improvement are expected. Can be.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and various substitutions, modifications, and changes may be made without departing from the technical spirit of the present invention.

1 is an equivalent circuit diagram illustrating a liquid crystal panel of a general liquid crystal display device.

2 is an equivalent circuit diagram of a liquid crystal panel of a scanner-embedded liquid crystal display device according to the prior art.

3 is a plan view illustrating pixels of a scanner-embedded liquid crystal display device according to an exemplary embodiment of the present invention.

4 is a block diagram illustrating a plurality of pixels of a scanner-embedded liquid crystal display according to an exemplary embodiment of the present invention.

5 shows waveforms of gate signals corresponding to one frame according to an embodiment of the present invention.

<Description of identification numbers for the main parts of the drawings>

100: pixel 110: first gate line

111: second gate line 120: data line

130: lead-out line Td: display transistor

Ts: switching transistor Tp: phototransistor

Cst: sensor storage capacitor

GLodd: Gate group of the first group (odd gate line)

GLeven: Gate Group of Second Group (Even Gate Line)

DL: data line RL: lead-out line

Claims (8)

A plurality of first gate lines and a plurality of second gate lines disposed alternately with each other; A plurality of data lines and a plurality of lead-out lines alternately arranged in a direction crossing the plurality of first gate lines or the plurality of second gate lines such that a plurality of pixels are defined; A display transistor formed in an area where the first gate line or the second gate line and the data line cross each other; And A switching transistor formed in an area where the first gate line or the second gate line and the lead-out line cross each other; The pixels arranged in the first and second columns adjacent to each other with one lead-out line among the plurality of pixels include the switching transistors connected to the one lead-out line, respectively. Device. The method of claim 1, The switching transistor included in the first pixel disposed in the first column is connected to one first gate line, The switching transistor included in a second pixel adjacent to the first pixel and disposed in the second column is connected to one second gate line alternated with the one first gate line; . The method of claim 2, Pixels arranged in the second and third columns adjacent to each other with one data line among the plurality of pixels include the display transistors connected to the one data line, respectively. . The method of claim 3, wherein The display transistor included in the second pixel is connected to the one second gate line. And the display transistor included in a third pixel adjacent to the second pixel and arranged in the third column is connected to the one first gate line. 5. The method of claim 4, A phototransistor outputting an optical voltage corresponding to incident light; And And a sensor storage capacitor connected to the phototransistor and the switching transistor and storing the optical voltage. The method of claim 5, A first driving voltage supply line disposed in the same direction as the gate line and applying a first driving voltage to the phototransistor; And And a second driving voltage supply line disposed in the same direction as the gate line and applying a second driving voltage different from the first driving voltage to the phototransistor. In the method of driving the scanner built-in liquid crystal display in scanner mode, The scanner-embedded liquid crystal display device includes a first group of pixels disposed in one row and connected to a first gate line, and a second gate line disposed in the one row and connected to the second gate line alternated to the first gate line. Including 2 groups of pixels, Applying a gate signal to the first gate line to recognize photo voltages of the pixels of the first group; And And applying a gate signal to the second gate line to recognize optical voltages of the second group of pixels, respectively. The method of claim 7, wherein In the method for driving the scanner built-in liquid crystal display device in a display mode, Applying a gate signal to the first gate line and applying a respective data signal to the pixels of the first group; And And applying a data signal to the second group of pixels by applying a gate signal to the second gate line.

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