JP2002229056A - Electrode substrate for display device and its inspection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lower the manufacture cost of an electrode substrate for a liquid crystal device, which is used for a p-Si type TFT-LCD by performing high- precision OS inspection, without causing increase in the area of a row electrode driving circuit or the facility investment amount and decreasing defective substrates moving into cell process. SOLUTION: End parts of row electrodes G1, G2,..., Gm, which are not connected to a row electrode driving circuit 15, are connected to wires 101 on an array substrate, and the wires 101 are connected to a probing pad 102a. For inspection, a current flowing on the basis of the potential difference between a voltage applied from an array tester 110 to the wires 101 and voltages applied from the row electrode driving circuit 15 to the row electrodes G1, G2,..., Gm is measured to inspect whether the row electrodes G1, G2,..., Gm are defective electrically.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode substrate for a display device and a method for inspecting the same, and more particularly, to a display device used for a liquid crystal display device in which a switching element and a drive circuit are formed on a glass substrate by p-si TFTs. The present invention relates to an electrode substrate and an inspection method thereof.

[0002]

2. Description of the Related Art Generally, a liquid crystal display device is used as a display element of a television, a portable information terminal, a graphic display or the like because of its light weight, thinness and low power consumption. In particular, an active matrix type liquid crystal display device (hereinafter, TFT-LCD) using a thin film transistor (hereinafter, TFT) as a switching element has excellent high-speed response and is suitable for high definition. Attention has been focused on realizing large-sized, large-sized, and color images.

FIG. 4 is a circuit diagram of an array substrate used in a conventional general TFT-LCD. On the array substrate 10, scanning row electrodes G1, G2,... Gm (hereinafter collectively referred to as G) and image signal column electrodes D1, D2,. , D) are formed, and a TFT 11 as a switching element is provided at each intersection of the row electrode G and the column electrode D. The drain of the TFT 11 is connected to the pixel electrode 12.
And an auxiliary capacitor 13 electrically connected to the pixel electrode 12. Each auxiliary capacity 13
Are commonly connected to the auxiliary capacitance electrode 14 and given a predetermined potential. Although FIG. 4 shows the array substrate before assembling as a liquid crystal panel, it is not shown in the figure. Is formed, and a liquid crystal layer is sandwiched between the two substrates.

One end of each of the row electrodes G1, G2,... Gm is connected to a row electrode driving circuit 15 and the column electrodes D1, D2,.
One ends of Dn and Dn are connected to the column electrode drive circuit 16, respectively. Row electrode drive circuit 15, column electrode drive circuit 16
Various timing signals, video signals, power supply voltages, and the like are supplied to the auxiliary capacitance electrode 14 from an external drive circuit board (not shown) through an input / output terminal group (hereinafter, probing pad) 17.

In a liquid crystal panel constituted by using the array substrate 10, a row electrode driving circuit 15
When a selection signal synchronized with the horizontal scanning cycle is applied to 1, G2,... Gm in order from the top to the bottom of the figure, the TFT 11 is turned on at the timing when the selection signal from the row electrode G is applied. Becomes When a signal voltage corresponding to the image signal is applied to the column electrodes D1, D2,... Dn-1, Dn from the column electrode driving circuit 16 in synchronization with this, a signal corresponding to the image signal from the column electrode D is generated. Voltage is pixel electrode 1
2 given. For this reason, a voltage corresponding to the difference between the signal voltage applied to the pixel electrode 12 and the counter voltage given to the counter electrode (not shown) is applied to the liquid crystal layer (not shown) sandwiched between the two substrates. In this case, the liquid crystal layer performs an optical response in accordance with the magnitude of the voltage at this time, and display is performed.

The above description shows an example in which each drive circuit of the row electrode and the column electrode is built in an array substrate (glass substrate). It is called a (crystal silicon) type TFT-LCD. On the other hand, a device using a-Si (amorphous silicon) as a semiconductor material is called an a-Si type TFT-LCD. FIG. 5 is a circuit configuration diagram of an array substrate used in a general a-Si type TFT-LCD, and portions that are the same as those in FIG. 4 are denoted by the same reference numerals. Since a-Si has inferior transistor characteristics as compared with p-Si and cannot reduce the size of a TFT, it is difficult to incorporate a drive circuit on an array substrate. Therefore, a-Si type TFT-L
The array substrate of the CD is composed of only the pixel portion, and the drive circuit is formed as a driver IC on an external drive circuit substrate (not shown). The connection between the drive circuit and the array substrate 20 is established by connecting the probing pads 18 and 19 formed on the array substrate 20 to TAB (Tape Automated).
Bonding).

In the a-Si type TFT-LCD, since the row electrodes and the column electrodes on the array substrate 20 are directly drawn to the probing pads 18 and 19, the number and pitch of the probing pads 18 and 19 are determined by the row electrodes and the pitch. This is equivalent to the number and pitch of the column electrodes. On the other hand, p-Si type TFT
In the LCD, since the row electrodes and the column electrodes are directly driven by a drive circuit built in on the array substrate 10, only signals and power supply voltages to the built-in drive circuit are drawn to the probing pad 17, The number is about one digit smaller than the number of row electrodes and column electrodes. Therefore, the pitch of the probing pads 17 can be increased to ensure connection reliability, and the accuracy of the prober can be reduced accordingly, so that there is an advantage that a capital investment amount can be reduced.

[0008] The difference between such probing pads is that
Inspection during the array process also makes a difference. In the a-Si type TFT-LCD, when a row electrode is formed during an array process, an open (disconnection) / short (short circuit) inspection (hereinafter, referred to as an OS inspection) is performed. Referring to FIG. 5, a probe of an array tester is applied to a probing pad 19 formed at one end of the row electrode G and a probing pad arranged at the other end (not shown), and a predetermined voltage is applied. This is an inspection to measure the current that flows. At this time, if the row electrode G is formed normally, a predetermined current obtained from the applied voltage and the resistance of the row electrode is observed. If the row electrode G is open, no current flows, so that an open failure can be detected. Also,
At the time of this inspection, the row electrodes G are applied to the column electrodes D and the auxiliary capacitance electrodes 14.
If a voltage different from the above is applied, an abnormal current flows when the row electrode G is short-circuited with them, so that a short-circuit failure can be detected.

[0009]

On the other hand, in the p-Si type TFT-LCD, there is no probing pad for applying a probe to one end of the row electrode G, so that the above-described OS inspection cannot be performed. . For this reason, at the end of the array process, it is necessary to input or output some signal from the probing pad 17 shown in FIG. 4, and to inspect the pixel portion via the driving circuit. Inspection through such a driving circuit has a poor S / N ratio, so that a p-Si type TFT is used.
-LCD has a lower detection rate of open / short defect of the row electrode than a-Si type TFT-LCD. As a result, the defective array substrate often flows into the subsequent cell process, and there is a problem that unnecessary manufacturing costs are generated in the cell process.

By the way, O-type TFT-LCD requires O
To perform the S test, probing pads are required at both ends of the row electrode G. However, when the probing pads are arranged between the row electrode G and the row electrode drive circuit 15, the The area is increased, and the compactness of the display module as a product is impaired. Further, even if the probing pads can be arranged compactly, the pitch is the same as the pitch of the row electrodes, so that a high-precision a-Si prober is required, and the merit that the capital investment amount can be reduced is impaired. I will be.

An object of the present invention is to enable high-precision OS inspection without increasing the area of a row electrode driving circuit and the amount of capital investment, and to reduce the flow of defective array substrates into a cell process. An object of the present invention is to provide a display device electrode substrate and a method for inspecting the same, which can reduce the manufacturing cost.

[0012]

In order to achieve the above object, according to the present invention, a plurality of pixel electrodes connected to respective intersections of a plurality of row electrodes and a plurality of column electrodes via switching elements are provided. In a display device electrode substrate having a drive circuit for driving these pixel electrodes through the row electrodes and the column electrodes, end portions of the plurality of row electrodes that are not connected to the drive circuit are formed on the substrate. The semiconductor device is connected to a wiring, and the wiring is connected to at least one of an input / output terminal group with an external circuit.

According to a second aspect of the present invention, in the first aspect, the ends of the plurality of row electrodes and the wiring are connected via a resistor.

According to a third aspect of the present invention, in the first aspect, the ends of the plurality of row electrodes and the wiring are connected via a transistor.

According to a fourth aspect of the present invention, in the first aspect, ends of the plurality of row electrodes and the wiring are connected via a diode.

According to a fifth aspect of the present invention, in the fourth aspect, the diode is a protection diode for the row electrode.

According to another aspect of the present invention, there is provided an electronic apparatus comprising:
The invention according to claims 1 to 5, wherein a potential difference is generated between the row electrode and the wiring, and an electric conduction state of the row electrode is inspected by measuring a current flowing at that time. Features.

According to a seventh aspect of the present invention, in the sixth aspect, the type of the electrical conduction state is specified based on a current value observed according to the potential of the row electrode, the column electrode, and the wiring. It is characterized by.

According to an eighth aspect of the present invention, in the sixth aspect, an auxiliary capacitance electrode for applying a predetermined voltage to an auxiliary capacitance electrically connected in parallel with the row electrode, the column electrode, the wiring, and the pixel electrode. The type of the electrical conduction state is specified based on the current value observed according to the potential of the electric current.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an electrode substrate for a display device and a method of inspecting the same according to the present invention will be described with reference to a liquid crystal display (TFT).
An embodiment when applied to an electrode substrate for (LCD) will be described.

[Embodiment 1] FIG. 1 shows a TF of Embodiment 1
FIG. 5 is a circuit configuration diagram of an array substrate used for a T-LCD, in which parts equivalent to those in FIG.
Some symbols are omitted).

In the array substrate 100 of the first embodiment,
The ends of the row electrodes G1, G2,... Gm that are not connected to the row electrode drive circuit 15 are commonly connected to the wiring 101 on the array substrate, and the wiring 101 on the array substrate is further connected to one of the probing pads 102. (Reference numeral 102a)
It is connected to the.

Next, the case where the OS inspection of the row electrodes G is performed on the array substrate 100 configured as described above will be described. The array tester 110 used for OS inspection includes:
Signal source / voltage source 1 for supplying various signals and voltages for testing
In addition to 03, it is configured by an ammeter 104 and a voltage source 105 which are connected especially for the OS inspection of the row electrode G. The probe (not shown) of the array tester 110 is connected to the probing pad 102 of the array substrate 100, and the probing pad 102a is connected to the probe from the ammeter 104 and the voltage source 105. Note that the specifications (size, interval, number, etc.) of the probing pads 102 are the same as those in the related art, and one of the probing pads 102a is used.

At the time of OS inspection of the row electrode G, a predetermined voltage is applied from the array tester 110 to the wiring 101 on the array substrate via the probing pad 102a,
A predetermined voltage is applied from the row electrode drive circuit 15 to the row electrodes G1, G2,. When a different voltage is applied to the array substrate wiring 101 and the row electrode G, a current flows due to the potential difference. By measuring the current at this time,
The electrical continuity of the row electrodes G1, G2,... Gm can be inspected. That is, the wiring 1 on the array substrate is
01, a resistance value of the row electrode G and a current value (hereinafter referred to as a normal value) determined by a voltage applied thereto are calculated in advance, and an actual measured value is compared with a normal value to open or close the row electrode G. It is possible to detect whether there is a short circuit between the row electrode G and the column electrode D (or the auxiliary capacitance electrode 14), and whether there is a defect such as an abnormal output voltage of the row electrode drive circuit 15. When measuring the current value, the row electrode drive circuit 15 sends the row electrode G
By sequentially applying a predetermined voltage to 1, G2,... Gm and recording the current value for each row electrode, it is possible to determine the presence or absence of a defect for each row electrode.

In the above-mentioned OS inspection, the row electrodes G1 and G
2, between the Gm and the row electrode drive circuit 15, for example,
It is not necessary to dispose the probing pad 19 as described above, so that the area of the row electrode drive circuit 15 does not increase and the compactness of the display module can be maintained. Further, since the probe is applied to a probing pad of the same standard as the conventional one, a high-precision a-Si prober is not required, and the merit of reducing the capital investment can be utilized. Therefore, a highly accurate OS inspection can be performed without increasing the area of the row electrode drive circuit or the amount of capital investment.

After the OS test, a short circuit between the row electrodes can be prevented by cutting off a portion of the array substrate 100 corresponding to the wiring 101 on the array substrate.
Alternatively, as shown in the partial circuit diagram of FIG. 2A, a resistor 106 is connected between the row electrodes G1, G2,.
01 can prevent a short circuit between row electrodes. Further, as shown in the partial circuit diagram of FIG.
A transistor 107 is connected between the row electrodes G1, G2,... Gm and the wiring 101 on the array substrate.
May be turned on, and the rest may be turned off. In this case, since the S / N ratio is improved as compared with the case where the resistor 106 is connected as shown in FIG. 2A, a sufficient current can be secured at the time of inspection, and between the row electrodes after inspection. Short circuit prevention can be more reliably performed.

[Embodiment 2] FIG. 3 shows a TF according to Embodiment 2.
FIG. 5 is a circuit configuration diagram of an array substrate used for a T-LCD, in which parts equivalent to those in FIG.
Some symbols are omitted).

In the array substrate 200 of the second embodiment,
A pair of diodes 2 is provided at each end of the row electrodes G1, G2,... Gm which is not connected to the row electrode drive circuit 15.
01 and 202 are connected. The pair of diodes 201 and 202 are connected so as to be in different current directions.
3 and the diode 202 is connected to the wiring 204 on the array substrate.
Connected to each other. These diodes 20
Reference numerals 1 and 202 denote protection diodes for protecting the row electrodes G from static electricity generated during the manufacturing process of the array substrate.

Here, the operation of the protection diode will be briefly described. A voltage higher than a normal row electrode potential is applied to the array substrate wiring 203, and a voltage lower than a normal row electrode potential is applied to the array substrate wiring 204. At this time, when the potential of the row electrode G is normal, both diodes are turned off, and no current flows. Here, a case where an abnormal voltage is generated in the row electrode G due to static electricity is considered. If the potential of the row electrode G becomes higher than the normal potential, the diode 201 turns on and the row electrode G
A current flows between the wiring 203 and the wiring 203 on the array substrate. This current continues to flow until the potential of the row electrode G gradually returns to normal and becomes lower than the potential of the wiring 203 on the array substrate. Conversely, when the potential of the row electrode G becomes lower than the normal potential, the diode 202 is turned on, and a current flows between the row electrode G and the wiring 204 on the array substrate. This current causes the potential of the row electrode G to gradually return to normal, and
4 until the potential becomes higher than the potential of 4. in this way,
An abnormal voltage generated at the row electrode G is released to the outside through the wiring on the array substrate, thereby protecting the row electrode G from being damaged by static electricity. This protection diode is used particularly for a substrate on which a semiconductor circuit such as a TFT is formed.
No. 338, for example.

The present invention can be applied to a substrate provided with the above-described protection diode. For this reason, in the array substrate 200 of the second embodiment, the diode 2
The wiring 203 on the array substrate connected to 01 is connected to one of the probing pads 205 (reference numeral 205a), and the wiring 204 on the array substrate to the diode 202 is connected to the other one of the probing pads 205 (reference numeral 205b). Have been. Also in the second embodiment, the standard of the probing pad 205 is the same as the conventional one, and the probing pads 205a and 205b
It is one that uses one.

Next, the case where the OS inspection of the row electrodes G is performed on the array substrate 200 configured as described above will be described. The array tester 210 used for OS inspection includes:
Signal source / voltage source 2 for supplying various signals and voltages for testing
11 and ammeters 212 and 213 and voltage sources 214 and 215 connected for OS inspection of the row electrode G. The probe (not shown) of the array tester 210 is connected to the probing pad 205 of the array substrate 200.
And the probing pad 20
Probes from ammeters 212 and 213 and voltage sources 214 and 215 are connected to 5a and 205b.

When inspecting the OS of the row electrode G, one of the wirings 203 and 204 on the array substrate is used.
When the on-array substrate wiring 203 is used, the potential of the on-array substrate wiring 203 is made lower than the normal potential of the row electrode G from the array tester 210 via the probing pad 205a. At the same time, the row electrode G
A voltage higher than the wiring 203 on the array substrate is applied to 1, G2,... Gm. As a result, the diode 201 is turned on, and a current path from the row electrode drive circuit 15 to the wiring 203 on the array substrate is secured. That is, a current flows due to the potential difference between the row electrode G and the wiring 203 on the array substrate. By measuring the current at this time, the row electrode G is opened, and the row electrode G and the column electrode D (or the auxiliary capacitance electrode 14) are connected. , And the presence or absence of a defect such as an abnormal output voltage of the row electrode drive circuit 15 can be detected.
On the other hand, when the wiring 204 on the array substrate is used, the potential of the wiring 204 on the array substrate is made higher than the normal potential of the row electrode G from the array tester 210 via the probing pad 205b. At the same time, a lower voltage is applied from the row electrode drive circuit 15 to the row electrodes G1, G2,. Thereby, the diode 202
Is turned on, and a current path from the row electrode drive circuit 15 to the wiring 204 on the array substrate is secured, so that a similar inspection can be performed.

At the time of this OS inspection, the wiring 2 on the array substrate
By setting the potentials applied to the electrodes 03, 204, the column electrodes D, and the row electrodes G in a predetermined relationship, it is possible to identify whether the wiring is open or various short circuits. For example, the set potential is as shown in Table 1.

[0034]

Table 1 Wiring / electrode Setting potential Wiring on array substrate 203 10V Wiring on array substrate 204 10V Column electrode D 0V Row electrode G 5V At this time, the diode 202 connected to the wiring 204 on the array substrate is turned on. When the row electrode G is normal and there is no open or short circuit with the column electrode D, the potential of the row electrode G is 5 V and the potential of the array substrate wiring 204 is 10 V.
A potential difference of 5 V occurs between V and a normal value current determined by the resistance value of the row electrode G and the voltage applied thereto is observed.

On the other hand, when the row electrode G is open, there is no path for the current to flow, so that the observed current is almost 0 [A]. In addition, when the row electrode G and the column electrode D are short-circuited, the potential of the row electrode G drops from 5 V in the normal state and approaches 0 V. As a result, the potential difference between the row electrode G and the wiring 204 on the array substrate increases,
The observed current value is larger than the normal value. This is summarized in Table 2.

[0036]

[Table 2] Normal / Abnormal (mode) Observed current Row electrode normal Normal value Row electrode open Current value ≒ 0 Column electrode-Row electrode shorted Wiring and column on array substrate as if current was excessively larger than normal value By setting the potentials applied to the electrodes and the row electrodes in a predetermined relationship, not only the presence / absence of a defect but also the type of the defect can be specified, so that the defect analysis can be performed more efficiently. Such setting of the potential can also be applied to the first embodiment. In addition, the row electrode G, the column electrode D, the wiring 2 on the array substrate,
03 or 204, by applying a predetermined potential to the auxiliary capacitance electrode 14, an abnormal current flows when the row electrode G and the auxiliary capacitance electrode 14 are short-circuited. The presence or absence of a short circuit with the capacitor electrode 14 can be inspected.

Also in the second embodiment, when inspecting the array substrate provided with the protection diodes, the row electrodes G1, G
Since there is no need to arrange a probing pad between the Gm and the row electrode driving circuit 15,
Of the display module can be maintained without increasing the area of the display module. Further, since the probe is applied to a probing pad of the same standard as the conventional one, a high-precision a-Si prober is not required, and the merit of reducing the capital investment can be utilized. Therefore, it is possible to perform a highly accurate OS inspection without increasing the area of the row electrode drive circuit and the amount of capital investment.

Although the second embodiment has shown the case where the present invention is applied to an array substrate provided with a protection diode, as shown in the partial circuit diagram of FIG.
Instead of connecting a resistor or a transistor between Gm and the wiring on the array substrate, a diode may be connected.
The connection direction of the diode may be a forward direction as viewed from the row electrode drive circuit 15 or a reverse direction. The inspection method is the same as that of the second embodiment. That is, when the connection is made in the forward direction, the potential of the wiring on the array substrate is set lower than the potential of the normal row electrode G.
A test is performed by applying a voltage higher than that of the wiring on the array substrate to G2,... Gm to turn on the diode, and securing a current path from the row electrode drive circuit 15 to the wiring on the array substrate. When the connection is made in the opposite direction, the potential of the wiring on the array substrate is set higher than the potential of the normal row electrode G, and the row electrode driving circuit 15 supplies the row electrodes G1, G2,. The inspection is performed by applying a low voltage to turn on the diode and securing a current path from the row electrode drive circuit 15 to the wiring on the array substrate. Also in this case, as compared with the case where the resistor 106 is connected as shown in FIG. 2A, it is possible to secure the current at the time of the inspection and to more reliably prevent the short circuit between the row electrodes after the inspection.

[0039]

As described above, according to the present invention,
Without increasing the area and capital investment of the row electrode drive circuit,
Since a highly accurate OS inspection can be performed on the p-Si type TFT-LCD, it is possible to reduce the flow of the defective array substrate into the cell process and reduce the manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of an array substrate used for a TFT-LCD according to a first embodiment.

2A is a partial circuit diagram when a resistor is connected between a row electrode and a wiring on an array substrate, and FIG. 2B is a partial circuit diagram when a transistor is connected between a row electrode and a wiring on an array substrate. Partial circuit diagram.

FIG. 3 is a circuit configuration diagram of an array substrate used in a TFT-LCD according to a second embodiment.

FIG. 4 is a circuit configuration diagram of an array substrate used in a conventional general TFT-LCD.

FIG. 5 is a circuit configuration diagram of an array substrate used in a general a-Si type TFT-LCD.

[Explanation of symbols]

11 TFT, 12 pixel electrode, 13 auxiliary capacitance, 14
... Auxiliary capacitance electrode, 15 ... Row electrode drive circuit, 16 ... Column electrode drive circuit, 100, 200 ... Array substrate, 101, 20
3, 204: wiring on array substrate, 102, 205: probing pad, 110, 210: array tester, 10
6: resistor, 107: transistor, 201, 202: diode

Claims (8)

[Claims] A plurality of pixel electrodes connected to respective intersections of a plurality of row electrodes and a plurality of column electrodes via switching elements; and a driving circuit for driving the pixel electrodes through the row electrodes and the column electrodes. Wherein the ends of the plurality of row electrodes that are not connected to the drive circuit are connected to wiring formed on the substrate, and the wiring is an input / output terminal group for an external circuit. An electrode substrate for a display device, wherein the electrode substrate is connected to at least one of the electrodes. 2. The display device electrode substrate according to claim 1, wherein ends of the plurality of row electrodes and the wiring are connected via a resistor. 3. The display device electrode substrate according to claim 1, wherein ends of the plurality of row electrodes and the wiring are connected via a transistor. 4. The electrode substrate for a display device according to claim 1, wherein ends of the plurality of row electrodes and the wiring are connected via a diode. 5. The electrode substrate according to claim 4, wherein the diode is a protection diode for the row electrode. 6. A potential difference is generated between the row electrode and the wiring, and a current flowing at that time is measured.
The method for inspecting an electrode substrate for a display device according to claim 1, wherein an electrical conduction state of the row electrode is inspected. 7. The method according to claim 6, wherein a type of an electrical conduction state is specified based on a current value observed according to a potential of the row electrode, the column electrode, and the wiring. An inspection method for an electrode substrate for a display device. 8. A method for applying a predetermined voltage to an auxiliary capacitor electrically connected to the row electrode, the column electrode, the wiring and the pixel electrode, based on a current value observed according to a potential of the auxiliary capacitor electrode. The method for inspecting an electrode substrate for a display device according to claim 6, wherein the type of the electrical conduction state is specified.