JPH1096754A - Inspecting method for liquid crystal panel substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect easily severance of wire between TFT and a pixel electrode, by charging each retension volume and discharging signal line, and then by moving storage electric charge to the signal line to amplify it and detecting it. SOLUTION: In a liquid crystal panel substrate, a retension volume for each pixel 13 is connected to corresponding thin film transistor TFT through a pixel electrode. During inspection, first the TFT for each pixel is turned on and each retension volume is charged through signal line 12 in the condition that an adequate voltage is supplied to an image signal input terminal, next after the TFT is again turned on, and the storage electric charge in the retension volume is moved to the signal line 12 and detected by an external detector through the image signal input terminal. Because if severance of wire is occurring between the TFT and the pixel electrode the retension volume is not charged, otherwise the capacit is charged, any severance of wire is easily detected. In addition, before detecting electric charge of the retension volume the signal line 12 is discharged, therefore, change of electric potential during transferring electric charge becomes larger, and severance of wire is easily and precisely detected.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel substrate and a technique for inspecting the liquid crystal panel substrate.
T of an active matrix type LCD (liquid crystal display) driving pixel electrodes by FT (thin film transistor)
The present invention relates to a technique suitable for use in a method for detecting a disconnection between an FT and a pixel electrode and a short circuit between the pixel electrodes.

[0002]

2. Description of the Related Art Conventionally, as an active matrix LCD, pixel electrodes are formed in a matrix on a glass substrate, and TFTs using amorphous silicon or polysilicon are formed in a one-to-one correspondence with each pixel electrode. Thus, an LCD having a configuration in which a liquid crystal is driven by applying a voltage to each pixel electrode by a TFT has been put to practical use.

[0003]

However, in the conventional active matrix LCD, when the pixel electrode and the TFT are disconnected, it is difficult to electrically detect the disconnection. Therefore, the pixel electrode and TF
There has been a demand for a technology that can easily detect a disconnection from T.

By the way, an active matrix LCD
In, since a pixel signal cannot be sufficiently held only by a liquid crystal capacitor with miniaturization of a pixel electrode, a storage capacitor may be added and connected to a TFT. FIG. 10 illustrates a connection relationship between the TFT, the pixel electrode, and the storage capacitor.
become that way. In the figure, reference numeral 1 denotes a TFT, 2 denotes a pixel electrode, and 3 denotes a storage capacitor. Therefore, if the portion indicated by the symbol A in the figure is broken, no voltage is applied to the pixel electrode ITO, and the product has a defect.

As the storage capacitor as described above, for example, a polysilicon layer serving as an operation layer of a TFT is provided below a signal line or the like, and a scanning line for a pixel adjacent to the preceding stage, that is, a scanning line is interposed therebetween. Is also provided so as to extend along the signal line so as to overlap with the polysilicon layer with the insulating film interposed therebetween, and the capacity of the insulating film between the extending portions as a storage capacitor has been proposed. In that case, since the operation layer of the TFT and the electrode of the storage capacitor are formed of the same polysilicon layer, disconnection is relatively unlikely to occur between the TFT and the storage capacitor. On the other hand, the pixel electrode is generally formed of an ITO film different from the TFT and is connected through a contact hole.
There is a disadvantage that disconnection is more likely to occur than between the TFT and the storage capacitor. However, in the configuration as shown in FIG. 10, it is difficult to electrically detect a disconnection between the TFT 1 and the pixel electrode 2.

An object of the present invention is to provide a technique capable of extremely easily detecting disconnection between a TFT and a pixel electrode in an active matrix LCD.

Another object of the present invention is to provide an active matrix LC capable of easily detecting disconnection between a TFT and a pixel electrode without increasing the number of process steps.
It is to provide a substrate for D.

[0008]

According to the present invention, in order to achieve the above object, a liquid crystal panel substrate has a structure in which a storage capacitor of each pixel is connected to a corresponding TFT via a pixel electrode. With the appropriate voltage applied to the image signal input terminal, the TFT of each pixel is turned on to charge each storage capacitor via the signal line, and then the TFT is turned on again to store the electric charge stored in the storage capacitor. Is transferred to a signal line and detected by an external inspection device via an image input signal terminal. As a result, the connection relationship between the TFT, the pixel electrode, and the storage capacitor becomes as shown in FIG.
If the disconnection between the FT 1 and the pixel electrode 3 is broken, the storage capacitor 3 is not charged, and if not, the storage capacitor 3 is charged. Can be.

In the above-mentioned inspection, it is desirable to discharge (discharge) the signal line once before charging the storage capacitor and thereafter detecting the electric charge. Further, it is preferable that the charging of the storage capacitor and the detection of the electric charge at the time of inspection are sequentially performed for each scanning line. Further, detection of the electric charge of the storage capacitor is performed sequentially by scanning the signal line. As a result, the position of a pixel having a defect (disconnection) can also be detected.

The above-mentioned storage capacitor is formed such that a conductive layer formed simultaneously with the conductive layer serving as an operation layer or a signal line of the TFT in the same step as the storage layer overlaps below or above a scanning line of an adjacent pixel via an insulating film. And a capacitor formed between the conductive layer and the scanning line can be used. As a result, T is increased without increasing the number of steps in the process.
It is possible to provide a liquid crystal panel substrate that can easily detect a disconnection between the FT and the pixel electrode.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an example of a substrate on a pixel electrode side of a liquid crystal panel substrate to which the present invention is applied. In the figure, 1
Reference numerals 1 and 12 denote scanning lines and signal lines arranged in directions intersecting with each other. Reference numeral 13 denotes pixels disposed at intersections of the scanning lines 11 and the signal lines 12, respectively.
And a TFT 13b for sequentially applying a voltage corresponding to an image signal on the signal line 12 to the pixel electrode 13a.
And the storage capacitor 13c. The TFTs in the same row have their gates connected to the same scanning line 11 and their drains connected to corresponding pixel electrodes. The sources of the TFTs in the same column are connected to the same signal line 12. In this embodiment, a TFT for driving a pixel is formed of a so-called polysilicon TFT using a polysilicon layer as a channel layer, and is formed simultaneously with a transistor constituting a peripheral circuit by the same process.

Reference numeral 14 denotes a shift register (hereinafter referred to as a Y shift register) for sequentially driving the scanning lines 11, and 15 denotes an image which is connected to an end of the signal lines 12 and which is supplied to each signal line 12 from the outside. This is a sampling TFT for applying a voltage according to a signal. The image signal VID supplied from the external terminal 31 is input to the source of the sampling TFT 15, and the gate of the TFT 15 is output from a shift register (hereinafter referred to as an X shift register) 16 for sequentially selecting the signal line 12. Sampling pulse is applied. The X shift register 16
1 based on shift clock CLX supplied from outside
Sampling pulses X1, X2, X3,.
‥ Xn is formed and supplied to the gate of the TFT 15. The Y shift register 14 and the X shift register 16 are provided with a start signal DS supplied from the outside.
The shift operation is started by Y and DSX, and is not particularly limited. However, when the control pulse ALH is input, the X shift register 16 outputs all sampling pulses X1, X2, X3,. It is configured to be high level. In this case,
The external terminal 32 to which the control pulse ALH is input is provided as a dedicated test terminal.

In this embodiment, the Y shift register 1
An AND gate 18 for obtaining the logical product of the output of the control signal EN and the control pulse EN from the outside is provided corresponding to each scanning line 11, and a terminal 33 for inputting the control pulse EN is provided. When a low-level control pulse EN is input during a scanning line selection period, the TFT 13 connected to the scanning line is temporarily turned off. The external terminal 33 to which the control pulse EN is input may be provided as a terminal for testing.
In an LCD which can also display an image of the system, the AND gate 18 and a terminal for inputting a control signal for frame thinning are originally provided. An operation can be performed. When the external terminal 33 to which the control pulse EN is input is provided as a dedicated test terminal, the terminal is set to a high level during normal operation by connecting the terminal to a power supply voltage via, for example, a pull-up resistor. Just fix it.

As shown in the embodiment of FIG. 1, the substrate for the liquid crystal panel on which the TFTs and the scanning lines, signal lines, and pixel electrodes connected to the TFTs are formed has a transparent conductive film to which an LC common potential is applied. A counter substrate made of (ITO) and a glass substrate having a color filter layer are arranged at appropriate intervals, the periphery thereof is sealed with a sealing material, and a TN (Twisted Nematic) type liquid crystal or SH ( Sup
(er Homeotropic) type liquid crystal is filled to form a liquid crystal panel. The inspection according to the present invention is performed in a state of a substrate before being assembled as a liquid crystal panel. This can prevent a defective substrate from being supplied to the assembly line.

Next, a method of inspecting the liquid crystal panel substrate constructed as in the above embodiment will be described with reference to the timing chart of FIG. In FIG. 2, CLY is a clock for shifting the Y shift register 14, and H1, H
2 and H3 each represent one horizontal scanning period. Also, Y
1, Y2, Y3} are signals for selectively driving each scanning line 11 (the output signal of the AND gate 18), Vt is a voltage applied to or appearing on the image input terminal 31 during inspection, X1,
X2, X3, .DELTA.Xn are signals applied to the gate of the sampling TFT 15.

In this embodiment, the terminal 31 is synchronized with the clock CLY by a tester or an inspection device.
, A voltage such as 12 V is applied instead of an image signal, and signals X1, X2, X3,... Xn applied to the gates of the sampling TFTs 15 are simultaneously activated to turn on the TFTs 15 on all the signal lines 12. Then, a voltage such as 12 V is applied to the signal line 15 (timing t1). Then, the selection signal Y1 of the first scanning line is first changed to the high level by the Y shift register 14, and the TFTs of all the pixels connected to the scanning line are turned on, and the storage capacitor is charged. Subsequently, the terminal 31 is connected to the ground point and the control pulse EN is input (timing t2). Then, the selection signal Y1 is temporarily changed to the low level, the TFTs of the pixels connected to the scanning line are turned off, and the charges of all the signal lines 12 are discharged via the sampling TFT 15 in the on state. Is done.

Next, the selection signal Y1 is set to the high level again, and the TFT of each pixel is turned on (timing t3).
Here, the storage capacitor is not charged when the TFT and the pixel electrode are disconnected, but is charged when the TFT is not disconnected. The level of the signal line 12 increases due to the electric charge charged in the storage capacitor. Then, next, X
When a start signal DSX is applied to the shift register 16, X
Outputs X1, X2, X3, ΔX of shift register 16
n rises in order and the TFTs 15 turn on in sequence, so that the potential change of each of the signal lines 12 is amplified by an amplifier circuit provided inside a tester or the like connected to the terminal 31 to determine whether there is a disconnection. Can be detected (detection periods T1, T2, T3).

In the above embodiment, the X shift register 16 is controlled by the control pulse AL so that all the signal lines 12 can be simultaneously turned on at the time of a test to charge up and subsequently discharge all the signal lines 12.
Although it has been described that the configuration can be controlled by H, the present invention can be applied without changing the configuration of the X shift register 16 at all. That is, while one scanning line is selected, as shown in FIG.
Apply start signal DSX three times and output X1, X2, X
3, .DELTA.Xn are sequentially output three times, each signal line 12 is sequentially charged up in the first cycle period TS1, the signal line 12 is discharged in the second cycle period TS1, and the third cycle In the period TS3, the charge of the storage capacitor may be transferred to the signal line to perform detection. In this case, the Y shift register 14 is supplied with a shift clock CLY having a cycle three times that of a normal operation. The setting of the voltage to the image signal input terminal 31 and the supply of the control pulse EN to the external terminal 33 may be performed according to the above-described embodiment.

FIG. 4 shows a second embodiment of the present invention. In this embodiment, the upper and lower (or left and right) of the pixel matrix
That is, shift registers (hereinafter, referred to as Y shift registers) 14A and 14B for sequentially selecting and driving the scanning lines are provided at both ends of the scanning line 11, respectively. The Y shift registers 14A and 14B apply the same voltage to each scanning line 11 at the same timing. That is, one scanning line 11
Are simultaneously driven from both sides thereof. Thus, it is possible to reduce a voltage level drop and a signal delay due to the parasitic resistance of the scanning line 11.

On the other hand, in this embodiment, TFTs 15A and 15B are provided on the left and right (or up and down) of the pixel matrix, that is, on both ends of the signal line 12, respectively. Among them, the TFT 15A is a sampling TFT for applying a voltage corresponding to an image signal to each signal line 12, and the other TF is used.
T15B is a precharge TFT for applying a precharge level to each signal line 12.

An auxiliary input signal NRS supplied from outside is applied to the source (terminal opposite to the signal line connection terminal) of the precharge TFT 15B, and a timing signal NSG supplied from outside is applied to the gate of the TFT 15B. Commonly applied. As a result, all signal lines 1
2 is simultaneously precharged to the level of the auxiliary input signal NRS before the application of the image signal in synchronization with the scanning of the scanning line 11, and an accurate voltage corresponding to the level of the image signal is supplied to each pixel even by a relatively short sampling pulse. It is configured to be applied to the electrode. In this embodiment, the sampling TFT 15A and the precharge TFT 1 are used.
5B can be used as a charge TFT or a discharge TFT of the signal line at the time of inspection.

FIGS. 5 and 6 show a planar layout and a sectional structure of one embodiment of a pixel portion of a liquid crystal panel substrate to which the present invention is applied. FIG. 6 is a sectional view taken along line AA in FIG.
It is a cross section along the line.

As shown in FIG. 5, the scanning lines 11 and the signal lines 12 are arranged in a grid, and the pixels are arranged in a rectangular frame separated by the scanning lines 11 and the signal lines 12. An electrode 2 is formed. A TFT 1 for applying a voltage on the signal line 12 to the pixel electrode 2 is provided at one of the corners of the pixel electrode (the lower left corner in FIG. 4). 6, reference numeral 10 denotes a glass substrate, 4 denotes a polysilicon layer serving as an operation layer of a TFT formed on the surface of the glass substrate 10 in an island shape, and 5 denotes a polysilicon layer formed on the polysilicon layer 4 by a CVD method or the like. This is a gate insulating film. Reference numeral 6 denotes a gate electrode made of a second polysilicon layer formed at a substantially center of the polysilicon layer 4 with a gate insulating film 5 interposed therebetween. This gate electrode 6
As shown in FIG. 4, it is formed so as to protrude from the scanning line 11. Reference numeral 7 denotes an interlayer insulating film made of silicon oxide or the like formed so as to cover the gate electrode 6 and the gate insulating film 5. The pixel electrode 2 is formed on the interlayer insulating film 7.

In this embodiment, a conductive layer 8 serving as one electrode of the storage capacitor is overlapped with the scanning line 11 via an interlayer insulating film 7 by the same polysilicon layer as the polysilicon layer 2 serving as the TFT operation layer. This conductive layer 8 is formed as follows.
One end of the pixel electrode 2 is connected to a contact hole 9 a formed in the interlayer insulating film 7 and the gate insulating film 5. The other end of the pixel electrode 2 is connected to a contact hole 9.
At b, it is connected to a polysilicon layer 4 as a TFT operation layer. Furthermore, the signal line 1 made of aluminum or the like
2 is connected to the polysilicon layer 4 through a contact hole 9c formed in the interlayer insulating film 7 and the gate insulating film 5. As a result, the scanning line 11 and the conductive layer 8 made of the first polysilicon layer formed thereunder are formed.
9 is connected to the drain (sometimes called a source) of the TFT 1 via the pixel electrode 2 as the storage capacitor 3 as shown in FIG.

FIGS. 7 and 8 show a planar layout and a sectional structure of an embodiment of a pixel portion of a liquid crystal panel substrate to which the present invention is applied. This embodiment is an embodiment in which a transistor for applying a voltage to a pixel electrode is constituted by an inverted staggered TFT. FIG. 8 is a cross section taken along line BB in FIG.

7 and 8, reference numeral 21 denotes an insulating film formed on the glass substrate 10 by a CVD method, 22 denotes a gate electrode formed of a Ta (tantalum) layer formed by sputtering, and 23 denotes a surface covering the surface thereof. Plasma CV
A gate insulating film made of a silicon nitride film formed by the D method, 24 is a non-doped amorphous silicon layer serving as a channel region, and 25a and 25b are formed by a plasma CVD method so as to contact the surface of the amorphous silicon layer 24. An N-type amorphous silicon layer serving as a source and drain region.

In FIGS. 7 and 8, 26a,
26b is the N-type amorphous silicon layer 25a, 25
The source and drain electrodes 27 made of a titanium (Ti) layer formed so as to be in contact with the surface of the n-type amorphous silicon layers 25a and 25b and the etch stopper for separating the source and drain electrodes 26a and 26b. A channel protection film made of silicon nitride or the like. In this embodiment, the scanning line 11 is formed integrally with the gate electrode 22 by the same Ta layer 22 and the signal line 12 is formed integrally by the same Ti layer as the source electrode 26a.

In this embodiment, the pixel electrode 2 made of an ITO film is formed below the insulating film 21, that is, on the surface of the glass substrate 10, and one end of the drain electrode 26b is connected to the pixel electrode 2 through the contact hole 29b. And the pixel electrode 2 is connected to the N by the drain electrode 26b.
Region 25b composed of amorphous silicon layer
It is connected to the. At the other end (the upper end in FIG. 7) of the pixel electrode 2, a conductive layer 28 made of the same Ti layer as the signal line 12 is formed so as to overlap the previous scanning line 11 and the insulating film 23. Since a part of the conductive layer 28 is connected to the pixel electrode 2 through the contact hole 29a, the conductive layer 2 made of the scanning line 11 and the Ti layer formed thereon is formed.
8, the capacitance of the storage film 3 as shown in FIG.
Is connected to the drain (source) of the TFT 1 via the pixel electrode 2.

Although the invention made by the present inventor has been specifically described based on the embodiments, the invention is not limited to the above-described embodiments and can be variously modified without departing from the gist thereof. . For example, the AND gate 18 for selectively driving the scanning line 11 in the above embodiment is a NAND gate.
It may be a gate. In that case, the Y shift register 1
Only one signal output from 4 is set to a low level corresponding to the scanning line to be selected. The control pulse EN is set to the high level only when the signal line 12 is discharged, contrary to FIG.

If the video signal supplied to the liquid crystal panel is an analog signal and there is only one, the TFT 15B is turned on by the sampling pulses X1, X2ＸXn, and the video signal level is applied to the signal line 12. May be sampled at a portion where the video signal is changing. In this case, the level immediately before the TFT 15B is turned off is sampled. Therefore, when the video signal level changes in the direction of rising, instead of the average voltage, the higher level changes and the video signal level changes in the lowering direction. The lower levels are sampled. Further, there is a problem that the sampling level changes even if the timing of the sampling pulse is slightly shifted.

Therefore, in accordance with each sampling timing, a plurality of types of phase development are performed so as to prevent the video signal level from changing during sampling (for example, to process the average voltage of the video signal during the sampling period). The video signals VID1 to VID6 may be formed by an external phase expansion circuit and supplied to the liquid crystal panel. The present invention can also be applied to an LCD configured to supply the phase-developed video signal as described above.

[0033]

As described above, according to the present invention, the liquid crystal panel substrate is configured such that the storage capacitor of each pixel is connected to the corresponding TFT via the pixel electrode, and at the time of inspection, first, it is connected to the image signal input terminal. With the appropriate voltage applied, the TFT of each pixel is turned on to charge each storage capacitor via the signal line, and then the TFT is turned on again to transfer the charge stored in the storage capacitor to the signal line. Since the detection is performed by an external inspection device through the image input signal terminal,
When the line between the pixel electrode and the pixel electrode is disconnected, the storage capacitor is not charged, and when the line is not disconnected, the storage capacitor is charged. Therefore, the disconnection can be easily detected by the above inspection. There is.

In the above-mentioned inspection, the signal line is once discharged (discharged) before charging the storage capacitor and thereafter detecting the electric charge. Therefore, the electric charge is transferred from the storage capacitor by the electric charge remaining on the signal line. There is an effect that the change in the potential at the time of the disconnection is increased and the disconnection can be detected easily and accurately.

Further, since the charging of the storage capacitor and the detection of the electric charge at the time of inspection are performed sequentially for each scanning line,
Detection can be performed before the charge of the storage capacitor leaks, and accurate determination can be made. In addition, since the detection of the electric charge of the storage capacitor is performed sequentially by scanning the signal line, the position of a pixel having a defect (disconnection) can be detected, and the inspection is performed by changing the configuration of the substrate. There is an effect that the shift can be performed using the internal shift register or the like without any change.

Further, as the storage capacitor, a conductive layer formed simultaneously in the same step as a conductive layer serving as a TFT operation layer or a signal line can be formed below or above a scanning line of an adjacent pixel via an insulating film. The TFTs are provided so as to be overlapped with each other, and the capacitance formed between the conductive layer and the scanning line is used.
There is an effect that it is possible to provide a liquid crystal panel substrate that can easily detect a disconnection between the liquid crystal panel and the pixel electrode.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a substrate on a pixel electrode side of a liquid crystal panel to which the present invention is applied.

FIG. 2 is a timing chart showing changes in main signals when the liquid crystal display panel substrate of the embodiment of FIG. 1 is inspected.

FIG. 3 is a timing chart showing changes in main signals during inspection of a liquid crystal panel substrate according to another embodiment.

FIG. 4 is a block diagram showing another embodiment of the substrate on the pixel electrode side of the liquid crystal panel to which the present invention is applied.

FIG. 5 is a plan view showing a configuration example of a pixel using a polysilicon TFT of a liquid crystal panel substrate to which the present invention is applied.

FIG. 6 is a sectional view showing a section taken along line AA of FIG. 5;

FIG. 7 is a plan view showing a configuration example of a pixel using an inverted staggered TFT of a liquid crystal panel substrate to which the present invention is applied.

FIG. 8 is a sectional view showing a section taken along line BB of FIG. 7;

FIG. 9 is an equivalent circuit diagram showing a configuration of a pixel in a liquid crystal panel substrate to which the present invention is applied.

FIG. 10 is an equivalent circuit diagram showing a configuration of a pixel in a conventional liquid crystal panel substrate.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 TFT 2 Pixel electrode 3 Storage capacity 4 Polysilicon layer (TFT operation layer) 5 Gate insulating film 6 Gate electrode 7 Interlayer insulating film 8 Storage capacity electrode (conductive layer) 9a, 9b Contact hole 10 Glass substrate 11 Scanning line 12 Signal line 13 Pixel 14, 14A, 14B Y shift register 15A Sampling TFT 15B Precharge TFT 16 X shift register 21 Insulating film 22 Gate electrode 23 Gate insulating film 24 Non-doped amorphous silicon layer 25a, 25b Source and drain regions N-type amorphous silicon layers 26a, 26b Source and drain electrodes 27 Channel protective films 28 Conductive layers 29a, 29b Contact holes

Claims (7)

[Claims] An image signal input terminal, a plurality of signal lines connectable to the image input terminal, and a plurality of scanning lines disposed so as to intersect with the signal line. A pixel electrode is formed between the pixel electrode and a scanning line, a transistor and a storage capacitor are formed corresponding to each pixel electrode, and the storage capacitor is connected to the transistor via the pixel electrode; A gate terminal of the liquid crystal panel is connected to a corresponding scanning line so as to be turned on and off, and inspects a liquid crystal panel substrate configured to apply a voltage of the signal line to the pixel electrode in an on state. In this case, first, a transistor of a desired pixel is turned on with an appropriate voltage applied to the image signal input terminal to charge a storage capacitor, and then the image is formed with the transistor turned off. The image input signal terminal is connected to a predetermined potential point to discharge the signal line. Thereafter, the transistor is turned on again to transfer the electric charge stored in the storage capacitor to the signal line and amplify it by the amplifier circuit. A method for inspecting a substrate for a liquid crystal panel, characterized in that the substrate is detected. 2. The method according to claim 1, wherein the charging of the storage capacitor is performed for every pixel connected to the scanning line for each scanning line, and the charge stored in the storage capacitor by the charging is detected by a corresponding transistor. 2. The method for inspecting a liquid crystal panel substrate according to claim 1, wherein the inspection is performed for each pixel by turning on one by one in order. 3. The method according to claim 2, wherein the charging of the storage capacitor is performed for each pixel by sequentially turning on switching elements connected between the image signal input terminal and the signal lines. The method for inspecting a liquid crystal panel substrate according to claim 2. 4. The method according to claim 2, wherein the discharging of the signal lines is performed for each signal line by sequentially turning on the switching elements connected to the signal lines. The inspection method of the liquid crystal panel substrate described in the above. 5. The storage capacitor is an insulating film capacitance between a conductive layer formed below or above a scanning line for a pixel adjacent to the pixel via an insulating film and the scanning line. 5. The method according to claim 1, wherein the conductive layer is connected to a corresponding transistor via the pixel electrode. 6. 6. The conductive layer according to claim 5, wherein the conductive layer serving as one electrode of the storage capacitor is a conductive layer formed in the same step as a conductive layer forming an operation layer of the transistor. Inspection method for liquid crystal panel substrates. 7. The liquid crystal according to claim 6, wherein the conductive layer serving as one electrode of the storage capacitor is a conductive layer formed in the same step as a conductive layer forming the signal line. Panel board inspection method.