TW552661B - Gettering method of silicon wafer by using very high energy blanket implant - Google Patents

Abstract

The present invention provides a gettering method of silicon wafer by using very high energy blanket implant (VHEBI), wherein ions are implanted into the deep layer of silicon wafer with high energy by VHEBI, so that the depth of the surface impurity defects is reduced globally, and the surface impurity defects can diffuse into the damaged region deeper under the silicon wafer surface, thereby effectively reducing the impurity defects and dislocations in the device forming region of the silicon wafer. The present invention utilizes the VHEBI technology to eliminate the surface impurity defects, so as to provide a silicon wafer surface with very low impurity concentration and few dislocations for fabricating integrated circuits on top of it, and to keep good MOS device characteristics and to increase the product yield rate.

Description

552661

[Field of the Invention] The present invention relates to a method for removing defects (getter i ng) in a semiconductor silicon wafer manufacturing process, and more particularly to a method for eliminating silicon by using a Very High Energy Blanket Implant (VHEBI) method. Defect removal method for round surface defects. [Background of the Invention] According to the ‘wafer processing and forming (M o d i f i c a t i ο η) refers to the process of manufacturing Shi Xi single crystal rods into silicon wafers (Wafer). The manufacturing steps included in the wafer forming process may increase or decrease depending on different wafer manufacturers, and mainly include crystal positioning (〇rientati〇n), slicing (Slicing), and edge contouring (Edge Contouring) , Lapping, chemical etching (Etching), gettering (Gettering), and the cleaning process (Cleaning) required between the steps of a series of processing, the most ^ into a wafer, b also —Since silicon wafers grown by the silicon growth (CZ) method, defects caused by the growing% contamination and thermal stress are all left in the wafer, and defects caused by continuous processing are also stored therein. In the integrated circuit manufacturing process, 'these defects will affect the yield and electrical quality of the device, so the point defects that cause adverse effects on the characteristics of the device must be removed. The research uses crystal lattice defects in the wafer to control or eliminate other defects. It is called a fatigue method. The common methods to go crazy can be divided into three types ... (a) Intrinsic gettering, which uses CZ length During the crystallization process, the saturated oxygen-containing europium forms precipitates after heat treatment to cause lattice defects.

552661 V. Description of the invention (2) During the annealing process, these defects will provide the adsorption of impurities or metal defects in the design area of the component (Sink) to eliminate the lack of surface impurities. (B) Extrinsic gettering ), Which is achieved by external forces caused by mechanical stress on the back of the wafer to form defects such as differential rows to achieve the purpose of removal; common external removal methods include mechanical grinding, spraying or applying a layer of polycrystalline silicon, However, this method requires careful handling of mechanical stress control and cleaning, so as not to cause wafer deformation or contamination. (C) Chemical gettering. This method is different from the above two methods to provide defect adsorption. Instead, it removes impurity defects through a chemical reaction between metal impurities and diffused phosphorus ions. However, no matter which method is used above, the traditional defect removal method can only reduce the depth of some impurities. 'All metal impurity defects on the silicon wafer cannot be completely reduced, so that there is still a part on the surface of the silicon wafer. Impurity defects will cause the components of the integrated circuit fabricated on the Shixi wafer to be affected by impurities and lower the component yield and electrical quality. Therefore, the present invention proposes a silicon wafer defect removal method using a high-energy comprehensive ion implantation method in order to effectively overcome the shortcomings of the conventional method. [Objective and Summary of the Invention] The main purpose of the present invention is to provide a method for removing defects on silicon wafers. The system i uses high-energy comprehensive ion implantation (VHEBI) to comprehensively reduce the depth of impurities and defects: to provide a very low impurity The 'low-difference silicon wafer' is used to fabricate integrated circuit components without affecting the characteristics and electrical quality of the device. Another object of the present invention is to provide a full energy ion for use in ^ ^

552661 V. Description of the invention (3) Silicon wafer defect removal method of implantation method, which can effectively reduce the dislocation of silicon wafer surface (dislocation) and impurity defects such as point defects, line defects, surface defects and body defects. To increase product yield. Another object of the present invention is to provide a silicon wafer defect removal method using a high-energy full ion implantation method, which can maintain good metal oxide semiconductor (MOS) device characteristics and better integrity of the gate oxide layer. (Gate Oxide Integrity, G0I) 〇 In order to achieve the above purpose, the present invention is a semiconductor silicon wafer with impurity defects on the surface of the defect removal process, which mainly uses high-energy comprehensive ion implantation technology, The energy is injected into the silicon wafer, so that the surface impurity defects are comprehensively reduced in depth and diffused to the deep damaged area below the silicon wafer surface, thereby making the component formation area on the silicon wafer surface defect-free, which is beneficial to the component Production. In the following, detailed descriptions will be made with specific embodiments and accompanying drawings to make it easier to understand the purpose, technical content, features and functions of the present invention. [Simplified description of drawing number] 10 Silicon wafer 12 Impurity defect 14 Element formation area 16 Damaged area [Detailed description] The present invention uses high-energy full ion implantation (VHEBI) to remove the surface of the silicon wafer, which will cause poor device characteristics. Affected impurities, heavy metals, or

Page 6 552661 V. Description of the invention (4) Suspected "quota" "" ----- remove point defects related to defects, etc., and use this method to remove the component formation area on the surface of the silicon wafer ' In order to improve the characteristics of 7L components and the yield of components, in the semiconductor wafer forming process, defects due to single crystal = > dyeable and thermal stress are left in the impurities caused by the processing of silicon wafers. Defect 12 also exists, especially the formation of components on the surface of silicon wafer 10 | Defect 12, often affects the carrier (Carri (the yield and electrical quality of components) in semiconductors, so in order to maintain crystal, chemical One of the behaviors such as electrical properties and its inner layer material is subjected to a defect removal process on the surface of Shixi wafer 10. The present invention is a defect removal process of Shixi line which contains impurity defects in it, as shown in Figure 2A. Using VHEBI technology, deep implantation of phosphorus (p) or gas (C1) $ high energy into silicon wafers, the deeper the better, the reference implantation depth is greater than 20 microns (Impurity defects of gold, copper, nickel and iron, etc. 1 2 The full expansion of the administration to Shi Xi Circle 1 〇 deeper damaged area below the surface !, 6 ′ as shown in the second figure B, and further make the silicon wafer 丨 surface f 14 free of defects, in other words, from the Shixi wafer 2 ~ The element formation area at a depth of 4 micrometers will have the characteristics of differential rows, which will facilitate the subsequent semiconductor process of each element on the surface of the silicon wafer. Among them, the above-mentioned high-energy comprehensive ion implantation (gettering) purification Or defect-free. The silicon growth environment is mixed with 10, and at the same time, the behavior of the impurities in the region 14 as shown in the first figure) r) will affect the surface consistency of the wafer 10, so the wafer 1 must be The direct color input on 0 is full ion implantation ions (above MeV and the depth of implantation is more V m), which reduces the depth of carbon and oxygen, and (damage area) δ element formation area 1 0 surface boundary is about low impurity defects The integrated circuit can be fabricated from the silicon wafer 552661. 5. Description of the invention (5) Wire implantation: It is more suitable for the existing production defect.): The defect day T is the defect point T. (P〇int defect) Une defeCt, area defect (area lattice) s volume defects, etc., regardless of cutting, the use of the second method of the present invention for the formation of 70 pieces of the adjoint woman in the area, the shoulders to remove silicon defects and high impurities on the surface or There is a difference between the two rows, but the damaged area will not exist at all, although there is a comparison; Table = its: in the deeper part of the Shixi wafer. Therefore, the sand piece forming area of the present invention has any impact. ^ ^ ^ ^ ^ (M〇S) \ V ^ ^ ^ ^ 1 Νι entry method (VHEBI) to fully reduce the use of 咼 旎 1 full ion implantation to provide-very low impurity: / the depth of the impurity defect 'Therefore, it can be made on the second low-difference row of i μ. ♦ Wafer surface for integrated circuit elements to increase the product yield rate: ^ Response: the characteristics of the piece ”quality, and then the method of silicon wafer defect removal : The invention utilizes the characteristics of high-energy comprehensive ion implant elements, t 1 can maintain good metal oxide semiconducting OXm with better integrity of the polar oxide layer (G "e uxide lntegrity, (j〇i). The above-mentioned embodiments are only at the & point, the purpose of which is to familiarize themselves with the technical ideas and features of the present invention and implement them accordingly. When those who cannot understand the contents of the present invention disclosed in accordance with the present invention, The patent scope of the present invention, that is, the equivalent changes or modifications that cover the patent scope of the present invention, should still be covered.

552661 Brief description of the diagram The first diagram is a schematic diagram of Shixi wafer without deepidemic treatment. The second diagram A is a schematic view of a silicon wafer performing high-energy full ion implantation according to the present invention. The second diagram B is a schematic view of the silicon wafer after the defect removal process according to the present invention has been completed.

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Claims (1)

552661 VI. Application for patent scope 1 · One use includes the following to provide a defect first; Use of high-energy wafers to break the wafer surface 2 · If applying for the special, the implantation 3 · If applying for the special 'The broken crystal 4 · If applying for the special The ion 5 · If you apply for special, the impurity 6 · If you apply for special, the defect 7 · If you apply for special, in the silicon chip wafer surface ion implantation method of the broken wafer shelter method, round, in the silicon crystal The round surface is full of impurities. The whole process of semiconductor energy and semiconductor ions is to make the element below the round surface of the impurity. The first ion is the phosphorus range. The first round surface is the deep range. The depth range is the first range of carbon and oxygen range. The first range is the point defect range. The wafer surface is made by the implantation method. The defects are comprehensive and deep in the damaged area. Silicon or gas ions. The degree of silicon described in item 2 is between 2 and more than 20 microns in silicon, gold, copper, silicon described in item, wire defects, and silicon impurity removal circuits described in item 2. Elemental ions are implanted into the silicon with a reduced depth and diffuse into the region with high energy, thereby crystallizing the stone. Wafer removal method 'Where the wafer removal method, which is "between 4 micrometers. Wafer removal method" where 0 Wafer removal method, which includes nickel and iron, etc. Wafer removal method, where surface defects or Defective wafer method. After the steps, one of the steps can be used in the subsequent semiconductor process of the piece. • The silicon wafer defect removing method as described in the first patent application scope, wherein the high-energy comprehensive ion The implantation method can be accessed from the back of the silicon wafer. Page 10 552661 6. Scope of patent application High-energy ion implantation. 9 · The method for removing silicon wafers as described in item 1 of the scope of patent application, wherein the method for removing silicon wafers is applied in the process of metal oxide semiconductor (MOS). Page 11