TW538631B - Digital synchronization of video signals - Google Patents

Digital synchronization of video signals Download PDF

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Publication number
TW538631B
TW538631B TW089103385A TW89103385A TW538631B TW 538631 B TW538631 B TW 538631B TW 089103385 A TW089103385 A TW 089103385A TW 89103385 A TW89103385 A TW 89103385A TW 538631 B TW538631 B TW 538631B
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Ciaran Gerard O'donnell
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Philips Electronics Na
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/91Television signal processing therefor
    • H04N5/93Regeneration of the television signal or of selected parts thereof
    • H04N5/95Time-base error compensation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00Details of colour television systems
    • H04N9/44Colour synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/12Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

A time based correction (TBC) method for digital synchronization of video signals. The time based correction method may be used for satellite based communications to keep clocks synchronized in a multimedia system. Digital receiver clock phases are compared to measure synchronization. The method includes an initialization procedure (tbcInit) that initializes algorithm variables and sets up an initial phase; a measurement procedure (tbcGetPhase) that measures the current phase; and a tracking procedure (tbcAdjust) that makes periodic adjustments to the output clock (VO_CLOCK).

Description

538631 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明(, 本發明係有關於視頻信號; >明次 ^ u\數位同步化,以及更特別是 ^ 一日。抆正法則,以便將多媒體系統内 的視頌谓入及輸出時鐘保持爲同步狀態。 傳輸器與接收器之間的资 、 ^ 、针问步作業烏眾知之廣播課題 ^地細調及測定,接收器時鐘始終無法準確地 配a傳論器時鐘。這個問題會因傳輸遲延以 變得更加惡化。在以多嫫啤^甘k … 把馬签礎的貧料流内,該時鐘同 步問題會特別地敏感。 圖1説明—個先前的時間基底式校正問題範例。一個衛 星⑽提供-以箭頭102爲表示的類比視訊信號給某一個 機頂f 1〇4 ’其中包括有—個數位處理器(未於此圖明示) 。琢衛星100以一與數位信號處理器無關的時鐘速率來提 供該信號。該機頂盒104接收到該信號,並且提供一視頻 輸出信號给電視機τν 106。該自機頂盒104而來的視頻輸 出頻率係被調成,或是導得,與由一個板嵌式震盪器,即 自該機頂盒104内,所產生的時鐘同步。 薇板礙式震盪器決不會以與該衛星1〇〇完全相同的時鐘 速率,來提供視頻輸出信號。該板嵌式時鐘速率會是要不 是太高,要不就是太低,即該時鐘要不是太快,要不就是 太忮。此外,在很長的時段上,爲了要校調任何最終錯誤 與重新對兩個信號進行同步,如果該時鐘太快,則就必須 要拋棄視頻訊框,而如果該時鐘太慢,則就必須要產生命 的視頻訊框並且將其加入視頻輸出之内。 在例如像VCR或是雷射(影音)光碟機的消費性家電方面 4- ^紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ! . -- (請先閱讀背面之注意事項再填寫本頁) 訂·· -|線_ 538631 A7 經 濟 部 智 慧 財 產 局 員 工 消 費 合 作 社 印 製 五、發明說明(2 ) ’就會面臨這個有關於時間基底式校正問題。一種在先前 技藝所普遍採用,以校正VCR或是影音光碟機的視頻信號 時間基底式錯誤問題的方法,會牵涉到記憶體緩衝區之應 用。該先前技藝之代表性範例爲「歐洲專利應用〇 272 A2」,以及美國專利5,559 812。該方法基本上涉及到捕 捉一輸入信號的數位樣本視窗,並且於此插入與由此移除 孩貧料元素。這種方法會產生許多明顯的缺點。這些缺點 «,首先就是會需要記憶體緩衝區,並且其大小會正比於 出現抖動的程度這個事實,而這點即會產生明顯的硬體成 本代價。除此之外,插入與壓縮資料也會降低視頻信號的 品質。最後是時鐘信號本身並無法被校正。 一般,該時間基底式錯誤校正問題確實具有許多應加以 探討的基本元素。第一個元素是,必須利用一種數位處理 器來處理多媒體信號,以達到系統内頻率鎖定之目的。第 们元素疋’要做到在特定相位上的頻率鎖定。該相位差 係由以數位方式來儲存的信號量而定。這點至爲重要,因 爲「Ik機存取記憶體」(RAM)的控制成本將會是整體系統 成本中一項重要因素。第三個元素是發生在當應用項目必 須要處理到非連續性相位位移問題時。如當信號源爲例如 象是VCR等機械式設備時,就會需要加以考慮該第三個元 素。 種解決上逑該時間基底式錯誤校正問題的方法是,增 加硬體以驅使視頻輸出時鐘爲視頻輸入時鐘。該法係與類 比或是數位硬體合併使用。然而,該法需要一固定式計時 * ---------------. K— (請先閱讀背面之注意事項再填寫本頁) 訂 線-538631 Printed A7 by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The invention description (This invention relates to video signals; > Mingci ^ u \ Digital synchronization, and more particularly ^ one day. Keep the input and output clocks in the multimedia system in a synchronized state. The information between the transmitter and the receiver, ^, and step-by-step operations are well-known broadcast issues ^ Fine-tuning and measurement of the receiver clock always fails Accurately match the clock of an argumentator. This problem will be exacerbated by transmission delays. This clock synchronization problem will be particularly sensitive in the lean stream based on the number of beers ^ and k…. 1 Explanation—A previous example of a time-based correction problem. A satellite ⑽ provides an analog video signal represented by arrow 102 to a set top f 104. It includes a digital processor (not shown in this figure). Explicit). The satellite 100 provides the signal at a clock rate independent of the digital signal processor. The set-top box 104 receives the signal and provides a video output signal to the television τν 106 The video output frequency from the set-top box 104 is adjusted, or derived, to synchronize with the clock generated by a board-mounted oscillator, that is, from the set-top box 104. The Wei board obstructive oscillator will never The video output signal will be provided at exactly the same clock rate as the satellite 100. The board-embedded clock rate will be either too high or too low, that is, the clock will be too fast, or it will be In addition, for a long period of time, in order to adjust any final errors and resynchronize the two signals, if the clock is too fast, the video frame must be discarded, and if the clock is too slow, Then it is necessary to generate a live video frame and add it to the video output. For consumer appliances such as VCR or laser (audio and video) disc players 4- ^ Paper size applies Chinese National Standard (CNS) A4 Specifications (210 X 297 mm)!.-(Please read the notes on the back before filling out this page) Order ··-| line _ 538631 A7 Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 5. ) 'There will be a problem with time-based correction. A method commonly used in previous techniques to correct the time-based error of the video signal of a VCR or an audio CD player will involve the application of a memory buffer. Representative examples of this prior art are "European Patent Application 0272 A2" and US Patent 5,559 812. This method basically involves capturing a digital sample window of an input signal, and inserting and removing the child material here Element. This method has many obvious disadvantages. These disadvantages «, first of all, is the fact that a memory buffer is required, and its size is proportional to the degree of jitter, and this has a significant hardware cost price . In addition, inserting and compressing data can degrade the quality of the video signal. Finally, the clock signal itself cannot be corrected. In general, this time-based error correction problem does have many basic elements that should be explored. The first element is that a digital processor must be used to process the multimedia signal to achieve the purpose of frequency locking in the system. The element 疋 'is to achieve frequency lock on a specific phase. The phase difference is determined by the amount of signal stored digitally. This is very important because the cost of controlling Ik machine access memory (RAM) will be an important factor in the overall system cost. The third element occurs when the application must deal with discontinuous phase shifts. For example, when the signal source is a mechanical device such as a VCR, the third element needs to be considered. One way to solve this time-based error correction problem is to add hardware to drive the video output clock to the video input clock. This method is used in combination with analog or digital hardware. However, this method requires a fixed timing * ---------------. K— (Please read the precautions on the back before filling out this page)

「I I I I n I n n I n I n n - 5 本紙張尺度朝t關家鮮(CNS)A4規格⑵G x挪公复 538631 A7 B7 五、發明說明(3 ) 遲延計算,而這種計算對數位處理器卻還更困難。另外一 種解決的方法是涉及到將該時間基底式錯誤校正問題,模 型化成一種偏微分方程式系統,其頻率則以相位微分値爲 模型。不ϋ,還有另外一種解決的方法,是利用模糊邏輯 理論將該問題模型化。使用這種模糊邏輯理論方法,需要 對各種不同的輸出入相位範圍進行查表。該查表作業可對 不同的輸出入相位範圍,來提供一離散式輸出頻率。但是 由於泫値係由查表所的,故校調値爲離散形式。除此之 外’也需要進行廣泛的實驗以求得所需要的參數値。 發明概述 本發明之目的即在於提供一種時間基底式校正方法,以 進行視頻信號之數位同步化,而能夠克服上述現有可用技 術上之缺點與短處。爲此,本發明可提供一種如獨立申請 專利範圍内説明之方法及裝置。該獨立申請專利範圍中定 義較佳之具體實施例。 消 訂 線 本發明圍繞在視頻信號之數位同步化的「時間基底式校 正(TBC)」方法。本發明的時間基底式校正,可保持多媒體 系統内的時鐘爲準確地、正確地與穩定地方式同步。本方 法包括了一個初始化程序(tbcInit)來對演算法變數初始化 ,以及設定一個初始相位;一種量測程序(tbcGetphase)可 對現有階段進行測量;以及一個追蹤程序(tbcAdjust)以便 對輸出時鐘(V0—CLOCK)進行週期性調整。除時鐘鎖定之 外’本發明亦可允許控制輸入至輸出的遲延,降低緩衝區 的茜求並且提咼影像品質。事實上,由於本發明僅需要組 -6- 本紙張尺度適用ΐ國國家標準(CNS)A4規格⑽χ挪公着 538631 A7 B7 五、發明說明(4) 合邏輯來進行時鐘調整作業,所以可消除所有記憶體的需 求,而相對於現有技術可明顯地降低硬體成本。 圖示簡述 本發明前述與其他特性及優點,可藉參考下列細部描述 與所附圖示而可立即明暸,其中: 圖1顯示一個先前技藝之時間基底式校正問題範例; 圖2爲一 NTSC視頻信號訊框與PAL視頻信號訊框之比 較表; 圖3爲一個視頻輸出(V0)時鐘系統,而係由V0單元的 VO—CLOCK暫存器所控制之範例; 圖4爲VO — STATUS暫存器、VO—LINE暫存器以及 VI_STATUS 暫存器; 圖5爲一包含NTSC與PAL標準初始化範例之對照表; 圖6爲實驗性觀察該時鐘漂移問題之排置設定;以及 圖7爲一符合本發明之較佳具體實施例的時間基底式校 正方法流程圖。 本發明之詳細説明 經濟部智慧財產局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) -1線. 藉由範例,於後文中將以一種可連續性地量測衛星通訊 輸入與輸出相位,以及控制該輸出頻率的數位信號處理器 。而且僅藉由範例,同時參考到Philips Electronics North America Corporation出品的TriMedia處理器,更特別地是 指TriMedia TM1000處理器,來説明並且讓讀者明瞭本發 明。故惠請參酌 Philips Electronics North America Corporation 於 1997 年出版的 少 -7- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 538631 A7"IIII n I nn I n I nn-5 The size of this paper is toward Guan Jiaxian (CNS) A4 specifications ⑵ G x No. 538631 A7 B7 V. Description of the invention (3) Delay calculation, and this calculation is performed by a digital processor But it is more difficult. Another solution is to model the time-based error correction problem as a partial differential equation system, and the frequency is modeled as phase differential chirp. No wonder, there is another solution This problem is modeled using fuzzy logic theory. Using this method of fuzzy logic theory, it is necessary to look up a table of various input and output phase ranges. This table lookup operation can provide a discrete for different input and input phase ranges. Output frequency. But since it is based on the look-up table, the calibration is adjusted to a discrete form. In addition, extensive experiments are also needed to obtain the required parameters. Summary of the invention The purpose of the present invention is The purpose is to provide a time-based correction method for digital synchronization of video signals, which can overcome the disadvantages and shortcomings of the existing available technologies. The present invention can provide a method and device as described in the scope of the independent patent application. The preferred embodiment is defined in the scope of the independent patent application. TBC) "method. The time-based correction of the present invention can keep the clock in the multimedia system accurately, correctly and in a stable manner. This method includes an initialization program (tbcInit) to initialize algorithm variables and set an initial phase; a measurement program (tbcGetphase) can measure existing phases; and a tracking program (tbcAdjust) to output clock (V0 —CLOCK) for periodic adjustment. In addition to clock locking, the present invention also allows control of the delay from input to output, reduces buffer requirements, and improves image quality. In fact, since the present invention only needs to be group-6- this paper size is applicable to the national standard (CNS) A4 specification ⑽ Norwegian Standard 538631 A7 B7 V. Description of the invention (4) The clock is adjusted logically, so it can be eliminated All memory requirements, while significantly reducing hardware costs compared to existing technologies. The diagram briefly describes the foregoing and other features and advantages of the present invention, which can be immediately understood by referring to the following detailed description and accompanying drawings, wherein: FIG. 1 shows an example of a time-based correction problem of the prior art; FIG. 2 is an NTSC Comparison table between video signal frame and PAL video signal frame; Figure 3 is a video output (V0) clock system, which is an example controlled by the VO-CLOCK register of V0 unit; Figure 4 is VO — STATUS Register, VO-LINE register, and VI_STATUS register; Figure 5 is a comparison table containing NTSC and PAL standard initialization examples; Figure 6 is an experimental setting to observe the clock drift problem; and Figure 7 is a A flowchart of a time-based correction method according to a preferred embodiment of the present invention. Detailed description of the invention Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs (please read the notes on the back before filling out this page) -1 line. By way of example, in the following text, satellite communications will be continuously measured Input and output phases, and a digital signal processor that controls the output frequency. And only by way of example, and referring to the TriMedia processor produced by Philips Electronics North America Corporation, and more particularly the TriMedia TM1000 processor, to explain and make the reader understand the invention. Therefore, please refer to the paper published by Philips Electronics North America Corporation in 1997. -7- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 538631 A7

五、發明說明(5 ) 經濟部智慧財產局員工消費合作社印製V. Description of the invention (5) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

Data Book 乙龛。 同時,本發明係以兩種眾知之PAL與NTSC視訊信號標 準來説明’該兩種標準具有類似的計時,但是卻有不同的 檢行編號方式。如圖2的附表,即可提供ntsC視訊信號 11 〇和PAL視訊信號112之間的訊框比較。該NTSC視訊信 號110係定義爲每一訊框計有525橫行,而每秒計有60個 訊框。該PAL視訊信號112則是定義爲每一訊框計有625 橫行,而每秒計有5 0個訊框。 在圖2中, B1F1係指欄位1的空白 B1F2係指攔位2的空白 B1F 10係指欄位1覆蓋的空白 B1F20係指攔位2覆蓋的空白 V1係指視頻影像的攔位1 V2係指視頻影像的攔位2 圖3爲一個視頻輸出(VO)時鐘系統120,而由VO單元 12 0的V Ο—C L Ο C K暫存斋12 2所控制之範例。該時鐘產生 器系統中包括一個方波「直接信號合成器(DDS)」124。本 範例的DDS 124可提供8到40 MHz間的頻率範圍,其解析 度爲0.007 Hz。而該DDS 124的輸出會被送往一鎖相迴路 濾波器126,在此可消除該DDS 124輸出信號的時鐘閃動 現象。該DDS 124係以設定VO —CLOCK暫存器122,以便 程式設計成來滿足下(1)式: -8 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注咅?事項再填寫本頁) · i線· 538631 A7 B7 五、發明說明(δ)Data Book. At the same time, the present invention is described using two well-known PAL and NTSC video signal standards. These two standards have similar timings but different numbers of inspection lines. As shown in the attached table of FIG. 2, a frame comparison between the ntsC video signal 110 and the PAL video signal 112 can be provided. The NTSC video signal 110 is defined as 525 horizontal lines per frame and 60 frames per second. The PAL video signal 112 is defined as 625 horizontal lines per frame and 50 frames per second. In Figure 2, B1F1 refers to the blank of field 1 B1F2 refers to the blank of block 2 B1F 10 refers to the blank covered by field 1 B1F20 refers to the blank covered by block 2 V1 refers to the blank of video image 1 V2 Refers to the block 2 of the video image. Fig. 3 is an example of a video output (VO) clock system 120, which is controlled by the V 0-CL 0 CK of the VO unit 12 0 CK temporary storage 12 2. The clock generator system includes a square wave "Direct Signal Synthesizer (DDS)" 124. The DDS 124 in this example provides a frequency range between 8 and 40 MHz with a resolution of 0.007 Hz. The output of the DDS 124 is sent to a phase-locked loop filter 126, which can eliminate the clock flicker phenomenon of the DDS 124 output signal. The DDS 124 is set with the VO-CLOCK register 122 so that the program can be designed to meet the following formula (1): -8-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please Read the note on the back? Matters before filling out this page) · i-line · 538631 A7 B7 V. Description of the invention (δ)

(1) FREQUENCYdds= 土HfLOp^FcPucLocK 圖4爲三個TM 1000暫存器的範例,分別爲VO_STATUS 暫存器130、VO—LINE暫存器132以及VI_STATUS暫存器 134。該VO_STATUS暫存器130爲唯讀性暫存器,可握持 目前像素位置値CUR—X 136以及CUR—Y 138。CUR—Y 138 對應於目前像素位置的橫行編號,而CUR_X 136則是對應 於在該橫行中該像素的位置。其橫行格式係編碼於 VO—LINE暫存器132内。而有關於VO—LINE暫存器132, 應要注意到: a) CUR—X 136之値係對應於水平空白區間,而位在〇與 VIDEO PIXEL START 140 之内; b) CUR_X 136之値係對應於作用視頻橫行,而位在 VIDEO PIXEL START 140 與 FRAME_WIDTH 142 之内。 一個視頻輸入(VI)週邊設備的可接取視頻輸入信號。其 中,可接取到包括了有VI_STATUS暫存器134以及其他輸 入與時鐘相位暫存器。時鐘相位暫存器(未於本圖中示出) 係以唯讀方式接取之。而該視頻輸入信號也可被分解爲兩 個欄位:CUR—X 144以及CUR—Y 146,分另》J對應於像素位 置的X與Y値。圖5中的表15〇可提供NTSC與PAL標準 初始化範例,特別是指初始化VO—LINE 152以及VO—CLOCK 154。在橫行 154 處,該 VO—CLOCK FREQUENCY 値對應 到27 MHz。該視頻輸入爲一數位視頻信號,且以CCIR 601 -9- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注音?事項再填寫本頁) _ --線· 經濟部智慧財產局員工消費合作社印製 538631 A7 B7 五、發明說明(7 ) (請先閱讀背面之注意事項再填寫本頁) 格式較佳。該輸入時鐘亦以相同格式編碼。一般説來,必 須注意到輸入頻率是無法直接加以測量的。因此,該輸入 及輸出相位乃成爲量測變數。F爲一欄位値,Freq爲頻率 ,FW爲訊框寬度,而VPS爲視頻像素起點。 經濟部智慧財產局員工消費合作社印製 在實驗階段上,可藉由圖6之排置設定,以TM 1000所 提供之「軟體發展環境(SDE)」來觀察該時鐘漂移問題。特 別是指使用包含在SDE裡的vivot展示程式而出現於 TriMedia IREF電路板160上的時鐘漂移問題。該排置包括 了用以產生輸入信號的攝像機164,觀看輸入信號的電視 機TV 166,一個用以測量漂移誤差的雙頻震盪器168 (頻 寬並不重要),兩條連接到IREF電路板160上的視訊纜線 170、172,以及兩條Y連接器180、182。該視訊纜線170 接收由該攝像機164所產生的信號,然後將其送到IREF電 路板160的VIDin插阜。該Y連接器180係用來在雙頻震 堡器16 8的第一個頻道上,以同時的方式觀察該信號。而 該視訊纜線172則是接收由該IREF電路板160之VIDout 插阜所產生的信號,然後將其顯示在電視機TV 166的螢幕 上。該Y連接器182係用來在雙頻震盪器168的第二個頻 道上來觀察該信號。該該視頻信號VIDin及VIDout均爲組 合視頻信號。 另外,該震盪器輸入也可以由該IREF電路板160的輸出 ,連接到S-視頻連接器的Luma腳針。該Luma腳針包括有 關於黑白電視信號的資訊。 要觀察該時鐘漂移問題,可在震盪器168上觀察水平同 -10- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 538631 A7 B7 五、發明說明(9 ) 、短波無線電等)實作之。 本發明之「時間基底式校正(TBC)」方法需要: (1) 一個初始化程序190 (tbclnit)來對演算法變數初始化,以 及設定一個初始相位; (2) —種量測程序192 (tbcGetPhase)可對現有階段進行測量 ;以及 (3) —個追縱程序194 (tbcAdjust)以便對輸出時鐘(VO—CLOCK) 進行週期性調整。 首先,呼叫一個初始化程序190,即tbclnit,以初始化 該TBC演算法之參數値。該變數及其對應之初始値顯示於 圖5内。如下列(2)式,藉由呼叫tbcGetPhase程序,即可設 定該偏値參數: (2) VOskew^bcGetPhase 其中由VO—CL0CKstart所提供的數値係作爲VO—CLOCK的 初士台値。該VO—CLOCKmin與0_CL0CKmax係分另)J對應於極 値。CPU時鐘頻率F CPUCLOCK 爲一個實驗性設定値,設定爲 100MHz。該VOgain因數爲演算法中對應於該收斂性之參數 〇 接著,在步驟192的tbcGetPhase程序處,將測量該現有 相位偏値。首先,VIphase和VOphase係根據下列關係式計算 而求得: -12- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) -|線_ 538631 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(ίο VOphase - CUR_X*FRAME_HEIGHTv〇+CUR_Y FRAME—HEIGHTV0*FRAME—WIDTHV0(1) FREQUENCYdds = HfLOp ^ FcPucLocK Figure 4 is an example of three TM 1000 registers: VO_STATUS register 130, VO_LINE register 132, and VI_STATUS register 134. The VO_STATUS register 130 is a read-only register and can hold the current pixel positions 値 CUR-X 136 and CUR-Y 138. CUR-Y 138 corresponds to the row number of the current pixel position, while CUR_X 136 corresponds to the position of the pixel in the row. The horizontal format is encoded in the VO_LINE register 132. Regarding the VO-LINE register 132, it should be noted that: a) the system of CUR-X 136 corresponds to the horizontal blank interval, and is located between 0 and VIDEO PIXEL START 140; b) the system of CUR_X 136 Corresponds to the action video horizontally, and lies within VIDEO PIXEL START 140 and FRAME_WIDTH 142. A video input (VI) peripheral device can receive video input signals. Among them, you can access VI_STATUS register 134 and other input and clock phase registers. The clock phase register (not shown in the figure) is accessed in read-only mode. And this video input signal can also be decomposed into two fields: CUR-X 144 and CUR-Y 146, respectively. "J" corresponds to X and Y 値 of the pixel position. Table 15 in FIG. 5 can provide initialization examples of the NTSC and PAL standards, and specifically refers to the initialization of VO-LINE 152 and VO-CLOCK 154. At line 154, the VO_CLOCK FREQUENCY 値 corresponds to 27 MHz. The video input is a digital video signal, and CCIR 601 -9- This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the note on the back? Matters before filling out this page) _ --Line · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 538631 A7 B7 V. Description of Invention (7) (Please read the notes on the back before filling this page) The format is better. The input clock is also encoded in the same format. In general, it must be noted that the input frequency cannot be measured directly. Therefore, the input and output phases become measurement variables. F is a field 値, Freq is the frequency, FW is the frame width, and VPS is the starting point of the video pixels. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. At the experimental stage, you can observe the clock drift problem with the "Software Development Environment (SDE)" provided by TM 1000 by using the arrangement settings in Figure 6. In particular, it refers to the clock drift problem that appears on the TriMedia IREF circuit board 160 using the vivo display program included in the SDE. The arrangement includes a camera 164 for generating input signals, a television TV 166 for viewing the input signals, a dual-frequency oscillator 168 for measuring drift errors (bandwidth is not important), two connected to the IREF circuit board Video cables 170 and 172 on 160, and two Y connectors 180 and 182. The video cable 170 receives the signal generated by the camera 164 and sends it to the VIDin of the IREF circuit board 160. The Y connector 180 is used to observe the signal in the same way on the first channel of the dual-frequency vibrator 16 8. The video cable 172 receives the signal generated by the VIDout plug of the IREF circuit board 160 and displays it on the screen of the TV 166. The Y connector 182 is used to observe the signal on the second channel of the dual-frequency oscillator 168. The video signals VIDin and VIDout are combined video signals. In addition, the oscillator input can also be connected to the Luma pin of the S-Video connector through the output of the IREF circuit board 160. The Luma pin includes information on black and white TV signals. To observe the clock drift problem, you can observe the same level on the oscillator 168 as -10- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 538631 A7 B7 V. Invention description (9), short-wave radio, etc.). The "Time Base Correction (TBC)" method of the present invention requires: (1) an initialization program 190 (tbclnit) to initialize algorithm variables and set an initial phase; (2)-a measurement program 192 (tbcGetPhase) Measurements can be performed on existing phases; and (3) a tracking program 194 (tbcAdjust) to periodically adjust the output clock (VO-CLOCK). First, an initialization program 190, tbclnit, is called to initialize the parameters 该 of the TBC algorithm. This variable and its corresponding initial frame are shown in Figure 5. As shown in the following formula (2), the bias parameter can be set by calling the tbcGetPhase program: (2) VOskew ^ bcGetPhase where the data provided by VO-CL0CKstart is used as the beginner platform of VO-CLOCK. This VO_CLOCKmin is related to 0_CL0CKmax, and J) corresponds to the pole 値. The CPU clock frequency F CPUCLOCK is an experimental setting, set to 100MHz. The VOgain factor is a parameter corresponding to the convergence in the algorithm. Next, at the tbcGetPhase procedure in step 192, the existing phase bias will be measured. First of all, VIphase and VOphase are calculated according to the following relationship: -12- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) -| Line_ 538631 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Invention Description (ίο VOphase-CUR_X * FRAME_HEIGHTv〇 + CUR_Y FRAME—HEIGHTV0 * FRAME—WIDTHV0

VI phase一VI phase one

CUR_X*FRAME_HEIGHTyi+CUR_Y FRAME HEIGHTvi*FRAME WIDTHVI 上式中的分子部分爲係對應於其位元位置之相位。除以 分母之後,即可得到一落於區間1及-1内的相位大小値。 因此,該時鐘偏値之範圍介於-1到1之間。該V0和Vi兩 者的視頻格式並不需要相同,但是可經適當格式轉換之後 組合使用。 在較佳的硬體實際做得中,將會需要使用單一乘法累加 器(MAC)。在這種實際做得裡的典型例子,將會使用一個 有限狀態機以分別計算VIphase和V0phase。該MAC也可以 應用於追蹤程序tbcAdjust裡。 步驟194的週期性追蹤程序tbcAdjust爲時間基底式校正 程序的核心。最好是採用三次方函數以進行調整,並且如 同前示,在實驗上爲最佳結果。首先藉由下式(3)決定一偏 値/相位差: (3) DIFF=(V0skew-V0phase) ^ V0gain. 該vogain參數爲一常數,可用於增加時間基底式校正程 序的(回應性)增益。增加該vogain値,可降低收斂的時間 ,並且讓該演算法能夠處理較大的相位差,而不會遺掉或 漏失訊框。而減低該vogain値,則可以提高敏感度與穩定 -13- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) -Γ----''---訂---------線一 538631 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(11 ) 度。可藉由例如像是本文前述之實驗性設定,來快速決定該 VOgain較合適之值,以觀察該收斂性。 接著,按照下列關係式(4),DIFF夾設於最大與最小界線 值之間: (4) DIFF=min(VO_CLOCKmax,max(VO—CLOCKmin,DIFF)). 該夾設是有其必要,以避免對VO_CLOCK值過度調整, 而造成色彩突波漏失。最後,在tbcAdjust階段,該時鐘頻 率係按照下式(5)計算而得: (5) VO—CL0CK=(1.0+DIFF)3*VO_CLOCKstart . 由圖5表中所提供的訊框寬度與高度,即可根據下式 (6) ,由時鐘相位來測出該時鐘偏值: (6) VOskew~ VOphase VIphase . 最新求得的數值會以下列關係式而被設定到VO_CLOCK 122暫存器内: (VO_CLOCK)=DIFF . 在步驟1 96之後,最好是用視頻輸入時鐘頻率,來以週 期性的方式而叫用該tbcGetPhase程序。不過,可在任何選 定週期時段内叫用該tbcGetPhase程序。例如,計時器中斷 也可以用於叫用該tbcGetPhase程序。 本發明的時間基底式校正方法之VCR應用,需要計算相 位的設備。應先選取一個取樣頻率,此為該基底像素頻率 -14- (請先閱讀背面之注意事項再填寫本頁) - 線· 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 538631 A7CUR_X * FRAME_HEIGHTyi + CUR_Y FRAME HEIGHTvi * FRAME WIDTHVI The molecular part in the above formula is the phase corresponding to its bit position. After dividing by the denominator, we can get a phase magnitude 落 that falls within the interval 1 and -1. Therefore, the clock bias ranges from -1 to 1. The video formats of V0 and Vi do not need to be the same, but they can be used in combination after being converted into appropriate formats. In better hardware implementations, a single multiply accumulator (MAC) will be required. In this typical example of practical implementation, a finite state machine will be used to calculate VIphase and V0phase, respectively. This MAC can also be used in the tracking program tbcAdjust. The periodic tracking program tbcAdjust of step 194 is the core of the time-based correction procedure. It is best to use a cubic function to make adjustments, and as shown previously, experimentally the best results. First, a bias / phase difference is determined by the following formula (3): (3) DIFF = (V0skew-V0phase) ^ V0gain. The vogain parameter is a constant and can be used to increase the (responsiveness) gain of the time-based correction procedure. . Increasing the vogain 値 reduces the convergence time and allows the algorithm to handle large phase differences without missing or missing frames. Decreasing the vogain 値 can improve sensitivity and stability-13- This paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling this page) -Γ ----''--- Order --------- Line 1 538631 A7 B7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of invention (11) Degree. You can quickly determine the more appropriate value of VOgain by, for example, the experimental settings described earlier in this article to observe the convergence. Then, according to the following relationship (4), DIFF is set between the maximum and minimum boundaries: (4) DIFF = min (VO_CLOCKmax, max (VO_CLOCKmin, DIFF)). The setting is necessary, so Avoid excessive adjustment of the VO_CLOCK value, which will cause color surge leakage. Finally, during the tbcAdjust phase, the clock frequency is calculated according to the following formula (5): (5) VO_CL0CK = (1.0 + DIFF) 3 * VO_CLOCKstart. The width and height of the frame provided by the table in Figure 5, The clock offset can be measured from the clock phase according to the following formula (6): (6) VOskew ~ VOphase VIphase. The newly obtained value will be set in the VO_CLOCK 122 register with the following relationship: ( VO_CLOCK) = DIFF. After step 96, it is best to use the video input clock frequency to call the tbcGetPhase program in a periodic manner. However, the tbcGetPhase program can be called during any selected period of time. For example, a timer interrupt can also be used to call the tbcGetPhase program. The VCR application of the time-based correction method of the present invention requires a device for calculating the phase. Should choose a sampling frequency first, this is the base pixel frequency -14- (Please read the precautions on the back before filling this page)-Line · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) ) 538631 A7

I整數分母,即橫行或是像素頻率。計算該相位値,會需 要及/或像素計數器設備,一般於VCR本身内均已提供。可 選擇任何分母値,其取捨即爲時鐘解析度與調整時段長度 兩者之間。 又 如此,即可以單變數之非線性函數來校正輸出與輸入時 鐘間的相位差。將該非線性函數計算結果多次施用於輸出 頻率參考,即視頻應用之橫行或是像素頻率。該校正値之 大小係決定於相位差的大小。然較佳的方法實可產生較迅 速的收敛與極佳的穩定性。 使用本方法可相當直接明瞭地達到將相位鎖定於特定點 之目的。由式(3)可知當底下條件符合時即可達到穩定性: V〇skew~ V Ophase 將VO skew設定爲任何所欲數値,會使本演算法收斂到該相 位上。所描述之演算法最適合處理相位之連續變化狀況。 在术些應用中’可说會出現非連續性相位跳躍,例如V c R 。這種非連續性相位跳躍,可由偵測在依照(4)式來計算 DIFF的過程中,是否出現下述狀況(a)或是(b)兩者之一而 偵測得知·· DIFF-VO_CLOCKmm 或是, DIFF 二 VO_CLOCKmax 在本發明硬體實作方面,可直接採用相關資料。 雖然本發明較佳之具體實施例係如上文所詳述,惟應明 -15- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 訂---------線· 經濟部智慧財產局員工消費合作社印製 538631I integer denominator, that is, horizontal or pixel frequency. Calculating this phase chirp requires and / or a pixel counter device, which is usually already provided in the VCR itself. You can choose any denominator. The trade-off is between the clock resolution and the length of the adjustment period. Again, a non-linear function of a single variable can be used to correct the phase difference between the output and input clocks. The result of this non-linear function calculation is applied to the output frequency reference multiple times, that is, the horizontal or pixel frequency of the video application. The magnitude of this correction is determined by the magnitude of the phase difference. However, the better method can produce faster convergence and excellent stability. Using this method can achieve the purpose of locking the phase to a specific point quite directly and clearly. It can be known from formula (3) that stability can be achieved when the following conditions are met: V〇skew ~ V Ophase Setting VO skew to any desired number 会使 will cause the algorithm to converge on this phase. The algorithm described is best suited to deal with continuous changes in phase. In some applications, it can be said that discontinuous phase jumps occur, such as V c R. This discontinuous phase jump can be detected by detecting whether the following conditions (a) or (b) occur in the process of calculating DIFF according to formula (4) ... DIFF- VO_CLOCKmm Or, DIFF 2 VO_CLOCKmax In the hardware implementation of the present invention, relevant data can be directly used. Although the preferred embodiment of the present invention is as detailed above, it should be noted that -15- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling (This page) Order-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 538631

五、發明說明(13 瞭於此陳述的基本發明概念之多種變化及/或修飾, 現於熟捻本項技藝之人士,而仍不脱離如同後附之 利範圍内所定義之本發明範圍。 在申請專利範圍内,任何置於括弧裡的參考符號 應1全釋爲該申請專利範圍之限制。至於「包括」其 不排除其他列於本申請專利範圍内而未出現之元素 驟。而各元素之前的「一」、「某一」其字義並不 出現多個該種元素之狀況。本發明可以由多個不同 組成足硬體方式,或是以適當程式設定之電腦而實 。在列舉出多種裝置或部分這些裝置的設備列表中 早一及相同硬體項目的方式實際做得。 仍可呈 申請專 ,均不 字義並 或是步 排除會 元素所 際做得 ’可以 ---------------— (請先閱讀背面之注意事項再填寫本頁} 0 線V. Description of the invention (13 Various changes and / or modifications to the basic inventive concepts stated herein are now available to those skilled in the art, without departing from the scope of the invention as defined within the scope of the appended claims. Within the scope of the patent application, any reference signs enclosed in parentheses shall be fully interpreted as a limitation of the scope of the patent application. As for "including", it does not exclude other elements listed in the patent scope of this application that do not appear. The word "one" and "one" before each element do not appear in the condition of multiple such elements. The present invention can be composed of a number of different hardware-based methods, or a computer set with an appropriate program. The method of enumerating multiple devices or some of these devices in the equipment list earlier and the same hardware item can actually be done. You can still submit an application for special, all words are not wordy, or you can do it step by step to exclude the elements of the club. ------------— (Please read the notes on the back before filling out this page) 0 Line

經濟部智慧財產局員工消費合作社印製 -16- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -16- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

538631 ϊ 089103385號專利申請案 t請圍替換本(92年4月、 六、申請專利範圍 ι入在—個由來源時鐘所控制之第-頻率上的輸 6二二及以在一個由輸出時鐘所控制之第二頻率上 下列步驟: ,化<万法’該方法包括 的時間基底式校正演算法變數進行初始化; d里來源時鐘與輸出時鐘之間的目前相位差· 0相應於目前相位量測值而調整輸出時鐘’及 d)週期性地重複步驟(b)與(C),· 其中步驟⑻與⑷係以時間基底式校正演算法予以執 行0 利範圍第1項之方法’其中該步驟⑷係採用一 個非線性函數進行。 訂 3. 如申請專利範圍第η之方法,其中該步驟(c)係採用一 個三次方函數進行。 4. 如申請專利範圍第η之方法,其中該步驟⑷係以超線 性方式來凋整該輸出時鐘頻率。 5. 如申請專利範圍第!項之方法,其中該步驟⑷在目前相 ^差值為低量時係以相對於目前相位差值而言相當小 I,而在目則相位差值為大量時係以相對於目前相位差 值而言相當大量的方式,來調整該輸出時鐘頻率。 6·如申請專利範圍第2項之方法,其中該量測步驟㈨包括 決定一個輸入相位與一個輸出柑位。 7·如申請專利範圍第6項之方法’其中該輸入相位係依照 在輸入訊框内目前輸入信號的位置而決定。 本紙張尺度適用中國國家標準(CNS) Α4規格(210X297公釐) 538631 A B c D 六、申請專利範圍 8. 如申請專利範圍第7項之方法,其中該目前輸入信號位 置,包括一個目前X位置(CUR—X)與一個目前y位置 (CUR_Y),而該輸入訊框包括一個訊框高度 (FRAME_HEIGHTVi) 以及一個訊 框寬度 (FRAME_WIDTHVI),並且該輸入相位係由下列關係式決 定: —CUR__X*FRAME_HEIGHTVi+CUR_Y Vlphase' FRAME_HEIGHTvi*FRAME_MDTHVi ° 9. 如申請專利範圍第7項之方法,其中該輸出相位係依照 在輸出訊框内目前輸出信號的位置而決定。 10. 如申請專利範圍第9項之方法,其中該目前輸出信號位 置,包括一個目前X位置(CUR_X)與一個目前y位置 (CUR_Y),該輸出訊框包括一個訊框高度 (FRAME—HEIGHTV0) 以及一個訊 框寬度 (FRAME_WIDTHV0),並且該輸出相位係由下列關係式決 定: _ CUR一X*FRAME_HEIGHTV0+CUR一 Y VUphase~ FRAME—HEIGHTV0*FRAME一WIDT^Ivo ° 11·如申請專利範圍第9項之方法,其中在該調整步驟(c) 處,係以自輸出相位扣除輸入相位,來決定該信號偏值。 12·如申請專利範圍第11項之方法,其中在該調整步驟(c) 處尚包括: i)決定一個偏值/相位差; -2- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) A B c D 538631 六、申請專利範圍 ii) 將該經決定之偏值/相位差夾設於最小及最大值之間; 及 iii) 依照該夾設之偏值/相位差而調整該輸出時鐘。 13. 如申請專利範圍第12項之方法,其中在該步驟(i)處, 該偏值/相位差係由信號偏值(VOskew)與輸出相位 (VOphase)之間的差值,再乘上一個增益因數(VOgain)所獲 得之乘精而所決定。 14. 如申請專利範圍第1 3項之方法,其中在該夾設步騾(ii) 處,該偏值/相位差(DIFF)以最小輸出時鐘相位 (VO_CLOCKmin)與最大輸出時鐘相位(VO_CLOCKmax) 為其上下界,如同下列關係式: DIFF=min(VO_CLOCKmax,max(VO-CLOCKmin,DIFF)) 〇 15. 如申請專利範圍第14項之方法,其中在該時鐘調整步 驟(iii)處,該輸出時鐘(VO—CLOCK)會相對於初始輸出 時鐘(V〇_CL〇CKstart),而按照下列關係式加以調整: V0_CL0CK=(1.0+DIFF)3*VO__CLOCKstart 〇 16·如申請專利範圍第12項之方法,其中該步驟(d)、(b)及 (c)處可重複地輸入時鐘頻率。 17. 如申請專利範圍第12項之方法,其中該步驟(d)、(b)及 (c)處可重複地回應計時器中斷。 18. —種可接收自來源時鐘所控制的第一頻率而提供之輸 入信號以及自輸出時鐘所控制的第二頻率而提供之輸 -3- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)Patent Application No. 538631 ϊ 089103385 Please replace this application (April, 1992, June, Patent application scope: Input 6-22 on a-frequency controlled by the source clock and output clock on a The following steps on the second frequency being controlled: 化 万 万 万 '' The method includes initialization of time-based correction algorithm variables; the current phase difference between the source clock and the output clock in d. 0 corresponds to the current phase Measure the value and adjust the output clock 'and d) Repeat steps (b) and (C) periodically, where steps ⑻ and ⑷ are performed using a time-based correction algorithm. This step is performed using a non-linear function. Revision 3. If the method of the patent application range n, wherein step (c) is performed using a cubic function. 4. The method as claimed in the patent application No. η, wherein the step is to linearize the output clock frequency in a super-linear manner. 5. Such as the scope of patent application! Method, in which the step ⑷ is relatively small with respect to the current phase difference value when the current phase difference value is low, and is compared with the current phase difference value when the phase difference value is large. There are quite a number of ways to adjust the output clock frequency. 6. The method of claim 2 in the patent application range, wherein the measuring step does not include determining an input phase and an output bit. 7. The method according to item 6 of the scope of patent application, wherein the input phase is determined according to the position of the current input signal in the input frame. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 538631 AB c D 6. Application for patent scope 8. For the method of applying for patent scope item 7, the current input signal position includes a current X position (CUR-X) and a current y position (CUR_Y), and the input frame includes a frame height (FRAME_HEIGHTVi) and a frame width (FRAME_WIDTHVI), and the input phase is determined by the following relationship: —CUR__X * FRAME_HEIGHTVi + CUR_Y Vlphase 'FRAME_HEIGHTvi * FRAME_MDTHVi ° 9. The method of item 7 of the patent application, wherein the output phase is determined according to the position of the current output signal in the output frame. 10. For the method according to item 9 of the patent application scope, wherein the current output signal position includes a current X position (CUR_X) and a current y position (CUR_Y), and the output frame includes a frame height (FRAME_HEIGHTV0) And a frame width (FRAME_WIDTHV0), and the output phase is determined by the following relationship: _ CUR_X * FRAME_HEIGHTV0 + CUR_Y VUphase ~ FRAME_HEIGHTV0 * FRAME_WIDT ^ Ivo ° 11. If the scope of patent application is the 9th The method of item, wherein at the adjustment step (c), the signal bias is determined by subtracting the input phase from the output phase. 12. The method according to item 11 of the scope of patent application, wherein the adjustment step (c) still includes: i) determining a bias value / phase difference; -2- This paper size applies the Chinese National Standard (CNS) A4 specification ( 210 X 297 mm) AB c D 538631 6. Patent application scope ii) Set the determined offset / phase difference between the minimum and maximum values; and iii) According to the set offset / phase difference Instead, adjust the output clock. 13. The method according to item 12 of the scope of patent application, wherein at step (i), the offset / phase difference is the difference between the signal offset (VOskew) and the output phase (VOphase), and then multiplied by The gain multiplied by a gain factor (VOgain) is determined. 14. The method according to item 13 of the scope of patent application, wherein at the step (ii), the offset / phase difference (DIFF) is a minimum output clock phase (VO_CLOCKmin) and a maximum output clock phase (VO_CLOCKmax) Its upper and lower bounds are as follows: DIFF = min (VO_CLOCKmax, max (VO-CLOCKmin, DIFF)) 〇 15. As the method of claim 14 in the scope of patent application, where at the clock adjustment step (iii), the The output clock (VO_CLOCK) will be adjusted relative to the initial output clock (V〇_CL〇CKstart) in accordance with the following relationship: V0_CL0CK = (1.0 + DIFF) 3 * VO__CLOCKstart 〇16 · If the scope of the patent application is the 12th item The method, wherein the steps (d), (b), and (c) can repeatedly input a clock frequency. 17. The method of claim 12 in which the steps (d), (b), and (c) are repeated in response to a timer interruption. 18. — A type of input signal that can be received from the first frequency controlled by the source clock and an input signal that is provided from the second frequency controlled by the output clock. -3- This paper standard applies to China National Standard (CNS) A4 specifications ( 210 X 297 mm) 申請專利範圍 出“號之裝置,其中該裝置包 一 輸入與輸出時鐘間相位差並有—個藉,執行可決定 !綠::數來調整輸出時鐘姨率的 同步處理=以數位方式來對輸入與輸-號= 艾羼理的數位時間基底校正器。 19.如申凊專利範圍第1 $項之 調整,置,八中該輸出時鐘頻率 式進行 之輸出乘上—個參考頻率的方 2〇·如申^利範圍第18項之裝置,其中該數位時間基底 校器僅包括有組合邏輯而並無包括緩衝區記憶體。 -4- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 538631 9L :u_. 24 第089l〇3385號專利申請案 中文圖式修正頁(91年10月) 120 124 126The scope of the patent application is "No. of devices, where the device includes a phase difference between the input and output clocks and one borrow, and execution can be determined! Green :: Synchronous processing to adjust the output clock rate = digitally Input and input-number = Digital time base corrector of Ai Lili. 19. If the adjustment of the 1st item in the patent scope of the application, set, the output of the output clock frequency formula in the eighth is multiplied by a reference frequency. 20. The device of item 18 in the scope of application, wherein the digital time base corrector only includes combinational logic and does not include buffer memory. -4- This paper standard applies to China National Standard (CNS) A4 specifications (210 X 297 mm) 538631 9L: u_. 24 No. 089l〇3385 Patent Application Chinese Schematic Correction Page (October 91) 120 124 126 圖3 31 27 19 15 11 3 0 130 VOJTATUS(r) V0_LINE(r/w) VLSTATUS(r) 1 1 i 1 i 1 1 1 i 1 1 CUR 一丫 (12) 1 1 i 1 1 1 1 1 1 1 i CUR 一X(12) 138」 136 J I 1 1 1 i 1 1 1 I 1 I I 1 I 1 1 1 1 1 1 i i ! I I 1 1 1 1 1 1 31 27 23 140 J 19 15 11 142- 7 ) 3 0 1 1 1 1 i 1 1 I 1 1 i CUR 一丫 (12) 1 1 1 I i 1 1 1 1 1 I CUR 一 X(12) 132 134 144^ 146- 圖 4 150 154 Reg F 525/60 625/50 VO—CLOCK Freq. 170A3D7〇h 170A3D70h VO—LINE FW 858 864 VPS 138 144Figure 3 31 27 19 15 11 3 0 130 VOJTATUS (r) V0_LINE (r / w) VLSTATUS (r) 1 1 i 1 i 1 1 1 i 1 1 CUR Yaya (12) 1 1 i 1 1 1 1 1 1 1 i CUR-X (12) 138 ″ 136 JI 1 1 1 i 1 1 1 I 1 II 1 I 1 1 1 1 1 1 ii! II 1 1 1 1 1 31 27 23 140 J 19 15 11 142- 7 ) 3 0 1 1 1 1 i 1 1 I 1 1 i CUR one yah (12) 1 1 1 I i 1 1 1 1 1 1 I CUR one X (12) 132 134 144 ^ 146- Figure 4 150 154 Reg F 525 / 60 625/50 VO—CLOCK Freq. 170A3D7〇h 170A3D70h VO—LINE FW 858 864 VPS 138 144 152 538631 ..9L 第089103385號專利申請案 中文圖式修正頁(91年10月)152 538631 .. 9L Patent Application No. 089103385 Chinese Schematic Correction Page (October 91) 初始化程序Initialization procedure > ν 量測程序 入__/192> ν Measurement program into __ / 192 t_ 追蹤程序t_ Tracker
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