TW535232B - Enhanced sacrificial layer etching technique for microstructure release - Google Patents

Abstract

A method for at least partially releasing microstructures from a substrate is provided. The method comprises the steps of: (a) providing a substrate (2); (b) depositing onto said substrate (2) a first layer (4) and a second layer (6), the first layer (4) and the second layer (6) each comprising an electrically conducting material and each having a different oxido-reduction potential; (c) electrically connecting the first layer (4) and the second layer (6); (d) forming a microstructure (8) on the first (4) and second (6) layers deposited in step (b) to produce an intermediate structure (10); and (e) electrochemically etching said second layer (6) by immersing the intermediate structure (10) formed in step (d) in an electrolyte (12).

Description

535232 A7 ___ B7 V. Invention 1 ~ ^ ~--'FIELD OF THE INVENTION The present invention is generally related to the formation of microstructures. More specifically, the invention relates to picking up or releasing microstructures. More specifically, the present invention relates to a release technology based on a sacrificial layer technology. BACKGROUND OF THE INVENTION Prior art sacrificial layer technology is very important in microengineering. It can release or pick up the entire structure or just a part that needs to be free-standing. The sacrificial material is used to "form" or "space" to make the desired shape and remove it later. In some cases, when a photoresist is used to define a pattern, it is a sacrificial layer because most of it is always removed. However, in the present text, the sacrificial treatment references are those used to make self-standing or lifting structures. Standard release techniques use chemical methods to remove layers by etching, for example, by plasma or wet etching techniques. This technique can lead to isotropic etching, so the side of the money etched under the sacrificial layer depends to a considerable extent on its thickness. Those sacrificial layers are generally in the micrometer range, and it is difficult or sometimes impossible to release a large structure. US-A-5286335 discloses a process that provides a thin film semiconductor with a pick-up thickness typically between 1 and 20 microns. The epitaxial layer is deposited on the sacrificial layer ('A1 As made of aluminum arsenide) on the growing substrate. After coating the epitaxial layer with a transparent carrier layer, the sacrificial layer is etched away to release the combination of the epitaxial layer and the transparent carrier layer from the grown substrate. Etching is done using a standard H F: Η 2 0 (1: 1 〇) etching electrolyte. US-A-5465 009 reveals a similar treatment, in which the pick-up is by consensus -4-^ paper wave scale suitable for wealth_ 家 鲜 (CNS) Α4 size (21GX 297 public love) " --- 535232 A7

, K device array to pattern the carrier layer and more easily. Because any sacrificial layer etching during the sacrificial layer etching must be performed at the maximum distance 'I, the interval between the devices, the time to release the device from the growing substrate is much shorter, fixed, and arrayed with the device. The size is irrelevant. The illustrated processing, σ, is suitable for operations ranging from sub-microns to tens of micrometers, possibly to $ 0 micrometers or even half of the 'body-visible segment'. The diameter can range from tens of micrometers to hundreds of micrometers, and can approach or even exceed 1 cm. However, in most cases, the etching time is very long compared to the large side etching required for the sacrificial layer thickness, which causes the risk of damaging the microstructure to be released. This is particularly k-like in examples where the device layer cannot be transmitted through. However, it is even impossible to engrav the underlying layer because of the difficulty in supplying unused etching solution to the etching interface. For the entire release of the device, one may be to use the viscosity of the interface between the device and the substrate when the device is pulled up. However, it is difficult to control the special level of adhesion on the interface, because adhesion must be, on the other hand, good enough to handle the structure before picking up, and, on the other hand, thin enough to release the structure. Furthermore, certain chirp controls are extremely sensitive to parameters. SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a simple method to release the microstructure of a matrix, avoiding the disadvantages of known processes. Yet another object of the present invention is to provide a method for enhancing the under-etching of a microstructure by increasing the etching rate of a sacrificial layer. ^ Yet another object of the present invention is to provide a method that allows the electrical etching of a sacrificial layer.

535232 V. Description of the invention (without the need for additional power supply.) These and other objectives and advantages can be achieved by the method of applying for the first one of the scope of the patent application. Inquire about the preferred specific examples of the present invention It will be explained in the related patent application scope. Brief description of the diagram °-The preferred specific examples of the present invention will be described in more detail later, by way of example only, and accompanying diagrams, where: Figure 1A The steps of the 1C outline display process make a part of the microstructure stand on its own or are completely released from the matrix, according to the method of the present invention; Figures 2A to 2C are schematic illustrations of an uneven substrate and Figure 1 8 to 1 different processing steps; Figures 3 A and 3B outline the processing steps used to etch very thin pre-structured sacrificial materials according to the method of the present invention; Figure 4 outlines the structural configuration in a suitable electrolyte, According to the method of the present invention; and to describe the complete picking up of the large earthen element plastic tip array, according to the present process. Detailed description of the preferred specific examples The present invention is to find the surname engraving rate that facilitates the use of enhanced sacrificial layers The release of the microstructure is achieved by the electrolyte without the need for an external power supply. The microstructure can include microelectronics and / or mechanical devices or similar. In addition, the term "microstructure" is not limited to the micrometer range Structures "but-like, meaning very small structures" such as nano-range structures (nano structures) and the like. However, in the following, the term "microstructure" will be used as a set of all types of structures. %) Applicable to China National Standard (CNS) M specification (2 $ 535232 A7

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The layers of the electrical connection are immersed in a suitable electrolyte, that is, a steam environment, thus forming a DC battery, generating a sufficiently high potential to name or increase the name of the anode. This is shown in Figure 4. In a particularly preferred embodiment of the present invention, the electrolytic solution used is an acidic solution which is known to be used for the anode material. Depending on the materials used and the chemical characteristics of the electrolyte, the difference in electrode potential can change and increase the etch rate of the sacrificial layer or an increase that does not generally occur. ^, If the semiconductor is used as the anode (for example, Shi Xi, Shi Xizuo or broken gallium), electrochemical etching can be enhanced by light generated by electron-holes in semiconductors. It is observed that the etching enhancement is several times higher than that of chemical wet etching, so that the connection structure of several centimeters can be successfully released. When this double-layer conductive material is deposited on the substrate under the microstructure to be released, the anode portion of the DC battery (the lower redox potential layer) is treated as a sacrificial layer and etched from one side of the microstructure that supports rapid underlayer etching. Can cause rapid release of microstructures, as illustrated in Figure 1. It is worth noting that the film can be very thin (approximately in the range of 10 nm) and reproduce a very well-controlled and fast underlayer etch, which is also suitable for thin gap formation. This is useful in situations where the structure is not expected to be fully lifted, and a part of the structure is not guided thereby creating a gap between the structure and the matrix. Another advantage is that the matrix need not be flat, so devices made on pre-structured matrices can also be released, as shown in Figures 2A to 2C. This sacrificial layer technology can also be used in the transfer of structure, from any easy. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm).

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Part of the treated material matrix. It allows the release of the entire device or only any material-D π ~ N < Na Ling processing steps. First, provide-Matrix 2. This substrate may contain suitable materials such as silicon, glass, crystal ceramics, plastics and the like. This matrix need not be smooth and can be of any shape. In the next step, two layers 4 and 6 of conductive material are deposited on the substrate. One layer contains materials with high redox potential, such as metal such as gold, handle, surface, silver, copper, and so on. This layer 4 will, in the following, serve as the cathode. The second layer 6 contains a material having a lower redox potential than the layer 4, for example, aluminum, zinc, chromium, iron, cobalt, and the like. The second layer will be referred to as an anode below. The two layers must be deposited in such a way that there is an electrical contact between them. In the preferred embodiment of the invention, the cathode is deposited first and the anode, which is then treated as a sacrificial layer, is then deposited on top of the anode, so the cathode It does not release as the microstructure is picked up. After the two electrodes are deposited on this substrate 2, the microstructures 8 to be released are formed on top of this structure, by standard deposition and structural technology of the material constituting the desired structure (Fig. 1A). Next, the second layer 6 will be electrochemically etched when the structure is soaked 10 to a suitable electrolyte 12 as shown in FIG. 4. The electrolyte 2 can contain a solution or a steam environment. Therefore, the formation of a DC battery produces an electrical potential high enough to be used as an anodic etch for the sacrificial layer, which can occur or be sharply enhanced. This paper size applies to China National Standard (CNS) Α4 (210 X 297 mm)

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535232 A7 __B7 V. Description of the invention (7 ^ " Figure 1B shows that only a part of the microstructure 8 of the final product has been released from the matrix, and Figure 1C shows the release of the complete microstructure 8. Figure 2 A to 2C A brief description of the same processing steps for an uneven substrate 2. The processing shown in Figures 1 and 2 can also be used to define very thin cavities or channels under a microstructure, by sacrificing material with a very thin desired structure, As shown in Figures 3A and 3B. The sacrificial material is first structured to define the part that needs to be released. Therefore, microchannels 4 and gaps 16 of controlled size can be produced. It will be found that the specific examples of the present invention are specific Although it does not exclude the manufacture of similar devices that can be used in suspension coils of mechanical oscillators, micro switches, cantilever beams, micro fluidic channels, micro brakes, RF circuits. The present invention can be used in many release processes, utilizing micro-motor structures (MEMS), integrating optics or microelectronics. Figure 5 shows, for example, the complete release of a large optical plastic tip array of 1.6 X 6 mm. When used in a flip-chip process, an example of the present invention Allows integration of any type of microfabricated structure or device onto other microstructures or microdevices, even if their technologies are incompatible (MEMS, Integrated Optics, CMOS, III-V, Si-Ge, etc.). Integrating light, for example in school, it is possible to combine different devices from different technologies on different substrates (waveguides, lenses, deflectors, detectors or microlenses, laser semiconductors and the like). A possible application is to integrate cantilever beams on C μ os wafers. Constructing cantilever beams on C M 0 S wafers (post c M 0 S) actually limits this process to be used on the MEMS part and also adds some issues of production A simple process would be to separately manufacture the CMOS circuit and the MEMS part. The entire -10-this paper size applies to the Chinese National Standard (CNS) A4 specification (210X29 ^ 5 ^ ----- 535232 A7 B7 V. Description of the invention The cantilever beam array will then be released and tipped, overturned, onto the CMOS chip. In this example, it is desirable to have a well-controlled joystick pick up. Therefore 'the preferred embodiment of the present invention is particularly suitable for this process. Oxy Lipid-based Scanning Proximity-Field Optical Microscopy (SNOM) probes have been made with photosensitive epoxy-based resin resists. They were previously engraved with silicon-corner molds to form the tips. Once the epoxy group is made Resin probe, fiber is introduced into the guide structure and adhered. The entire structure is then taken from the substrate. This can be achieved by etching the sacrificial layer. In this case, the interface is designed with an Au layer, a chromium layer, and an oxide layer And an aluminum layer after 100 nm. The aluminum layer is used as an optical coating on the tip of the SNOM to avoid optical loss of light down to the apex of the tip. This chrome-gold layer forms a DC battery with chromium as the anode. Carved by last name. The oxide layer of this button is a dielectric film, which is an electrically insulating film to prevent the formation of a second DC battery (made of a gold film and an aluminum film). In this case, it will cause undesirable aluminum etching in different ways. -11-This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) " 一 ^ '--------

Claims (1)

32 32 ^ Patent Application No. 090122886 Chinese Application Patent Scope Replacement (March 1992) Patent Application Scope L A method for releasing the microstructure (8) from at least the substrate (2) part, which includes the steps: " a ) Provide a substrate (2); b) deposit a first layer (4) and a second layer (6) on the substrate (2), each of the first layer (4) and the second layer (6) Contains electrically conductive materials and each has a different redox potential; c) electrically connects the first layer (4) and the second layer (6); d) the first and second (6) layers deposited in step (b) ) To form a microstructure (8) on the layer to generate an intermediate structure (丨 〇); and ㈣ electrochemical (the second layer) ′ by soaking the intermediate structure (10) formed in step d) in the electrolyte (12) in. 2. The method of claim β, wherein the first rhenium and second rhenium layers are sequentially deposited and electrically connected before forming the microstructure (8). 3.2 2nd patent application scope! The method of clause, wherein the substrate comprises a package. Silicon, glass, quartz, ceramics, plastics, etc. selected _ materials. 4 .: The method of applying for the second item of the patent scope, wherein the substrate ⑺ includes one selected from the group of quartz, material, plastic, etc. 5. If the scope of the patent application is μ or 4 Is flat. With base material (2) A8 B8 C8 Patent Application ____ D8 ® _ ^-Including gold, platinum, palladium, silver and copper. 8 • The method of claim 1, 2, 3 or 4 wherein the second layer (6) contains one or more metals selected from the group consisting of aluminum, zinc, chromium, iron and cobalt. • The method of claim 1, 2, 3 or 4 in which the layer contains a conductor or a doped semiconductor. • The method of claim 1, 2, 3, or 4 in which the first layer (4) has a higher redox potential than the second layer (6). • The method of claim 1, 2, 3 or 4 in which the first layer (4) is used as a cathode. 12. The method of claim 1, 2, 3 or 4 in which the second layer (6) is treated as an anode. 13. The method according to item 1, 2, 3 or 4 before the scope of patent application, wherein the first (4) and the second (6) layers form a collective DC battery when immersed in an electrolyte (.12) Time. 14. The method of claim 1, 2, 3, or 4, which includes forming one or more microchannels, cavities (14), and gaps (16) under the microstructure (8). The method of claim 1, 2, 3, or 4, wherein the microstructure (8) includes a microelectronic device. This paper size applies to China National Standard (CNS) A4 (210X 297 mm)