TW528948B - Memory module having buffer for isolating stacked memory devices - Google Patents

Memory module having buffer for isolating stacked memory devices Download PDF

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Publication number
TW528948B
TW528948B TW090122785A TW90122785A TW528948B TW 528948 B TW528948 B TW 528948B TW 090122785 A TW090122785 A TW 090122785A TW 90122785 A TW90122785 A TW 90122785A TW 528948 B TW528948 B TW 528948B
Authority
TW
Taiwan
Prior art keywords
memory
buffer
patent application
item
bus
Prior art date
Application number
TW090122785A
Other languages
English (en)
Chinese (zh)
Inventor
John B Halbert
Randy M Bonella
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/666,528 external-priority patent/US6487102B1/en
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of TW528948B publication Critical patent/TW528948B/zh

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
TW090122785A 2000-09-14 2001-09-13 Memory module having buffer for isolating stacked memory devices TW528948B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US23259600P 2000-09-14 2000-09-14
US09/666,528 US6487102B1 (en) 2000-09-18 2000-09-18 Memory module having buffer for isolating stacked memory devices

Publications (1)

Publication Number Publication Date
TW528948B true TW528948B (en) 2003-04-21

Family

ID=26926151

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090122785A TW528948B (en) 2000-09-14 2001-09-13 Memory module having buffer for isolating stacked memory devices

Country Status (6)

Country Link
EP (1) EP1320804A2 (fr)
KR (1) KR100554081B1 (fr)
CN (1) CN1484833A (fr)
AU (1) AU2001289067A1 (fr)
TW (1) TW528948B (fr)
WO (1) WO2002025454A2 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6745268B1 (en) 2000-08-11 2004-06-01 Micron Technology, Lnc. Capacitive multidrop bus compensation
US20050289316A1 (en) * 2004-06-24 2005-12-29 David Durham Mechanism for sequestering memory for a bus device
KR100763352B1 (ko) * 2005-05-10 2007-10-04 삼성전자주식회사 전용 데이터 및 컨트롤 버스들을 사용하는 메모리 시스템, 모듈들, 컨트롤러들 및 방법들
US7577760B2 (en) 2005-05-10 2009-08-18 Samsung Electronics Co., Ltd. Memory systems, modules, controllers and methods using dedicated data and control busses
US11328764B2 (en) 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US7562271B2 (en) 2005-09-26 2009-07-14 Rambus Inc. Memory system topologies including a buffer device and an integrated circuit memory device
US7464225B2 (en) 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
US8516185B2 (en) * 2009-07-16 2013-08-20 Netlist, Inc. System and method utilizing distributed byte-wise buffers on a memory module
US8582373B2 (en) 2010-08-31 2013-11-12 Micron Technology, Inc. Buffer die in stacks of memory dies and methods
KR20180004562A (ko) * 2016-07-04 2018-01-12 에스프린팅솔루션 주식회사 전자 장치

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970003915B1 (ko) * 1987-06-24 1997-03-22 미다 가쓰시게 반도체 기억장치 및 그것을 사용한 반도체 메모리 모듈
US5270964A (en) * 1992-05-19 1993-12-14 Sun Microsystems, Inc. Single in-line memory module
IN188196B (fr) * 1995-05-15 2002-08-31 Silicon Graphics Inc
EP1036362B1 (fr) * 1997-12-05 2006-11-15 Intel Corporation Systeme de memoire du type a module de memoire equipe d'un controleur de module de memoire

Also Published As

Publication number Publication date
KR20030048036A (ko) 2003-06-18
CN1484833A (zh) 2004-03-24
KR100554081B1 (ko) 2006-02-22
AU2001289067A1 (en) 2002-04-02
WO2002025454A3 (fr) 2002-08-22
WO2002025454A2 (fr) 2002-03-28
EP1320804A2 (fr) 2003-06-25

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