TW526570B - Printed wiring base material and electrolytic tin-base alloy plating method - Google Patents

Printed wiring base material and electrolytic tin-base alloy plating method Download PDF

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Publication number
TW526570B
TW526570B TW091100971A TW91100971A TW526570B TW 526570 B TW526570 B TW 526570B TW 091100971 A TW091100971 A TW 091100971A TW 91100971 A TW91100971 A TW 91100971A TW 526570 B TW526570 B TW 526570B
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TW
Taiwan
Prior art keywords
tin
based alloy
plating
alloy plating
item
Prior art date
Application number
TW091100971A
Other languages
Chinese (zh)
Inventor
Yasunori Matsumura
Hideaki Makita
Original Assignee
Mitsui Mining & Amp Smelting C
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Publication of TW526570B publication Critical patent/TW526570B/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/188Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Wire Bonding (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

The purpose of the invention is to provide a printed wiring base material having tin-base alloy plating to obviate the production of lance-like deposits and an electrolytic tin-base alloy plating method. The printed wiring base material includes the followings: an insulating base material 11; the wiring patterns 12 formed from conductive layers 20 on one surface of the insulating base material 11; and tin-base alloy plating layers 25 consisting of tin-base alloy in at least portions of the wiring patterns 12. The average plating film grain size of the tin-base alloy plating layers 25 is smaller than 2 μm.

Description

526570 A7 ^_ B7 五、發明説明(1 ) (發明所屬之技術領域) (請先閱讀背面之注意事項再填寫本頁) 本發明係關於一種於使用於實裝電子零件所用的配線 圖案之至少一部分施以錫系合金鍍的印刷配線基材及對於 印刷配線基材之電解錫系合金鍍方法。所謂印刷配線基材 係指使用硬質之絕緣基板的剛性配線基材成將具可撓性之 薄膜作爲絕緣基板的可撓性配線基板,作爲可撓性配線基 材係可例舉使用於 T A B ( Tape Automated Bonding )、 C 0 F (Chip On Film) Λ C S P (Chip Size Package) B G A ( Ball Grid Array ) 、// — B G A ( " -Ball Grid Array) 、F C (Flip Chip) 、Q F P (Quard Flat Package )等輸送用膠帶。 (習知技術) 隨著電子產業之發達,實裝I C (積體電路)、 經濟部智慧財產局員工消費合作社印製 LSI (大規格積體電路)等之電子零件的印刷配線板之 需要急激地增加,惟期盼電子機器之小型化、輕量化、高 功能化,作爲此些電子零件之實裝方法,在最近使用 TAB帶、C〇F帶、CSP帶之輸送用膠帶的實裝方式 被採用。 一般,此種印刷配線基材中之可撓性配線基材係在連 續之絕緣薄膜上,將金屬箔藉由黏接,施以疊合成濺散或 真空蒸鑛法或無電解銅鍍設置極薄導電層,而在該導電層 上經施以電氣銅鍍之過程來製作多層基板,將所製作之多 層基板藉微影成像法形成所定圖案之後,再藉由進行表面 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) -4- 526570 A7 B7 五、發明説明(2) 精修電鍍所製造。該可撓性配線基材係成爲在絕緣薄膜上 具有導體層及導電層表面精修用之電鑛層所構成的配線圖 案者。 作爲依此種電鍍的鍍層,使用錫成錫合金所構成的錫 系合金。例如,一般習知就使用鍚-鉛合金,又,藉由國 際性之鉛自由化,代替錫-鉛合金而使用錫一鉍合金等。 (發明欲解決之課題) 在此種錫系合金之電鍍中,有從配線圖案朝面方向發 生多數槍狀析出物之問題。例如第1 1圖及第1 2圖所示 地’在未設置光阻劑0 1之區域發生有複數槍狀析出物 0 3成爲突出於排列之配線端子0 2之寬度方向。該槍狀 析出物0 3係較長者有成爲5 0 // m以上之故,’因而在端 子間也發生短路之情形,而有大幅度地降低良品率之問題 。此種問題,係特別在高密度化之配線圖案中成爲致命性 問題,容易地預料深刻影響及於良品率。 本發明係提供一種具有不會發生槍狀析出物之錫系合 金鍍的印刷配線基材及電解錫系合金鍍方法。 (解決課題所用之手段) 解決上述課題之本發明之第一態樣,屬於具備絕緣棊 材,及於該絕緣基材之一方面從導電層所形成的配線圖案 ,於上述配線圖案之至少一部分具備錫系合金所構成之錫 系合金鍍層的印刷配線基材,其特徵爲:上述錫系合金鍍 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) 衣— (請先閱讀背面之注意事項再填寫本頁) .--V- · 訂 經濟部智慧財產局員工消費合作社印製 -5- 526570 A7 ____B7 五、發明説明(3) 層之平均鍍被膜粒徑爲2 # m以下者。 在該第一態樣中,錫系合金鍍層之平均鍍被膜粒徑在 2 // m以下之故,因而幾乎不會發生槍狀析出物,也不會 有配線端子間之短路之虞者。 本發明之第二態樣係在第一態樣中,上述錫系合金鍍 層之鍍厚爲3 5 // m以下,爲其特徵的印刷配線基材。 在該第二態樣中,錫系合金鍍層之鍍厚爲3 . 5 // m 以下之故,因而更難發生槍狀析出物。 本發明之第三態樣係在第一或第二態樣中,上述錫系 合爲錫-鉍合金,爲其特徵的印刷配線基材。 在該第三態樣中,在錫-鉍合金所構成之配線圖案幾 乎不會發生槍狀析出物。 本發明之第四態樣係在第一或第二態樣中,上述絕緣 基材爲具有可撓性之薄膜,爲其特徵的印刷配線基材。 在該第四態樣中,成爲具有不會發生槍狀析出物之鍚 系合金鍍層的可撓性配線基材。 本發明之第五態樣係在第一或第二態樣中,上述錫系 合金鍍層爲藉由施加脈衝電壓之電解鍍所形成者,爲其特 徵的印刷配線基材。 在該第五態樣係藉由施加脈衝電壓之電解鍍,容易形 成平均鍍被膜粒徑爲2 // m以下之錫系合金鍍層,而有效 地防止發生槍狀析出物。 本發明之第六態樣,係一種電解錫系合金鍍方法,其 特徵爲:在印刷配線基材之配線圖案之至少一部分形成鍚 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 一 ^ -6- —an' —Βϋ -yl ml a-——· Is— mmmm (請先閱讀背面之注意事項再填寫本頁)526570 A7 ^ _ B7 V. Description of the invention (1) (Technical field to which the invention belongs) (Please read the precautions on the back before filling out this page) The present invention relates to at least one wiring pattern used for mounting electronic parts. A printed wiring substrate to which tin-based alloy plating is applied in part and an electrolytic tin-based alloy plating method for the printed wiring substrate. The printed wiring substrate refers to a rigid wiring substrate using a rigid insulating substrate, and a flexible wiring substrate having a flexible thin film as an insulating substrate. As a flexible wiring substrate, it can be used for example in TAB ( Tape Automated Bonding), C 0 F (Chip On Film) Λ CSP (Chip Size Package) BGA (Ball Grid Array), // — BGA (" -Ball Grid Array), FC (Flip Chip), QFP (Quard Flat Package). (Know-how) With the development of the electronics industry, the need for printed wiring boards for mounting electronic components such as ICs (integrated circuits), printed consumer electronics cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, and printed LSIs (large-scale integrated circuits) has been rapidly increasing. Increase in the number of places, but expecting the miniaturization, light weight, and high functionality of electronic equipment. As a method of mounting these electronic parts, TAB tapes, COF tapes, and CSP tapes have recently been used as a method of mounting. Adopted. Generally, the flexible wiring substrate in such printed wiring substrates is on a continuous insulating film. The metal foil is adhered and laminated by sputtering, vacuum evaporation, or electroless copper plating. A thin conductive layer is formed on the conductive layer through a process of applying electrical copper plating, and the prepared multilayer substrate is formed into a predetermined pattern by a lithography imaging method, and then the surface is applied to the Chinese standard of this paper. Standard (CNS) A4 specification (210X 297 mm) -4- 526570 A7 B7 V. Description of the invention (2) Manufactured by the refined electroplating plant. This flexible wiring substrate is a wiring pattern composed of an insulating film having a conductive layer and an electric ore layer for surface finishing of the conductive layer. A tin-based alloy composed of tin-tin alloy is used as the plating layer by such plating. For example, it is common practice to use rhenium-lead alloys, and to use tin-lead alloys instead of tin-lead alloys in accordance with international lead liberalization. (Problems to be Solved by the Invention) In the electroplating of such a tin-based alloy, there is a problem in that a large number of gun-like precipitates occur from the wiring pattern toward the surface. For example, as shown in Fig. 11 and Fig. 12, a plurality of gun-shaped precipitates 0 3 occur in the area where the photoresist 0 1 is not provided, and the width direction of the wiring terminals 02 protruding from the array. The reason why the gun-like precipitate 0 3 is longer is 50 0 // m or more, so that a short circuit may occur between the terminals, and there is a problem that the yield is greatly reduced. Such a problem is a fatal problem especially in a high-density wiring pattern, and it is easy to expect a profound influence on the yield. The present invention provides a printed wiring substrate and an electrolytic tin-based alloy plating method having tin-based alloy plating without gun-like deposits. (Means for Solving the Problem) A first aspect of the present invention that solves the above-mentioned problems is a wiring pattern including an insulating base material and a conductive layer formed on one side of the insulating base material, and at least a part of the wiring pattern. A printed wiring substrate having a tin-based alloy plating layer made of a tin-based alloy, characterized in that the above-mentioned tin-based alloy plating paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). Clothing — (please first Read the notes on the back and fill in this page). --V- · Order printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs -5- 526570 A7 ____B7 V. Description of the invention (3) The average particle diameter of the coating is 2 # Those below m. In this first aspect, because the average plating particle diameter of the tin-based alloy plating layer is 2 // m or less, gun-like precipitates hardly occur, and there is no possibility of short-circuiting between wiring terminals. According to a second aspect of the present invention, in the first aspect, the above-mentioned tin-based alloy plating layer has a plating thickness of 3 5 /// m or less, and is a printed wiring substrate having the characteristics. In this second aspect, because the plating thickness of the tin-based alloy plating layer is 3.5 mm / m or less, it is more difficult to generate gun-shaped precipitates. In a third aspect of the present invention, in the first or second aspect, the above-mentioned tin system is a tin-bismuth alloy, which is a printed wiring substrate having characteristics. In this third aspect, almost no gun-like precipitates occur in the wiring pattern composed of a tin-bismuth alloy. A fourth aspect of the present invention is the first or second aspect, wherein the insulating base material is a flexible thin film, and is a printed wiring base material having characteristics. In this fourth aspect, it is a flexible wiring substrate having a hafnium-based alloy plating layer in which gun-like precipitates do not occur. In a fifth aspect of the present invention, in the first or second aspect, the above-mentioned tin-based alloy plating layer is formed by electrolytic plating applied with a pulse voltage, and is a characteristic printed wiring substrate. In this fifth aspect, by electrolytic plating with a pulse voltage applied, a tin-based alloy plating layer having an average plating film particle diameter of 2 // m or less is easily formed, and gun-like precipitates are effectively prevented from occurring. A sixth aspect of the present invention is an electrolytic tin-based alloy plating method, which is characterized in that at least a part of the wiring pattern of the printed wiring substrate is formed. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm). ) ^ -6- —an '—Βϋ -yl ml a -—— · Is— mmmm (Please read the precautions on the back before filling this page)

,1T 經濟部智慧財產局員工消費合作社印製 526570 A7 _ _B7 五、發明説明(4) 系合金所構成的錫系合金鍍層時,於鍍電極間施加脈衝電 壓。 (請先閲讀背面之注意事項再填寫本頁) 在該第六態樣中,藉由施以施加脈衝電壓之電解鍍, 形成有能有效地防止發生槍狀析出物之錫系合金鍍層。· 本發明之第七態樣係在第六態樣中,爲了在上述鍍電 極間施加脈衝電壓,使用規則性地斷續直流電壓的截波器 ,爲其特徵之電解錫系合金鍍方法。 在該第七態樣中,藉由使用規則性地斷續直流電壓的 截波器,可較容易地施加脈衝電壓。 本發明之第八態樣係在第六或第七之態樣中,上述脈 衝電壓係施加成對於整體施加時間之通電時間之比的作用 比D爲1 / 2以下,爲其特徵之電解錫系合金鍍方法。 在該第八態樣中,藉由上述脈衝電壓施加成作用比D 爲1 / 2以下,形成能有效地防止發生槍狀析出物之錫系 合金鍍層。 經濟部智慧財產局員工消費合作社印製 本發明之第九態樣係在第六或第七之態樣中,上述脈 衝電壓係施加成對於整體施加時間之通電時間之比的作用 比D爲1 / 3以下,爲其特徵之電解錫系合金鍍方法。 在該第九態樣中,藉由上述脈衝電壓施加成作用比D 爲1 / 3以下,形成能有效地防止發生槍狀析出物之錫系 合金鍍層。 本發明之第十態樣係在第六或第七之態樣中,將上述 錫系合金鍍層之平均鍍被膜粒徑作成2 // m以下,爲其特 徵之電解錫系合金鑛方法。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) —~" 526570 A7 _B7 _ 五、發明説明(5) (請先閲讀背面之注意事項再填寫本頁) 在該第十態樣中,施以施加脈衝電壓之電解鍍而藉由 將錫系合金鍍層之平均鍍被膜粒徑作成2 // m以下,形成 成能有效地防止發生槍狀析出物之錫系合金鍍層。 本發明之第十一態樣係在第六或第七之態樣中,將上 述錫系合金鍍層之鍍厚作成3 5 // m以下,爲其特徵之電 解錫系合金鍍方法。 在該第十一態樣中,施以施加脈衝電壓之電解鍍而藉 由使得錫系合金鍍層之鍍厚作成3 5 // m以下,形成能有 效地防止發生槍狀析出物之錫系合金鍍層。 本發明之第十二態樣係在第六或第七之態樣中,藉由 將上述印刷配線基材之一部分以浸漬於鍍液之狀態下施加 脈衝電壓,於上述配線圖案之一部分形成上述錫系合金鍍 _層,爲其特徵之電解錫系合金鍍方法。 在該第十二態樣中,僅於印刷配線基材之配線圖案之 一部分可容易地形成錫系合金鍍層。 經濟部智慧財產局員工消費合作社印製 本發明之第十三態樣係在第六或第七之態樣中,上述 印刷配線基材係在具有可撓性之薄膜所構成的絕緣基材上 具有上述配線圖案,爲其特徵之電解錫系合金鍍方法。 在該第十三態樣中,可製造具有不會發生槍狀析出物 之錫系合金鍍層的可撓性配線基材。 (發明之實施形態) 以下,一起說明本發明之一實施形態的可撓性配線基 材之製造方法及使用例子。當然,本發明係並不被限定於 i紙張尺度適用帽@家絲(CNS ) A4規格(21GX297公釐) ~ ' -8 - 526570 A7 _ B7 五、發明説明(6) 此者。 在第1 .圖表示實施形態之一可撓性配線基材的槪略俯 (請先閱讀背面之注意事項再填寫本頁) 視® ;在第2圖表示實裝電子構件之狀態的A - A >剖視 圖。 如第1圖及第2圖所不,本實施形態之可撓性配線基 材1 0係T A B帶,於帶狀絕緣薄膜1 1之一方面,連續 地形成有複數配線圖案1 2。絕緣薄膜1 1係以一定間隔 具有移送用之鏈輪孔1 3於軸方向兩側,一般地,一面移 送〜面實裝有I C等電子零件3 0,實裝電子零件3 0之 後,被切斷成每一各配線圖案1 2。此種可撓性配線基材 1 〇係爲電子零件3 0被實裝之後,切斷成每一各配線圖 案1 2之情形,與切斷成每一各配線圖案之後,電子零件 3 0被實裝之情形。又,帶狀狀態之情形,或切斷成每一 各配線圖案1 2之情形,均爲可撓性配線基材1 〇,而不 管有沒有有實裝電子零件。 經濟部智慧財產局員工消費合作社印製 又,在絕緣薄膜1 1之寬度方向兩端部,設有鏈輪孔 1 3,惟形成有在絕緣薄膜1 1與鏈輪孔1 3 —起對位所 用的貫通孔,配合不良封裝體顯示,封裝體外形等各種目 的的貫通孔也可以。 配線圖案1 2係具備:與實裝電子零件3 0連接之元 件側連接端子1 4,及與外部連接之輸入側連接端子1 5 及輸入側外部連接端子1 6 ;除了此些之領域,藉由浸銲 劑光阻劑層1 7所覆蓋。 作爲絕緣薄膜1 1 ,可使用具有可撓性之同時具有耐 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) -9· 526570 A7 B7 五、發明説明(7) (請先閱讀背面之注意事項再填寫本頁) 藥品性及耐熱性之材料。作爲該絕緣薄膜1 1之材料,可 列舉聚酯' 聚醯胺、聚醯亞胺等,特別是具有聯苯骨格的 全芳香族聚醯胺〔例如,商品名稱:優必列克斯;日本宇 部興產(股)〕較理想。一般,絕緣薄膜1 1之厚度係 2 . 5〜1 2 5 // m,較理想爲5〇〜7 5 // m。 此種絕緣薄膜1 1係於配線圖案1 2之所定領域藉由 沖壓形成有元件孔1 8。配線圖案1 2之元件側連接端子 1 4係設成從元件孔1 8之緣部朝元件孔1 8內突出之狀 態,而在該元件側連接端子1 4,例如經由金(A u )所 構成的凸塊3 1連接有電子零件3 0。詳言之,電子零件 3 0係具有比元件孔1 8較小之外形,經由施以電子零件 3 0之電極3 2的凸塊3 1與突出於元件孔1 8內之元件 側連接端t 1 4電氣式地連接。 經濟部智慧財產局員工消費合作社印製 一般’配線圖案1 2係在形成有形成於絕緣薄膜1 1 之元件孔1 8及鏈輪孔1 3等之一方面,藉由施以圖案化 形成銅或鋁所構成的導電體箔等之導電層2 0。此種導電 層2 0係直接多層於絕緣薄膜1 1上,或經由黏接劑層而 錯由熱壓接等所形成也可以。導電層2 0之厚度係例如6 〜7 0 // m,較理想爲8〜3 5 // m。作爲導電體箔所構 成之導電層2 0,以銅箔較理想。 又’並不是在絕緣薄膜1 1上設置導電體箔,而是例 如也可作爲在導電體箔塗布聚醯亞胺先驅物,經燒成而由 聚醯亞胺薄膜所構成的絕緣薄膜。 又’設於絕緣薄膜1 1上之導電層2 0係藉由微影成 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -10- 526570 A7 B7 五、發明説明(8 ) 像法’圖案化作爲包含元件側連接端子1 4,輸入側外部 連接端子1 5及輸出側外部連接端子1 6的配線圖案1 2 。亦即,塗布光阻劑層之後,經由光罩以鈾刻液化學地溶 解(鈾刻處理)光阻劑層加以除去,又以鹼液等溶解除去 光阻劑而圖案化導電體箔。 又,絕緣薄膜1 1上之寬度方向兩側,連續於配線圖 案1 2,在各該輸入側外部連接端子1 5及輸出側外部連 接端子1 6之全面圖案化有鍍引線2 1及互相地導通此些 鍍引線的導通部2 2。此些係被使用於下述之鍍時者,之 後,形成於可除去之領域。 然後,在如此地藉由蝕刻被圖案化之配線圖案1 2上 ,塗布浸銲劑光阻劑材料塗布液,藉由所定之圖案化,形 成有浸銲劑光阻劑層1 7。 又,在藉由浸銲劑光阻劑層1 7未被覆蓋之配線圖案 1 2上,亦即,在兀件側連接端子1 4,輸入側外部連接 端子1 5及輸出側外部連接端子1 6上,形成有鍍層2 5 。具體而言,在元件側連接端子1 4上設有錫所構成之第 一鍍層2 5 a ,而在輸入側外部連接端子1 5及輸出側外 部連接端子1 6上,設有錫所構成的第一鍍層2 5 a與在 其上面設有錫-鉍合金所構成的第二鍍層2 5 b。 在本實施形態中,錫所構成之第一鍍層2 5 a係以無 電解鍍所形成;而錫-鉍合金所構成之第二鍍層2 5 b係 藉由詳述如下之本發明之電解錫系合金鍍方法所形成。又 ,錫所構成之第一鍍層2 5 a也藉由本發明之電解錫系合 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公董 (請先閲讀背面之注意事項再填寫本頁) 、*!! 經濟部智慧財產局員工消費合作社印製 -11 - 526570 A7 B7Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, 1T 526570 A7 _ _B7 V. Description of the Invention (4) When a tin-based alloy coating is made of a series alloy, a pulse voltage is applied between the plating electrodes. (Please read the precautions on the back before filling in this page.) In this sixth aspect, a tin-based alloy coating layer can be effectively prevented from generating gun-like precipitates by electrolytic plating by applying a pulse voltage. The seventh aspect of the present invention is a sixth aspect of the invention, in order to apply a pulse voltage between the above-mentioned plating electrodes, a regularly interrupted DC voltage interrupter is used, which is a characteristic electrolytic tin-based alloy plating method. In this seventh aspect, the pulse voltage can be applied more easily by using a chopper that intermittently interrupts the DC voltage. In an eighth aspect of the present invention, in the sixth or seventh aspect, the above-mentioned pulse voltage is an electrolytic tin that has an effect ratio D of 1/2 that is a ratio of the energization time to the overall application time, which is less than 1/2. System alloy plating method. In this eighth aspect, a tin-based alloy plating layer capable of effectively preventing the occurrence of gun-like precipitates is formed by the effect ratio D of the pulse voltage application being 1/2 or less. The ninth aspect of the present invention printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs In the sixth or seventh aspect, the above-mentioned pulse voltage is applied so that the effect ratio D of the ratio of the energization time to the overall application time is 1 / 3 or less, its characteristic electrolytic tin alloy plating method. In this ninth aspect, a tin-based alloy plating layer capable of effectively preventing the occurrence of gun-like precipitates is formed by the effect ratio D of the pulse voltage application being 1/3 or less. In a tenth aspect of the present invention, in the sixth or seventh aspect, the average plating particle diameter of the above-mentioned tin-based alloy plating layer is made 2 // m or less, which is a characteristic electrolytic tin-based alloy ore method. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) — ~ " 526570 A7 _B7 _ V. Description of the invention (5) (Please read the precautions on the back before filling this page) In this tenth state In the sample, by applying electrolytic plating with a pulse voltage, the tin-based alloy plating layer having an average particle diameter of the tin-based alloy coating layer of 2 // m or less was formed to effectively prevent the occurrence of gun-like precipitates. The eleventh aspect of the present invention is the sixth or seventh aspect, and the electrolytic tin-based alloy plating method is characterized in that the above-mentioned tin-based alloy plating layer has a plating thickness of 3 5 // m or less. In this eleventh aspect, the electrolytic plating to which a pulse voltage is applied is applied to make the tin-based alloy plating thickness less than 3 5 // m, thereby forming a tin-based alloy which can effectively prevent the occurrence of gun-like precipitates. Plating. In a twelfth aspect of the present invention, in a sixth or seventh aspect, a pulse voltage is applied to a part of the printed wiring substrate in a state of being immersed in a plating solution to form the above on a part of the wiring pattern. The tin-based alloy plating layer is a characteristic electrolytic tin-based alloy plating method. In this twelfth aspect, the tin-based alloy plating layer can be easily formed only on a part of the wiring pattern of the printed wiring substrate. The thirteenth aspect of the invention printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs is the sixth or seventh aspect. The printed wiring substrate is on an insulating substrate made of a flexible film. An electrolytic tin-based alloy plating method having the above-mentioned wiring pattern is its feature. In this thirteenth aspect, a flexible wiring substrate having a tin-based alloy plating layer in which gun-like precipitates do not occur can be manufactured. (Embodiment of the invention) Hereinafter, a method for manufacturing a flexible wiring substrate and an example of use of an embodiment of the present invention will be described together. Of course, the present invention is not limited to the paper size applicable cap @ 家 丝 (CNS) A4 specification (21GX297 mm) ~ '-8-526570 A7 _ B7 V. Description of the invention (6) This. Fig. 1 shows a schematic view of a flexible wiring substrate, which is one of the embodiments (please read the precautions on the back before filling out this page) View ®; Fig. 2 shows the state of the mounted electronic components A- A > sectional view. As shown in Figs. 1 and 2, the flexible wiring substrate 10 of this embodiment is a T A B tape, and a plurality of wiring patterns 12 are continuously formed on one of the strip-shaped insulating films 11. The insulating film 11 has sprocket holes 13 for transfer at a certain interval on both sides in the axial direction. Generally, one side is transferred to the other side, where electronic components such as ICs 30 are mounted, and after the electronic components 30 are mounted, they are cut. Break into each of the wiring patterns 12. Such a flexible wiring substrate 10 is a case where the electronic component 30 is cut into each wiring pattern 12 after being mounted, and the electronic component 30 is cut after being cut into each wiring pattern. Installation situation. In addition, the case of the band-shaped state or the case where each of the wiring patterns 12 is cut is a flexible wiring base material 10 regardless of the presence or absence of mounted electronic components. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, sprocket holes 1 3 are provided at both ends in the width direction of the insulating film 1 1, but the insulating film 11 and the sprocket hole 1 3 are formed to align with each other. The through-holes to be used may be through-holes for various purposes such as display of a defective package and the shape of the package. The wiring pattern 12 includes: component-side connection terminals 14 connected to the mounted electronic parts 30, and input-side connection terminals 15 and input-side external connection terminals 16; in addition to these areas, borrowing It is covered by a dip solder resist layer 17. As the insulating film 1 1, it can be used with flexibility and resistance to this paper. Applicable Chinese National Standard (CNS) A4 (210X 297 mm) -9 · 526570 A7 B7 V. Description of the invention (7) (please first (Please read the notes on the reverse side and fill out this page) Pharmaceutical and heat resistant materials. Examples of the material of the insulating film 11 include polyester, polyimide, polyimide, and the like, and in particular, a wholly aromatic polyamidine having a biphenyl skeleton [for example, a trade name: Eulerix; Japan Ube Industrial Development Co., Ltd.] is more ideal. Generally, the thickness of the insulating film 11 is 2.5 to 1 2 5 // m, and more preferably 50 to 7 5 // m. This insulating film 11 is formed in a predetermined area of the wiring pattern 12 by forming element holes 18 by punching. The element-side connection terminal 14 of the wiring pattern 12 is provided so as to protrude from the edge portion of the element hole 18 into the element hole 18, and the element-side connection terminal 14 is, for example, through a gold (Au) The formed bump 31 is connected to an electronic component 30. In detail, the electronic component 30 has a smaller outer shape than the component hole 18, and via the bump 31 of the electrode 3 2 applied to the electronic component 30 and the component-side connecting end t protruding inside the component hole 18 1 4 Electrically grounded. The “Wiring Pattern 1 2” printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs is formed by forming one of element holes 18 and sprocket holes 13 formed in the insulating film 11 by patterning to form copper. Or a conductive layer 20 of a conductor foil made of aluminum or the like. Such a conductive layer 20 may be directly multilayered on the insulating film 11 or may be formed by thermocompression bonding or the like via an adhesive layer. The thickness of the conductive layer 20 is, for example, 6 to 7 0 // m, and more preferably 8 to 3 5 // m. As the conductive layer 20 composed of the conductor foil, a copper foil is preferable. In addition, instead of providing a conductive foil on the insulating film 11, it can also be used as an insulating film composed of a polyimide film after firing a precursor of polyimide on the conductive foil, and firing. Also, the conductive layer 2 0 provided on the insulating film 11 is based on the lithography cost paper size and applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -10- 526570 A7 B7 V. Description of the invention (8) Image The method is patterned as a wiring pattern 12 including an element-side connection terminal 14, an input-side external connection terminal 15, and an output-side external connection terminal 16. That is, after the photoresist layer is applied, the photoresist layer is chemically dissolved (uranium-etched) through a photomask to remove the photoresist layer, and the photoresist is dissolved and removed with an alkali solution to pattern the conductive foil. In addition, on both sides of the insulating film 11 in the width direction, the wiring pattern 12 is continuous, and the input-side external connection terminal 15 and the output-side external connection terminal 16 are patterned with plated leads 21 and each other. The conductive portions 22 for conducting these plated leads are conducted. These are used in the following plating, and then formed in removable areas. Then, on the wiring pattern 12 patterned by etching in this manner, a dip-resist photoresist material coating liquid is applied, and a predetermined pattern is formed to form a dip-resist photoresist layer 17. Further, on the wiring pattern 12 which is not covered by the dip solder resist layer 17, that is, on the component side connection terminal 14, the input side external connection terminal 15 and the output side external connection terminal 16 On the surface, a plating layer 2 5 is formed. Specifically, the element-side connection terminal 14 is provided with a first plating layer 2 5 a made of tin, and the input-side external connection terminal 15 and the output-side external connection terminal 16 are provided with tin. The first plating layer 2 5 a and a second plating layer 2 5 b made of a tin-bismuth alloy are provided thereon. In this embodiment, the first plating layer 2 5 a made of tin is formed by electroless plating, and the second plating layer 2 5 b made of tin-bismuth alloy is made of the electrolytic tin of the present invention described in detail below. It is formed by alloy plating method. In addition, the first plating layer 2 5 a made of tin is also compatible with the Chinese National Standard (CNS) A4 specification (210X297 public director (please read the precautions on the back before filling this page)) , * !! Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -11-526570 A7 B7

五、發明説明(9) 金鍍方法所形成也可以。 (請先閲讀背面之注意事項再填寫本頁) 錫系合金鍍層的第一及第二鍍層2 5 a 、2 5 b ;> zp 均鍍被膜粒徑係2 ηι以下,而鍍厚係分別3 5 e m以下 ,較理想係1 〇 // m以下。由此,在第一及第二鍍層2 5 a _、2 5 b幾乎不會發生槍狀析出物,而完全沒有元件側 連接端子1 4 ’輸入側外部連接端子1 5及輸出側外部連 接端子1 6之配線端子間的短路。 此種平均鑛被膜粒f生係2 # Hi以下,而鑛厚係分別 3 5 // m以下,較理想爲1 〇 // m以下的錫系合金鍍層之 形成方法係並未特別地加以限定,若至少平均鍍被膜粒徑 係鍍成2 // m以下,則幾乎不會生成槍狀析出物。實驗結 果,若至少將平均鍍被膜粒徑作爲2 a m以下,又視需要 ,將鍍厚作爲3 5 // m,較理想爲作成1 〇 v ηι以下,則 確5忍」幾乎不會發生長度超過1 〇 # m之槍狀析出物。 經濟部智慧財產局員工消費合作社印製 作爲此種平均鍍被膜粒徑形成2 // m以下之鍍層的鍍 方法’除了如下述地施加脈衝電壓施以鍍的本發明之鍍方 法之外,也可考慮將添加劑添加於鍍液以減小平均鍍被膜 粒徑之方法。作爲此種添加劑,例如有胺一醛之反應生成 物的R P A A等。又,添加此種添加劑所形成的錫系合金 鍍層’係與未添加入添加劑所形成時相比較具有變脆,降 低彎曲強度等缺點。 以下’一面參照第3圖一面說明用以實施本發明的錫 系合金鍍方法之鍍裝置之一例子。 如第3圖所示,鍍裝置4 0係具有:保持鍍液4 1之 本紙張尺度適用中國國家標準(CNS) M規格(no〆297公董) -12- 526570 A7 B7 五、發明説明(10) 鍍槽4 2,及設於該鍍槽4 2內而構成陽極的電極4 3。 (請先閲讀背面之注意事項再填寫本頁} 又,鍍槽4 2係成爲本實施形態之輸送用膠帶之連續 的絕緣薄膜1 1 ,亦即,設有將導電層2 0圖案化於表面 的配線圖案1 2之連續的絕緣薄膜1 1 ,在其內邰以起立 之狀態一面浸漬於鍍液4 1中,一面藉由未圖示之搬運手 段連續地搬運地,大約矩形斷面形狀朝長度方向延伸的流 槽形狀地構成。亦即,在鍍槽4 2之長度方向兩側之壁 4 2 a ,分別設有開縫部4 2 b,絕緣薄膜1 1係成爲從 設於該鍍層4 2之長度方向一方之壁4 2 a的開縫部4 2 b朝長度方向搬運鍍槽4 2內之寬度方向大約中央部,而 經由設在另一方之壁4 2 a的開縫部4 2 b朝鍍槽4 2之 外側。又在該鍍槽4 2,藉由未圖示之循環裝置成爲能供 給新鍍液,液面高度係經常地被保持在一定位置 在鍍裝置4 0中,陰極係構成可撓性配線基材1 〇之 配線圖案1 2的導電層2 0 ;該導電層2 0係經由鍍引線 2 1,例如導通於設在鍍槽4 2之外側的輥狀接觸構件 4 5,而接觸構件4 5係分別連接於電源4 6。 經濟部智慧財產局員工消費合作社印製 電源4 6係在電極4 3與接觸構件2 5之間施加脈衝 電壓者,具備直流電源4 7與截波器4 8者。亦即,電源 4 6係藉由將直流電源4 7之直流電壓截波器4 8規則性 地斷續’俾將脈衝電壓施加於電極4 3與接觸構件4 5之 間者。又,脈衝電壓之施加手段係並不被限定於此者,可 使用發生脈衝電壓之各種手段。 以下,使用此種鍍裝置4 0說明形成第二鍍層2 5 b 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -13- 526570 A7 _ B7 五、發明説明(彳彳) (請先閲讀背面之注意事項再填寫本頁) 的本發明之鍍方法。首先,如第4圖所示,將配線圖案 1 2之輸入側外部連接端子1 5側作爲向下方而將可撓性 配線基材1 0配置於鍍裝置4 0。亦即,將可撓性配線基 材1 0配置於鍍裝置4 0成爲僅配線圖案1 2之輸入側外 部連接端子1 5浸漬於鍍液4 1。又,一面連續地移動該 可撓性配線基材1 0 —面進行電鍍。此時,在電極4 3與 接觸構件4 5之間,藉由直流電源施加所定之脈衝電壓。 由此,僅於輸入側外部連接端子1 5之第一鍍層2 5 a上 形成有第二鍍層2 5 b,惟幾乎不會發生在槍狀析出物, 又完全沒有輸入側外部連接端子1 5之配線端子間的短路 。又,第二鍍層2 5 b係平均鍍被膜粒徑係2 // m以下; 鍍厚係3 5 // m以下。 在上述之鍍裝置4 0,係僅將電鍍之領域浸漬於鍍液 4 1而進行電鍍,惟以襯墊或光阻劑掩蔽電鍍之領域以外 ,例如將整體浸漬於鍍液4 1而施以電鍍也可以。 經濟部智慧財產局員工消費合作社印製 此種錫系合金鍍方法的脈衝電壓之施加條件,係未生 成槍狀析出物,且可形成具備基本上特性的鍍膜之條件就 可以。一般,脈衝電壓係對於整體施加時間之通電時間之 比的作用比D爲1 / 2以下,較理想爲作爲1 / 3以下, 若重複地加以施加,則形成不會發生槍狀析出物的鍍層。 在此’作用比D係以以下式被定義,而在第5圖表示。 D 二 Ton/(Ton + T〇 f f) 式中,Τ ο η係脈衝通壓通電時間;τ o f f係脈衝 電壓中斷時間。 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) -- -14- 526570 A7 B7 五、發明説明(,12) 構成如此,在未形成有配線圖案1 2之Ιτ劑光阻劑 層1 7的領域,亦即,在被浸漬於鍍液4 1的被鍍部之輸 入側外部連接端子1 5不會發生槍狀析出物地可形成錫系 合金所構成的第二鍍層2 5 b。 又,在本實施形態中,作爲錫系合金鍍層,採用錫-鉍合金鍍(鉍濃度爲5〜2 0 % )。錫-鉍合金係作爲錯 自由之浸銲劑有望者,藉由將鉍濃度作爲5〜2 0 %之高 濃度,可得到具有與銲鉛同等之融點的鍍層。 又,在施加此種錫-鉍合金鍍的鍍裝置4 0中,鍍液 4 1之鉍析出作爲第二鍍層2 5 b之故,因而欲經常地形 成一定之鉍濃度的第二鍍層2 5 b,必須在鍍液4 1補充 鉍化合物。作爲該鉍化合物,例如有鏈烷磺酸系或烷醇系 磺酸系之3價鉍化合物。藉由將此種鉍化合物補充於鍍液 4 1中,可容易地形成一定之鉍濃度(約5〜2 0 % )之 組成之錫-鉍合金所構成的第二鍍層2 5 b。 又,在本實施形態中,作爲可撓性配線基材1 〇例示 T A B帶,惟當然並不被限定於此者,也可將本發明適用 於 T — B G A ( Tape Ball Grid Array )帶、帶 C S P ( Chip5. Description of the invention (9) It can be formed by gold plating method. (Please read the precautions on the back before filling in this page) The first and second coatings of tin-based alloy coatings 2 5 a and 2 5 b; > zp are both coated with a particle diameter of 2 η or less, and the plating thickness is respectively 3 5 em or less, more preferably 1 〇 // m or less. As a result, gun-like deposits hardly occur in the first and second plating layers 2 5 a _, 2 5 b, and there are no element-side connection terminals 1 4 ′ and input-side external connection terminals 15 and output-side external connection terminals. 1 6 Short circuit between wiring terminals. Such an average ore coating grain is less than 2 # Hi, and the thickness of the ore is 3 5 // m or less, and more preferably 1 0 // m or less. The method of forming the tin-based alloy coating is not particularly limited. If at least the average particle diameter of the plating film is plated to 2 // m or less, gun-like precipitates are hardly generated. As a result of the experiment, if the average particle diameter of the plating film is at least 2 am, and if necessary, the plating thickness is 3 5 // m, and ideally, it is made less than 10 ν η, then the length of 5 ”will hardly occur. Gun-like precipitates exceeding 10 mm. The consumer property cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints such a plating method for forming a plating layer having an average plating film particle diameter of 2 // m or less. A method of adding an additive to the plating solution to reduce the average particle diameter of the plating film can be considered. Examples of such additives include R P A A which is a reaction product of amine-aldehyde. Further, the tin-based alloy plating layer formed by adding such an additive has disadvantages such as being more brittle and lowering the bending strength as compared with the case where the additive is not added. Hereinafter, an example of a plating apparatus for implementing the tin-based alloy plating method of the present invention will be described with reference to FIG. 3. As shown in Figure 3, the plating device 40 has the following: the paper size of the plating solution 41 is applied to the Chinese National Standard (CNS) M specification (no〆297 public director) -12- 526570 A7 B7 V. Description of the invention ( 10) A plating bath 4 2 and an electrode 4 3 provided in the plating bath 42 to constitute an anode. (Please read the precautions on the back before filling in this page} Also, the plating tank 4 2 is a continuous insulating film 1 1 that becomes the conveyor tape of this embodiment, that is, a conductive layer 20 is patterned on the surface. The continuous insulating film 1 1 of the wiring pattern 1 2 is immersed in the plating solution 4 1 in an upright state while being continuously conveyed by a conveying means (not shown), and the shape of the approximately rectangular cross-section faces The flow grooves extending in the longitudinal direction are formed in a shape. That is, the walls 4 2 a on both sides in the longitudinal direction of the plating tank 42 are provided with slits 4 2 b, respectively, and the insulating film 11 is formed from the plating layer 4. 2 in the longitudinal direction of one of the walls 4 2 a of the slot 4 2 b conveys the central portion in the width direction of the plating tank 4 2 in the length direction, and passes through the slot 4 2 b provided in the other wall 4 2 a toward Outside the plating tank 42. In the plating tank 42, a circulating device (not shown) can be used to supply a new plating solution, and the liquid level is always maintained at a certain position in the plating device 40. The cathode system The conductive layer 20 constituting the wiring pattern 12 of the flexible wiring substrate 10; the conductive layer 20 is Via the plated leads 21, for example, the roller-shaped contact members 4 5 provided on the outside of the plating tank 4 2 are electrically connected, and the contact members 4 5 are connected to the power sources 4 6 respectively. 6 refers to a person who applies a pulse voltage between the electrode 4 3 and the contact member 25, and includes a DC power supply 47 and a clipper 48. That is, the power supply 4 6 is to cut the DC voltage of the DC power supply 47. The device 48 regularly and intermittently applies the pulse voltage between the electrode 43 and the contact member 45. The application method of the pulse voltage is not limited to this, and various types of pulse voltage can be used. In the following, the use of such a plating device 4 0 to describe the formation of a second plating layer 2 5 b This paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) -13- 526570 A7 _ B7 V. Description of the invention (彳 彳) (Please read the precautions on the back before filling this page) The plating method of the present invention. First, as shown in Figure 4, the input-side external connection terminal 15 of the wiring pattern 12 will be facing downwards. The flexible wiring substrate 10 is arranged in a plating apparatus 40. That is, the flexible wiring base material 10 is arranged in the plating apparatus 40 so that only the input-side external connection terminals 15 of the wiring pattern 12 are immersed in the plating solution 41. The flexible wiring base is continuously moved while one side The material 10 is electroplated on the surface. At this time, a predetermined pulse voltage is applied between the electrode 43 and the contact member 45 through a DC power supply. As a result, the first plating layer 2 of the external connection terminal 15 only on the input side A second plating layer 2 5 b is formed on 5 a, but almost no gun-like precipitates occur, and there is no short circuit between the wiring terminals of the input-side external connection terminal 15. In addition, the second plating layer 2 5 b is an average plating film particle diameter of 2 // m or less, and the plating thickness is 3 5 // m or less. In the above-mentioned plating device 40, plating is performed by immersing only the area to be plated in the plating solution 41, but using a pad or a photoresist to mask the area outside the plating, for example, the entire area is immersed in the plating solution 41 and applied. Electroplating is also possible. Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs The pulse voltage application condition of this tin-based alloy plating method is a condition that no gun-like precipitate is formed and a coating film with basic characteristics can be formed. Generally, the effect ratio D of the ratio of the pulse voltage to the energization time of the entire application time is ½ or less, and is preferably 1/3 or less. When repeatedly applied, a plating layer is formed in which gun-like precipitates do not occur. . Here, the 'action ratio D is defined by the following formula, and is shown in FIG. 5. D 2 Ton / (Ton + T0 f f) In the formula, τ η is the pulse on-voltage energization time; τ o f f is the pulse voltage interruption time. This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm)--14- 526570 A7 B7 V. Description of the invention (, 12) Structure is such that the wiring pattern 1 2 Ιτ agent light is not formed In the area of the resist layer 17, that is, the second plating layer made of a tin-based alloy can be formed on the input-side external connection terminal 15 which is immersed in the plating portion 41 of the plating solution without gun-like precipitation. 2 5 b. In this embodiment, a tin-bismuth alloy plating is used as the tin-based alloy plating layer (bismuth concentration is 5 to 20%). A tin-bismuth alloy is expected to be a free soldering flux, and a plating layer having a melting point equivalent to that of lead can be obtained by using a high concentration of bismuth at a concentration of 5 to 20%. In addition, in the plating apparatus 40 to which such a tin-bismuth alloy plating is applied, the bismuth of the plating solution 41 is precipitated as the second plating layer 2 5 b. Therefore, the second plating layer 2 5 having a constant bismuth concentration is often formed. b. Bismuth compounds must be added to the plating solution 41. Examples of the bismuth compound include an alkanesulfonic acid-based or alkanol-sulfonic acid-based trivalent bismuth compound. By adding such a bismuth compound to the plating solution 41, a second plating layer 2 5 b composed of a tin-bismuth alloy having a certain bismuth concentration (about 5 to 20%) can be easily formed. In this embodiment, a TAB tape is exemplified as the flexible wiring base material 10. However, it is needless to say that the TAB tape is not limited to this. The present invention can also be applied to a T-BGA (Tape Ball Grid Array) tape, a tape CSP (Chip

Size Package ) 、A S I C ( Application Specific IntegratedSize Package), A S I C (Application Specific Integrated

Circuit)帶的各種半導體封裝體等。 (實施例一) 在如上述之T A B帶的可撓性配線基材丨〇之配線部 ,亦即,在元件側連接端子1 4,輸入側外部連接端子 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ' ' --- —, (請先閱讀背面之注意事項再填寫本頁) 、11 經濟部智慧財產局員工消費合作社印製 -15- 526570 A7 B7 五、發明説明(13> (請先閱讀背面之注意事項再填寫本頁) 1 5及輸出側外部連接端子1 6上以外之部分設置浸銲劑 光阻劑層1 7 ;而在元件側連接端子1 4,輸入側外部連 接端子1 5及輸出側外部連接端子1 6上,準備藉由無電 解鍍,設置錫所構成之第一鍍層2 5 a ,然後施以退火處 理者。 具體而s ’作爲鍍裝置4 0之鍍液4 1 ,使用5重量Circuit) tapes and other semiconductor packages. (Example 1) In the flexible wiring substrate of the TAB tape as described above, that is, the wiring portion of the TAB tape, that is, the component-side connection terminal 14 and the input-side external connection terminal, the paper standard is applicable to the Chinese National Standard (CNS) A4 specifications (210X297 mm) '' ----, (Please read the notes on the back before filling out this page), 11 Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -15- 526570 A7 B7 5. Description of the invention 13 > (Please read the precautions on the back before filling this page) 1 5 and the output side external connection terminals 1 6 are provided with a dip flux photoresist layer 1 7; and the component side connection terminals 1 4 and the input side On the external connection terminal 15 and the output-side external connection terminal 16, a first plating layer 2 5 a made of tin is prepared by electroless plating, and then annealed. Specifically, s ′ is used as a plating device 4 0 Plating solution 4 1, use 5 weight

% B i - S η合金鍍液(日本石原藥品公司製··以p F 一 〇 5 Μ作爲基礎),保持在4 0 °C並浸漬T A Β之輸入 側外部連接端子1 5及輸出側外部連接端子1 6之任一方 側,在電極4 3與接觸構件4 5之間,施加電流密度1 〇 A / d m 2,作用比 D = 1 / 3 (. Τ ο η = 4 5 m s e c , 丁 o f f二9 0 m s e c )之脈衝電壓,形成厚度1 〇 // m之第二鍍層2 5 b.。同樣地,在輸入側外部連接端子 1 5及輸出側外部連接端子1 6之另一方側也形成第二鍍 層2 5 b。又,作爲電極4 3使用S η電極。 經濟部智慧財產局員工消費合作社印製 將具有如此地形成的第二鍍層2 5 b之輸入側外部連 接端子1 5及輸出側外部連接端子1 6以顯微鏡觀察之結 果表示於第6圖。由第6圖可知,在第二鍍層2 5 b未確 認槍狀析出物,而形成第二鍍層2 5 b的輸入側外部連接 端子1 5及輸出側外部連接端子1 6也爲凹凸較少之銳利 者。又,第二鍍層2 5 b之平均鍍被膜粒徑係平均 1 . 6 8 " m 〇 如第1 0圖所示,平均鍍被膜粒徑係由掃描顯微鏡(: S E Μ )照片所求出。亦即,測定對角線a ,b之實際長 本紙張尺度適用中國國家標準(CNS ) A4規格(210 X 297公釐) -16- 526570 A7 ___B7_ 五、發明説明(14) (請先閱讀背面之注意事項再填寫本頁) 度,將此作爲α ( = α ),之後測定位於該對角線上的結 晶粒之個數,將此作爲yS ( = /3 ),使用該α及/3求出平 均粒徑=α / /3。 (.比較例) 在施以鍍時,在電極4 3與連接構件4 5之間,除了 施加電流密度1 0 A / d m 2之直流電壓之外係與實施例同 樣,形成厚度1 0 // m之錫-鉍合金所構成的鍍被膜。 將具有該鍍被膜之配線部與實施例同樣地以顯微鏡觀 察之結果表示於第7圖。由第7圖可知,在比較例之鍍被 膜,確認有長度超過5 0 // m之槍狀析出物3 ,又也確認 多數之短槍狀析出物,而具有鍍被膜的配線部之形狀也爲 多凹凸者。 (實施例二) 使用16重量% B i - Sn合金鍍液(日本石原藥 品公司製;以P F - 〇 5 Μ作爲基礎),將電流密度在輸 經濟部智慧財產局員工消費合作社印製 出端子側爲1 5 A / d m 2,在輸入端子側爲1 3 A / d m 2,作用比 D 二 1 / 4 ( Τ ο η = 1 0 m s e c , T o f f = 3 0 m s e c )以外係與實施例一同樣地施以 錫-鉍合金鍍。鍍厚係以5〜6 // m作爲目標。又,作爲 電極4 3使用於表面施以鍍鉑的鉑電極。 處理4〇〇m、1 1 〇〇m及1 7〇0 m之後,以顯 微鏡觀察各該每1 4之配線圖案之2 8配線端子分量,測 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -17- 526570 A7 B7 五、發明説明(15) 定槍狀析出物之數及大小。將結果表示於表1 。又將各該 處理品掃描顯微鏡(S E Μ )照片表示於第8圖及第9圖 。又,平均鍍被膜粒徑係與實施例一同樣地測定。 - u 1 ir- It! 1—τ 1 1 - I (請先閲讀背面之注意事項再填寫本頁)% B i-S η alloy plating solution (manufactured by Ishihara Pharmaceutical Co., Ltd. · based on p F 105 M), kept at 40 ° C and impregnated TA Β input side external connection terminal 15 and output side external On either side of the connection terminal 16, between the electrode 4 3 and the contact member 4 5, a current density of 1 OA / dm 2 is applied, and the action ratio D = 1/3 (. Τ ο η = 4 5 msec, Ding off 2 90 msec) pulse voltage to form a second plating layer 2 5 b. With a thickness of 10 / m. Similarly, a second plating layer 2 5 b is formed on the other side of the input-side external connection terminal 15 and the output-side external connection terminal 16. As the electrode 43, an Sn electrode was used. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs The results of the observation of the input-side external connection terminal 15 and the output-side external connection terminal 16 with the second plating layer 2 5 b thus formed are shown in FIG. 6. It can be seen from FIG. 6 that gun-shaped precipitates are not confirmed in the second plating layer 2 5 b, and the input-side external connection terminal 15 and the output-side external connection terminal 16 forming the second plating layer 2 5 b are also sharp with less unevenness. By. In addition, the average plating film particle diameter of the second plating layer 2 5 b is an average of 1. 6 " m 〇 As shown in FIG. 10, the average plating film particle diameter is obtained from a scanning microscope (: SE M) photograph. . That is, the actual long paper size of the diagonals a and b is determined by the Chinese National Standard (CNS) A4 (210 X 297 mm) -16- 526570 A7 ___B7_ V. Description of the invention (14) (Please read the back first Note on this page, fill in this page again), take this as α (= α), and then measure the number of crystal grains on the diagonal, take this as yS (= / 3), and use the α and / 3 to find Out the average particle size = α / / 3. (Comparative example) When plating is performed, a thickness of 1 0 // is formed in the same manner as in the example except that a DC voltage of a current density of 10 A / dm 2 is applied between the electrode 43 and the connection member 45. m-tin-bismuth alloy coating. Fig. 7 shows the results of observation of the wiring portion having the coating film under a microscope in the same manner as in the example. As can be seen from FIG. 7, in the plating film of the comparative example, gun-shaped precipitates 3 with a length exceeding 50 0 // m were confirmed, and most of the short gun-shaped precipitates were also confirmed. The shape of the wiring portion with the plating film was also Many bumps. (Example 2) Terminals were printed using a 16% by weight Bi-Sn alloy plating solution (manufactured by Ishihara Pharmaceutical Co., Ltd .; based on PF-0.05M) at the current density at the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 1 5 A / dm 2 on the side, 1 3 A / dm 2 on the input terminal side, and the ratio D 2/4 (T ο η = 10 msec, T off = 3 0 msec) is the same as the first embodiment Similarly, tin-bismuth alloy plating was applied. The plating thickness is targeted at 5 ~ 6 // m. In addition, as the electrode 43, a platinum electrode having a surface plated with platinum was used. After processing 400m, 1100m, and 1700m, observe the components of the 28 wiring terminals of each of the 14 wiring patterns with a microscope. The paper size applies to the Chinese National Standard (CNS) A4 specifications (210X297 mm) -17- 526570 A7 B7 V. Description of the invention (15) Number and size of fixed gun-shaped precipitates. The results are shown in Table 1. Scanning microscope (SEM) photographs of each of the processed products are shown in FIG. 8 and FIG. 9. The average particle diameter of the plating film was measured in the same manner as in Example 1. -u 1 ir- It! 1—τ 1 1-I (Please read the notes on the back before filling this page)

、1T 〔.表 1〕 槍狀析出物之數(大小m別) 平均鍍被膜 11 〜20 21 〜30 31 〜40 41 〜50 51以上 Tatal 粒徑// m 初期 1 0 0 0 0 1 1.62 400m 後 1 0 0 0 0 1 1.66 1100m 後 4 0 0 0 0 4 1.81 1700m 後 1 0 0 0 0 1 1.66 經濟部智慧財產局員工消費合作社印製 (試驗例1〜9 ) 在將錫之無電解鍍施加在設於絕緣薄膜上之銅之導電 層上的試驗樣品(具有2 8條配線用端子),使用5 % B i - S η合金鍍之鍍液(日本石原藥品公司製;以p f - 0 5 Μ作爲基礎),以下述條件下施以電解鍍。之後, 觀察鍍厚,鍍層之外觀,進行依S Ε Μ的鍍被膜粒徑之測 定。 作爲陽極使用S η板,與陽極距9 c, ηι之距離配置試 驗樣品,作爲脈衝通電量1 〇 A / d m 2施以鍍以鍍厚1 〇 β m爲目標。又鍍液係藉由泵施以循環。 將鍍條件’鍍厚表示於表2,而將槍狀析出物之生成 ’平均鍍被膜粒徑表示於表3。又,鍍厚係藉由螢光X線 本紙張尺度適用中國國家標準(CNS ) Α4規格(210x297公釐) --!--- - 18- 526570 A7 B7 五、發明説明(16) 進行測定,槍狀析出物係對於2 8條端子,計測1 1 // m 以上者之數量。又平均鍍被膜粒徑係與以實施例一同樣之 方法進行測定。 (.比較試驗例) 代替脈衝電壓施加直流電壓以外,與試驗例1〜9同 樣地進行電鍍。 (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 〔表2〕 脈衝通電 脈衝通電 作用比 平均鍍厚 時間Ton 時間Toff Ton/(Ton + Toff) μ m 試驗例1 10msec 10msec 0.50 9.96 試驗例2 10msec 20msec 0.33 10.07 試驗例3 10msec 3 0msec 0.25 10.07 試驗例4 10msec 5 0msec 0.17 9.99 試驗例5 10msec 90msec 0.10 9.07 試驗例6 5 0msec 5 0msec 0.50 10.10 試驗例7 3 0msec 9 0msec 0.25 9.70 試驗例8 4 5msec 90msec 0.33 10.27 試驗例9 9 0msec 90msec 0.50 10.16 比較試驗 — — — 10.16 例 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐) -19- 526570 五、發明説明(17) 經濟部智慧財產局員工消費合作社印製 〔表3〕 槍狀析出物之數(大小// m別) 平均鍍 被膜粒 徑# m 11 〜20 21 〜30 31 〜40 41 〜50 51以上 Tatal 試驗例1 7 3 0 2 0 12 2.55 試驗例2 5 0 〇 0 0 5 2.01 試驗例3 0 0 0 0 0 0 1.97 試驗例4 0 0 0 0 0 0 1.97 試驗例5 0 0 0 0 〇 0 1.45 試驗例6 6 2 0 0 0 8 2.39 試驗例7 1 0 0 0 0 1 1.76 試驗例8 1 0 0 〇 0 1 1.68 試驗例9 3 0 0 〇 〇 3 1.81 比較試 驗例 16 3 3 0 1 23 2.85 ---------衣-- (請先閱讀背面之注意事項再填寫本頁) 訂 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -20- 〇 η時間者 ,液體鑽進 1〜9與比 526570 Α7 Β7 五、發明説明(y 結果,藉由將平均鍍被膜粒徑作成大約2 // m,確認 了幾乎不會發生1 1 // m以上之槍狀析出物,又沒有配線 端子間之短路等之虞。 又,施加脈衝電壓而進行電鍍時,愈降低作用比,愈 減少槍狀析出物之發生數,作用比爲1 / 2以下,則與施 加直流電壓之相差更顯著,而在1 / 3以上更具效果,在 〇· 1 7以下確認了不會發生1 1 // m以上之槍狀析出物 。另一方面,在相同作用比,則知道了增加丁 可減低槍狀析出物之數量。 又,也比較異常析出,電鑛不均勻,變色 ,耐熱測試,裂紋,銲接潮濕性等,在試驗例 較試驗例未確認出有差異。 (試驗例1〇) 與試驗例1〜9同樣地,在設於絕緣薄膜上的_之_ 電層上施以錫之無電解鍍的試驗樣品(具有2 8 端子),使用1 6 % B i - S η合金鍍之鍍液(日本石 原藥品公司製;以P F — 0 5 Μ作爲基礎),以γ、十攸从 卜述條件 下施以電解鍍。然後,視察鍍厚,鍍層之外觀,進行{衣 S Ε Μ之鍍被膜粒徑之測定。鍍條件係如下述。 陽極:施以鍍鉑之網狀鉑電極 施加電源:脈衝電源〔作用比D二1 / 4 ( ν 丄〇 η 二 1 0 m s e c,Τ 〇 f f = 3 0 m s e c ) 電流密度:1 6 · 7 A / d m 2 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公~-— -21- 丨衣— (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 526570 A7 B7 五、發明説明(19) 目標鍍厚:3 0 // m (請先閱讀背面之注意事項再填寫本頁) 鍍厚係平均3 1 . 7 9 // m,而平均鍍被膜粒徑爲 1 . 6 8 // m。又,槍狀析出物係對於2 8條端子X 2片 ’在兩處觀察到1 1 // m以上者(1 1 // m者,與1 2 V m者)。又,鍍厚及平均鍍被膜粒徑,係使用與試驗例 及竇施例一同樣之方法進行測定。 (發明之效果) 如上所述,依照本發明,藉由將錫系合金鍍層之平均 鍍被膜粒徑作爲2 // m以下,可提供一種幾乎不會發生槍 狀析出物也不會有配線端子間之短路等之虞的具有錫系合 金鍍之印刷配線基材,又,藉由在鍍電極間施加脈衝電壓 施以電鍍,具有可形成有效地防止發生槍狀析出物的錫系 合金鍍層之效果。 (圖式之簡單說明) 經濟部智慧財產局員工消費合作社印製 第1圖係表示本發明之實施形態之一可撓性配線基材 的槪略俯視圖。 第2圖係表示將電子零件實裝於第1圖之可撓性配線 基材之狀態的A - A /剖視圖。 第3圖係表示用以實施本發明之錫系合金鍍方法之鍍 裝置的槪略立體圖。 第4圖係表示用以說明本發明之錫系合金鍍方法之一 本紙張尺度適用中國國家榡準(CNS ) A4規格(210Χ297公釐) -22- 526570 Α7 Β7 五、發明説明(2(ί 例子的圖式。 第5圖係表示實施本發明的錫系合金鍍方法時之脈衝 電壓之施加狀態的說明圖。 第6圖係表示本發明之實施例一之配線部的放大圖。 第7圖巧汽示本發明之比較例之配線部的放大圖。 ^ ^ λ ib) 系合金鍍層表面 (請先閲讀背面之注意事項再填寫本頁) 第示本發明的實施例二之 的 SEM· 第9 不本發明的實施例二之錫系合金鍍層表面 的S E Μ照片。 第1 0圖係表示測定本發明之平均鍍被膜粒徑之方法 的說明圖。 第1 1圖係表示藉由習知技術之電解錫鍍方法在印刷 配線基材進行錫系合金鍍時之配線部的放大圖。 第1 2圖係表示放大第1 1圖之槍狀析出物的圖式。 記號之說明) 3 槍狀析出物 經濟部智慧財產局員工消費合作社印製 10 可撓性配線基材 11 絕緣薄膜 12 配線圖案 13 鏈輪孔 14 元件側連接端子 15 輸入側外部連接端子 16 輸出側外部連接端子 本纸張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公釐) -23- 526570 A7 B7 五、發明説明(21) 17 浸銲劑光阻劑層 2 0 導電層 2 5 a 第一鍍層 2 5b 第二鍍層 (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -24-, 1T [. Table 1] Number of gun-shaped precipitates (size m) Average coating film 11 ~ 20 21 ~ 30 31 ~ 40 41 ~ 50 51 Tatal particle size // m Initial 1 0 0 0 0 1 1.62 400m Back 1 0 0 0 0 1 1.66 1100m Back 4 0 0 0 0 4 1.81 1700m Back 1 0 0 0 0 1 1.66 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs (Test Examples 1 to 9) Electroless plating of tin A test sample (having 28 wiring terminals) applied to a conductive layer of copper provided on an insulating film, using a 5% Bi-S η alloy plating solution (manufactured by Ishihara Pharmaceutical Co., Ltd .; pf-0 5 M as a basis), electrolytic plating was performed under the following conditions. After that, the plating thickness and the appearance of the plating layer were observed, and the particle diameter of the plating film was measured according to SEM. As the anode, an S η plate was used, and a test sample was arranged at a distance of 9 c, η from the anode. The target was pulsed with a current of 10 A / d m 2 and plated to a thickness of 10 β m. The plating solution is circulated by a pump. Table 2 shows the plating conditions' plating thickness, and Table 3 shows the average particle diameter of the coating formed by gun-shaped precipitates. In addition, the thickness of the plating is determined by the paper size of the fluorescent X-ray paper in accordance with the Chinese National Standard (CNS) A4 specification (210x297 mm)-! ----18- 526570 A7 B7 V. Description of the invention (16) For gun-shaped precipitates, measure the number of 1 1 // m or more for 28 terminals. The average plating particle diameter was measured in the same manner as in Example 1. (. Comparative test example) Plating was performed in the same manner as in Test Examples 1 to 9 except that a DC voltage was applied instead of the pulse voltage. (Please read the precautions on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs [Table 2] Pulse energization Pulse energization effect than average plating time Ton time Toff Ton / (Ton + Toff) μ m test Example 1 10msec 10msec 0.50 9.96 Test Example 2 10msec 20msec 0.33 10.07 Test Example 3 10msec 3 0msec 0.25 10.07 Test Example 4 10msec 5 0msec 0.17 9.99 Test Example 5 10msec 90msec 0.10 9.07 Test Example 6 0 0msec 5 0msec 0.50 10.10 Test Example 7 3 0msec 9 0msec 0.25 9.70 Test example 8 4 5msec 90msec 0.33 10.27 Test example 9 9 0msec 90msec 0.50 10.16 Comparative test — — — 10.16 examples This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm) -19- 526570 5 Explanation of the invention (17) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs [Table 3] Number of gun-shaped precipitates (size // m) Average particle diameter of coating film # m 11 ~ 20 21 ~ 30 31 ~ 40 41 ~ 50 51 or more Tatal Test Example 1 7 3 0 2 0 12 2.55 Test Example 2 5 0 〇 0 0 5 2.01 Test Example 3 0 0 0 0 0 0 1.97 Test Example 4 0 0 0 0 0 0 1 .97 Test Example 5 0 0 0 0 0 1.45 Test Example 6 6 2 0 0 8 2.39 Test Example 7 1 0 0 0 0 1 1.76 Test Example 8 1 0 0 0 0 1 1.68 Test Example 9 3 0 0 0 3 1.81 Comparative test example 16 3 3 0 1 23 2.85 --------- Cloth-(Please read the precautions on the back before filling in this page) The size of the paper is applicable to China National Standard (CNS) A4 (210X297 mm) For -20- 〇η time, liquid drilling 1 ~ 9 and ratio 526570 Α7 Β7 V. Description of the invention (y result, by making the average coating film particle size to about 2 // m, it was confirmed that almost No gun-like precipitates above 1 1 // m, and no short circuit between wiring terminals, etc., will occur. In addition, when the pulse voltage is applied for plating, the lower the action ratio, the less the number of gun-like precipitates. The effect ratio is less than 1/2, and the difference from the applied DC voltage is more significant, and it is more effective above 1/3. It is confirmed that the gun-like precipitation above 1 1 // m will not occur below 0.17 Thing. On the other hand, at the same action ratio, it is known that increasing the Ding can reduce the amount of gun-like precipitates. In addition, abnormal precipitation, non-uniform power deposits, discoloration, heat resistance test, cracks, and welding wetness were also compared. No difference was confirmed in the test examples compared with the test examples. (Test Example 10) As in Test Examples 1 to 9, a test sample (with 28 terminals) in which electroless plating of tin was applied to an electrical layer provided on an insulating film was used at 16% B. A plating solution for i-S η alloy plating (manufactured by Ishihara Pharmaceutical Co., Ltd .; based on PF — 0 5 Μ), electrolytic plating is performed under the conditions of γ and 10%. Then, the thickness of the plating and the appearance of the plating layer were inspected, and the particle size of the plating film was measured. The plating conditions are as follows. Anode: Plat-plated mesh platinum electrode Applied power source: Pulsed power source [action ratio D 2/4 (ν η〇η 20 1 msec, T 0ff = 3 0 msec) Current density: 1 6 · 7 A / dm 2 This paper size is applicable to Chinese National Standard (CNS) A4 specifications (210X297 male ~ -— -21- 丨 clothing — (Please read the precautions on the back before filling out this page) Printed by the Intellectual Property Bureau Employee Consumer Cooperatives System 526570 A7 B7 V. Description of the invention (19) Target plating thickness: 3 0 // m (Please read the precautions on the back before filling in this page) The plating thickness is average 3 1. 7 9 // m, and the average coating is The particle size is 1. 6 8 // m. In addition, the gun-shaped precipitate is observed for 2 8 terminals X 2 pieces of '1 1 // m or more (1 1 // m, and 1 2 V m). In addition, the thickness and average particle diameter of the plating film were measured using the same method as in Test Example and Sinus Example 1. (Effect of the Invention) As described above, according to the present invention, The average coating particle size of the alloy plating layer is 2 // m or less, which can provide a gun-like precipitate that hardly occurs and there is no space between wiring terminals. A printed wiring substrate having a tin-based alloy plating which may cause short-circuiting and the like, and applying a pulse voltage between the plated electrodes and electroplating, has the effect of forming a tin-based alloy plating layer which can effectively prevent the occurrence of gun-like deposits (Brief description of the drawing) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the first picture is a schematic plan view showing a flexible wiring substrate, which is one embodiment of the present invention. A-A / cross-sectional view of the state of the flexible wiring substrate mounted on Fig. 1. Fig. 3 is a schematic perspective view showing a plating device for implementing the tin-based alloy plating method of the present invention. Fig. 4 is a view showing To illustrate one of the tin-based alloy plating methods of the present invention, the paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 × 297 mm) -22- 526570 Α7 Β7 V. Description of the invention (2 (ί)) FIG. 5 is an explanatory diagram showing a pulse voltage application state when the tin-based alloy plating method according to the present invention is implemented. FIG. 6 is an enlarged view showing a wiring portion according to the first embodiment of the present invention. Comparison of inventions Enlarged view of the wiring section. ^ ^ Λ ib) is the surface of the alloy coating (please read the precautions on the back before filling this page) SEM of the second embodiment of the present invention. 9th embodiment of the second embodiment of the present invention SEM photograph of the surface of the tin-based alloy plating layer. Fig. 10 is an explanatory diagram showing a method for measuring the average particle diameter of the plating film of the present invention. Fig. 11 is an illustration of a conventional electrolytic tin plating method in printing. An enlarged view of the wiring portion when the wiring base is tin-plated. Fig. 12 is a drawing showing the gun-shaped precipitate of Fig. 11 in an enlarged manner. Symbol description) 3 Gun-shaped precipitate Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 10 Flexible wiring substrate 11 Insulating film 12 Wiring pattern 13 Sprocket hole 14 Element-side connection terminal 15 Input-side external connection terminal 16 Output-side External connection terminal This paper is in accordance with Chinese National Standard (CNS) A4 specification (210 × 297 mm) -23- 526570 A7 B7 V. Description of the invention (21) 17 Dip solder resist layer 2 0 Conductive layer 2 5 a First Coating 2 5b Second coating (please read the precautions on the back before filling this page) Order printed by the Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Cooperatives This paper is printed in accordance with China National Standard (CNS) A4 (210X297 mm) -24-

Claims (1)

526570 經濟部智慧財產局員工消費合作社印製 A8 B8 C8 D8________六、申請專利範圍 彳 1 · 一種印刷配線基材,屬於具備絕緣基材,及於該 絕緣基材之一方面從導電層所形成的配線圖案,.於上述配 線圖案之至少一部分具備錫系合金所構成之錫系合金鍍層 的印刷配線基材,其特徵爲: 1 上述錫系合金鍍層之平均鍍被膜粒徑爲2 // m)以下者 〇 2 _如申請專利範圍第1項所述之印刷配線基材,其 中’上述錫系合金鍍層之鍍厚爲3 5 // m以下。 3 .如申請專利範圍第1項或第2項所述之印刷面線 基材’其中’上述錫系合金爲錫-祕合金。 4 .如申請專利範圍第1項或第2項所述之印刷配線 基材,其中,上述絕緣基材爲具有可撓性之薄膜。 5 .如申請專利範圍第1項或第2項所述之印刷配線 基材,其中,上述錫系合金鍍層爲藉由施加脈衝電壓之電 解鍍所形成者。 6 . —種電解錫系合金鍍方法,其特徵爲:在印刷配 線基材之配線圖案之至少一部分形成錫系合金所構成的鍚 系合金鍍層時,於鍍電極間施加脈衝電壓。 7 ·如申請專利範圍第6項所述之電解錫系合金鍍方 法,其中,爲了在上述鍍電極間施加脈衝電壓,使用規貝fj 性地斷續直流電壓的截波器。 8 .如申請專利範圍第6項或第7項所述之電解鍚系 合金鍍方法,其中,上述脈衝電壓係施加成對於整體施加 時間之通電時間之比的作用比D爲1 / 2以下。 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) "~^' -25- (請先閱讀背面之注意事項再填寫本頁) 、11 d m h —Lr - I ==¾ 1--- —I— I - - i - I I -....... 526570 A8 B8 C8 D8 六、申請專利範圍 2 9 .如申請專利範圍第6項或第7項所述之電解錫系 合金鍍方法,其中,上述脈衝電壓係施加成對於整體施加 時間之通電時間之比的作用比D爲1 / 3以下。 1 0 ·如申請專利範圍第6項或第7項所述之電解錫 系合金鍍方法,其中,將上述錫系合金鍍層之平均鍍被膜 粒徑作成2 # m以下。 1 1 ·如申請專利範圍第6項或第7項所述之電解錫 系合金鍍方法,其中,將上述錫系合金鍍層之鍍厚作爲 3 5 # m以下。 ' 1 2 ·如申請專利範圍第6項或第7項所述之電解錫 系合金鍍方法,其中,藉由將上述印刷配線基材之一部分 以浸漬於鍍液之狀態下施加脈衝電壓,於上述配線圖案之 一部分形成上述錫系合金鍍層。 丨3 .如申請專利範圍第6項或第7項所述之電解鍚 系合金鍍方法,其中,上述印刷配線基材係在具有可撓性 之薄膜所構成的絕緣基材上具有上述配線圖案。 ----7---;----·ι裝-- (請先閱讀背面之注意事項再填寫本頁) 訂 .«« 經濟部智慧財產局員工消費合作社印製 -1ΤΙ .1.1 —Lr. 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -26-526570 Printed by A8 B8 C8 D8________ of Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs VI. Patent Application 彳 1 · A printed wiring substrate, which is provided with an insulating substrate and formed from a conductive layer on one of the insulating substrate The wiring pattern is a printed wiring substrate provided with a tin-based alloy plating layer made of a tin-based alloy on at least a part of the wiring pattern, characterized in that: 1 The average coating particle diameter of the tin-based alloy plating layer is 2 // m ) The following 〇 2 _ The printed wiring substrate described in item 1 of the scope of patent application, wherein the above-mentioned tin-based alloy plating layer has a plating thickness of 3 5 // m or less. 3. The printed surface thread substrate according to item 1 or item 2 of the scope of the patent application, wherein the above-mentioned tin-based alloy is a tin-secret alloy. 4. The printed wiring substrate according to item 1 or 2 of the scope of patent application, wherein the insulating substrate is a flexible film. 5. The printed wiring substrate according to item 1 or item 2 of the scope of patent application, wherein the tin-based alloy plating layer is formed by electrolytic plating applied with a pulse voltage. 6. An electrolytic tin-based alloy plating method, characterized in that when at least a part of a wiring pattern of a wiring substrate is printed to form a rhenium-based alloy plating layer composed of a tin-based alloy, a pulse voltage is applied between the plating electrodes. 7 · The electrolytic tin-based alloy plating method according to item 6 of the scope of the patent application, in order to apply a pulse voltage between the plating electrodes, a chopper with intermittent DC voltage is used. 8. The electrolytic hafnium-based alloy plating method according to item 6 or item 7 of the scope of the patent application, wherein the above-mentioned pulse voltage is applied so that the effect ratio D of the ratio of the energization time to the overall application time is 1/2 or less. This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) " ~ ^ '-25- (Please read the precautions on the back before filling this page), 11 dmh —Lr-I == ¾ 1- -—I— I--i-II -....... 526570 A8 B8 C8 D8 VI. Application for patent scope 2 9. Electrolytic tin-based alloy as described in item 6 or 7 of patent application scope In the plating method, the pulse voltage is applied so that the effect ratio D of the ratio of the conduction time to the entire application time is 1/3 or less. 10 · The electrolytic tin-based alloy plating method according to item 6 or 7 of the scope of patent application, wherein the average particle diameter of the plating film of the above-mentioned tin-based alloy plating layer is 2 # m or less. 1 1 · The electrolytic tin-based alloy plating method as described in item 6 or 7 of the scope of patent application, wherein the plating thickness of the above-mentioned tin-based alloy plating layer is 3 5 # m or less. '1 2 · The electrolytic tin-based alloy plating method as described in item 6 or 7 of the scope of the patent application, wherein a pulse voltage is applied to a part of the printed wiring substrate in a state of being immersed in a plating solution, and A part of the wiring pattern forms the tin-based alloy plating layer.丨 3. The electrolytic samarium alloy plating method according to item 6 or item 7 of the scope of patent application, wherein the printed wiring substrate has the wiring pattern on an insulating substrate made of a flexible film. . ---- 7 ---; ---- · ιinstall-- (Please read the notes on the back before filling out this page) Order. «« Printed by the Intellectual Property Bureau of the Ministry of Economy Staff Consumer Cooperatives-1Τ. 1.1 — Lr. This paper size is applicable to China National Standard (CNS) A4 (210X297mm) -26-
TW091100971A 2001-02-13 2002-01-22 Printed wiring base material and electrolytic tin-base alloy plating method TW526570B (en)

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JP3741683B2 (en) 2002-12-13 2006-02-01 三井金属鉱業株式会社 Method of manufacturing film carrier tape for mounting electronic component and plating apparatus usable in this method
JP3723963B2 (en) * 2003-06-06 2005-12-07 三井金属鉱業株式会社 Plating apparatus and film carrier tape manufacturing method for electronic component mounting
US7977959B2 (en) * 2007-09-27 2011-07-12 Formfactor, Inc. Method and apparatus for testing devices using serially controlled intelligent switches
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US5750017A (en) * 1996-08-21 1998-05-12 Lucent Technologies Inc. Tin electroplating process
JP2001110666A (en) * 1999-10-08 2001-04-20 Murata Mfg Co Ltd Electronic component, and manufacturing method thereof

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WO2013020306A1 (en) * 2011-08-05 2013-02-14 深圳市华星光电技术有限公司 Liquid crystal plate and chip-on-film tape coiling substrate
TWI574853B (en) * 2012-08-01 2017-03-21 Toppan Printing Co Ltd Gravure printing and gravure printing

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