TW511436B - Improved print manufacturing method for laminated devices - Google Patents
Improved print manufacturing method for laminated devices Download PDFInfo
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- TW511436B TW511436B TW90116214A TW90116214A TW511436B TW 511436 B TW511436 B TW 511436B TW 90116214 A TW90116214 A TW 90116214A TW 90116214 A TW90116214 A TW 90116214A TW 511436 B TW511436 B TW 511436B
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Description
A7 A7 經濟部智慧財產局員工消費合作社印製 五、發明說明( 種可關::種積層元件之改良印刷製法,尤指-住」间化積層凡件製程之 質之製程方法。 、7”’ ,且可有效提高元件品 目韵,由於電子產品中大八兩 一積體電路中,以使 1刀之电子電路皆已整合於 勢之發展,傳統電= :; =化’而隨著此-趨 達到有效地節省電路板面積的°目的=向小型化發展,以 本,而目前的積層元件製程,::,目對降低製作成 化、小型化電子 J取爷用μ貫施各類平面 在積層元件之製程中;作遽波器等。 時,卻由於既有製程設計不大電流之電子元件 於60〜70%上下無法提昇,发中對於件兀件良率只能停留 件之實施流程,謹配合圖示詳加說明^_用單層基板層積元 首先請參閱第七圖A、Β所-路圖樣(6 0 1 )之網版(6『二其係利用-形成有線 刷形成金屬線路(5 1),又杜失基板(5〇)上印 基板(5〇)之上表面塗佈—V同其係於 下層金屬線路(5 i )之適 g )上相對於 3),用以作電連接之用; 置形成-貫穿孔㈠ 請再參閱第九圖所示,前述 充忒、纟巴緣層(5 2 )之貫穿孔(5 q ” (51)f 3)而與下層金屬線路 ^ ^----- (請先閱讀背面之注意事項寫本頁)A7 A7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention (Kinds can be related to: an improved printing method for laminated components, especially-a quality method for manufacturing interlayer laminated components. 7) ', And can effectively improve the product item rhyme, because the electronic products in the big eight two one integrated circuit, so that one-knife electronic circuits have been integrated in the development of potential, traditional electricity =:; = 化' and with this -To achieve the goal of effectively saving the area of the circuit board = to develop toward miniaturization, and the current multilayer component manufacturing process ::, aims to reduce the production of miniaturized, miniaturized electronics The plane is in the manufacturing process of laminated components; it is used as a wave waver, etc. However, because the existing process design of electronic components with low current cannot be raised or lowered by 60 ~ 70%, the yield of the parts can only stay in the middle of the process. The implementation process, I would like to explain in detail with the illustration ^ _ using a single-layer substrate lamination element first please refer to the seventh version of A, B-road pattern (6 0 1) screen version (6 "two of its use-forming a wire The brush forms a metal circuit (5 1), and it is lost on the substrate (50). The upper surface of the substrate (50) is coated with -V as it is on the appropriate g) of the lower metal circuit (5 i), as opposed to 3), for electrical connection; As shown in the ninth figure, the through hole (5 q ”(51) f 3) of the aforementioned filling and sloping edge layer (5 2) and the underlying metal circuit ^ ^ ----- (Please read the note on the back first Matters written on this page)
n n n I 線!n n n I line!
五、發明說明(>) 請參閱第十圖所示,前述金屬線路 層絕緣層(5 4); ☆上述係為一習知之單層基板 极#王,由於兩層金屬線路(5 1 止兩層金屬線路 4 )上塗佈 〇)積層元件之製造 ^ ( 5 4 )間需形成一防 2 ),加上該絕缓姑m 4 )紐路之絕緣層(5 ◦)上,但二::::=她該基板(5 成-厚度,而造成之後製程之印刷土= (5 0)上形 法平整分佈於基板(5C)) 因而絕緣材料無 兩側形成向下凹陷狀態,是以 )之 難; 、向上增層步驟倍增困 再者,由於絕緣材料於㈣& 氣泡,因此積層元件於燒μ.店曰於、'泉路兩側包覆 9, ^ _ 文鈿守,原包覆於絕緣層.(5 2)之耽泡在適當條件下逸出 門日§ ^ 由卜工洞減低磁效應的 二广 出途録礙晶格結合,甚至造成孔洞或 衣痕,因此,此製程並無法適用於大功率之電子元件。 =吏=絕緣層可呈現平坦狀態,故在塗佈完成絕緣層 成八至四次不等之整平程序,以提高之後上層形 成孟屬線路之可靠度’但是對於此種不甚穩定的製程,因 :於:施高功率電子元件時,由於無法增加線路之截面 積’因此需使用多層基板製程採以並聯方式,將數個功率 較小=電子几件並聯’而達到製作高電流高阻抗之電子元 件’就以設計-高電流量高阻抗值之電感元件來說,若以 多層基板之製作’不僅會增加元件之體積,同時會因絕緣 本紙張尺度適用中國國家標準(CNS)A4規格⑵Q X 297公3 ) A7 五、發明說明(> ) 層之厚度無法控制,而造成Rdc並非正比於xl,是以,杏 壤流出現時,會導致功率損耗而產生高溫。 田 制由上述可知,對於大電流大阻抗之積層元件於此一習 用製^實施,其良率僅為60%〜70%,因此相當耗費製作二 本及時間,由是可知,如何進一步提供更有效之積層製 法,係此業界所應慎思,以有助於此等產業之競爭能力。衣 為此,本發明之主要目的係提供一種形成各絕緣層 7可與金屬線路保持平齊,且不會產生氣泡而導致元件於 最後燒結成型時,破壞元件形成的積層元件製程。 、 欲達上述目的所使用之主要技術手段係包含令上 程包含有以下實施步驟; 衣 線路; 形成第-層金屬線路’係於一基板上形成特定元件 之 向圖一層絕f層’係利用—形成第-層金屬線路反 " 、’’,將絕緣材料補入金屬線路與基板間; 形成絕緣隔離層,係塗佈一層絕緣材料於第^全屬 線路與絕緣層之表面; 9孟屬 上述步驟主要係透過網版將液離 線路以外之空間,咅即m 表材科填充於金屬 緣材料,即可與_;呈現;覆;f 材料全面塗佈於金屬材料與絕緣隔離層之上端面, 一絕緣隔離層,此一絕緣隔離層因 ^形成 層呈呈平齊狀,因而可保持,二〜屬二路及絕緣 增層,由是可知,透過此一方式即可:居即:向上繼續 J便積層7C件於製作線 本纸張尺度翻t關緒i^NS)A4驢⑵ 511436 Λ7 五 經濟部智慧財產局員工消費合作社印制π 、發明說明(1) 路時可保持在固定位置,並且上下屑 亦不會為絕緣隔離層所阻塞;是曰太路之電連接孔 積層元件之製作良率。 “明即可有效提高 制r本月:次一目的係提供一種適合大功率電子元件之 广:樣利用上述製程步驟製作截面積較大之金屬線 :面二^作單層大功率電子元件之可行性,藉由較大 =之線路使電流量增大,而可於單層基板上製作完成 大電>;,L、大阻抗的電子元件。 為使貴審查委員能進—步瞭解本發明具體之設計及 其他目的,茲附以圖式詳細說明如后: (一)圖式部份: 第一圖A、B:係本發明之-較佳實施例之剖面圖,其揭 不一網版於一基板上形成特定圖樣之金屬 線路。 係本發明之一較佳實施例之剖面圖,其揭 不一反金屬線路之網版於基於金屬線路側 邊形成平齊之絕緣層狀態。 係本發明之一較佳實施例之剖面圖,其揭 示一網版於第一絕緣隔離層上形成貫穿孔 狀態。 係本發明之一較佳實施例之剖面圖,其揭 不一網版於第一絕緣隔離層上形成特定圖 樣之金屬線路。 係本發明之一較佳實施例之剖面圖,其揭V. Description of the Invention (>) Please refer to the tenth figure, the aforementioned metal circuit layer insulation layer (5 4); ☆ The above is a conventional single-layer substrate pole #King. Two layers of metal lines 4) Coated 0) Manufacture of laminated components ^ (5 4) A defense 2) needs to be formed between them, plus the insulation layer (5 ◦) of the insulation layer (5 ◦), but two :::: = The substrate (50% -thickness, and the printing soil of the subsequent process = (50)) the topography method is evenly distributed on the substrate (5C)). Therefore, there is no depression on both sides of the insulating material. It ’s difficult; doubling the step up. Furthermore, because the insulating material is trapped on the ㈣ & bubble, the laminated components are burnt μ. The shop says, 'The two sides of the spring road are covered with 9, _ _ Wen 钿 shou, the original Covered with an insulating layer. (5 2) The delay of escape under appropriate conditions. ^ ^ The two-way out of the Guangxi where the magnetic effect is reduced by the Pudong hole hinders lattice bonding and even causes holes or clothing marks. Therefore, this The manufacturing process cannot be applied to high-power electronic components. = Clerk = The insulation layer can be flat, so after the coating is completed, the insulation layer can be leveled from eight to four times to improve the reliability of the upper layer to form a Monsoon line. But for this unstable process Because: In the application of high-power electronic components, because the cross-sectional area of the circuit cannot be increased, it is necessary to use a multi-layer substrate process in parallel, and several powers are small = several electronics are connected in parallel to achieve high current and high impedance. The electronic components 'for the design of high-current and high-resistance inductive components, if the multilayer substrate is made' will not only increase the volume of the components, but also apply the Chinese National Standard (CNS) A4 specification due to the insulation of this paper. ⑵Q X 297 male 3) A7 V. Description of the invention (>) The thickness of the layer cannot be controlled, and the Rdc is not proportional to xl. Therefore, when the apricot flow occurs, it will cause power loss and high temperature. From the above, Tian Zhi knows that the multilayer device with large current and high impedance is implemented in this custom system. Its yield is only 60% ~ 70%, so it takes a lot of time to make two books. It can be seen how to further provide more effective The multi-layered manufacturing method should be carefully considered by this industry to help the competitiveness of these industries. For this reason, the main object of the present invention is to provide a process for forming a laminated component in which each insulating layer 7 can be kept flush with the metal circuit without generating bubbles and causing the component to be sintered and formed during the final sintering and molding. The main technical means used to achieve the above purpose is to include the following steps in the upper process; clothing lines; forming the first layer of metal circuits 'form a layer of a specific element on a substrate to form a layer of insulating layer' using- Form the first layer of metal circuit, "," to fill the insulating material between the metal circuit and the substrate; form an insulating isolation layer, apply a layer of insulating material on the surface of the third line and the insulating layer; 9 The above steps are mainly through the screen to fill the space other than the liquid separation line, that is, the m sheet material section is filled with the metal edge material, which can be covered with the _; present; cover; the f material is fully coated on the metal material and the insulation isolation layer On the end face, there is an insulating isolation layer. This insulating isolation layer can be maintained because the formation layer is in a flat shape, so it belongs to the two-way and insulation build-up layer. It is known that this way can be used: Continue to build up 7C pieces and turn the paper size on the production line. Guan Xu i ^ NS) A4 donkey ⑵ 511436 Λ7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, π, invention description (1) can be kept at Fixed position And cuttings will not blocked by the upper and lower insulating isolation layer; is too passage of said electrical connection member of the production yield of the laminate hole. "Ming can effectively improve the production of this month: the next purpose is to provide a wide range of suitable high-power electronic components: the use of the above process steps to make a large cross-sectional area of the metal wire: surface two ^ as a single-layer high-power electronic components Feasibility, through the larger line to increase the amount of current, and can be completed on a single-layer substrate with large electric >, L, large impedance electronic components. In order to allow your reviewers to further understand this The specific design and other purposes of the invention are detailed with drawings as follows: (1) Schematic part: The first figures A and B are cross-sectional views of the preferred embodiment of the present invention, which are different. The screen plate forms a metal circuit with a specific pattern on a substrate. It is a cross-sectional view of a preferred embodiment of the present invention, which reveals that the screen plate of an anti-metal circuit forms a level insulation layer on the side of the metal circuit. It is a cross-sectional view of a preferred embodiment of the present invention, which discloses a screen plate forming a through-hole state on the first insulating isolation layer. It is a cross-sectional view of a preferred embodiment of the present invention, which does not expose a screen plate on A specific pattern is formed on the first insulating isolation layer Metal lines. One of the preferred system of the present invention is a cross-sectional view of the embodiment, which Jie
第二圖A、BSecond picture A, B
第三圖A、BThird picture A, B
弟四圖A、BBrother four pictures A, B
第五圖A、B I_________6 本紙張尺度適用中國國家標準(CNS)A4規格(210 裝--- (請先間讀背面之注意事項寫本頁) J^T· -線· A7 發明說明( 第 六圖 第七圖The fifth picture A, B I_________6 This paper size is applicable to China National Standard (CNS) A4 specification (210 packs --- (please read the precautions on the back first to write this page) J ^ T · -line · A7 Description of the invention ( Six pictures Seven pictures
弟八匿I 第九 第十 第十 不網版於第二絕緣隔離層上形成貫穿孔 狀態。 A、B :係本發明之於交流、直流狀態所分別量測 到之阻抗值。 B ·係習用積層元件之一剖面圖,其揭示一網 # 版於一基板上形成特定圖樣之金屬線路。 m積層元件之-剖面圖,其揭示-網版於-第一絕緣層上形成一貫穿孔狀態。 •係習用積層元件之一剖面圖,其揭示一網版於第 系巴緣層上形成一第二金屬線路。 •係習用積層元件之一剖面圖,其揭示一網版於一 第二絕緣層上形成另一貫穿孔之狀態。 圖·係本發明之於交流、直流狀態所分別量測到之 阻抗值。 圖號部份: ----------------- (請先閱讀背面之注意事項B寫本頁) 訂· 經濟部智慧財產局員工消費合作社印制农 10 12 14 16 2 0 2 1 2 2 5 0 5 2 )基板 )第一絕緣層 )第一絕緣隔離層 )貫穿孔 )網版 )網版 )網版 )基板 )第一絕緣層 (1 1 )第一金屬線路 (1 3 )第二絕緣層 (1 5 )第二絕緣隔離層 (17)第二金屬線路 (2 0 1 )線路圖樣 (2 1 1 )反線路圖樣 (2 2 1 )貫穿孔圖樣 (51)第一金屬線路 (5 3 )貫穿孔 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) M1436 A7 經濟部智慧財產局員工消費合作社印製 五、發明說明(^ ) ::乂)第二金屬線路 (55)第二絕緣隔離層 )網版 (6 0 1 )線路圖樣 切明之製程係可使基板上各層絕緣隔離層接近水平 心,而使基板之金屬線路截面積較習用者為大,以便 以:f基板上形成大功率之電子元件’其中該製程係包含 M下數道步驟:—形成金屬線路,係於-基板(工〇 )上形成特定電子 :件之金屬線路(11)(如第—圖A所示),其係利用 —形成有特m線路圖樣(2 Q丄)之網版(2 〇) 將金屬線路(ii)以印刷方式形成於該基板 上,如第一圖B所示; 形成絕緣層(12),係湘與前道㈣形成有 路圖樣(211)之網版(川,用以將絕緣材 枓填補於金屬線路(11)與基板(10)間,如第二圖 A、B所示; 形成絕緣隔離層(1 4),係塗佈一層絕緣材料 -層金屬線路(i工)與絕緣層(丄2 )之上端面 二圖A所示; 形成貫穿孔(1 6 ),係於該絕緣隔離層(丄4)形 成與下層金屬線路(11)連接之貫穿孔(16) ’如第 三圖B所示’利用網版(2 2)將其上貫穿孔圖樣(2 21 )在形成於絕緣隔離層(i 4)相對於下層金屬線路 (1 ◦)的特定位^ ’再利用飯刻方法向下形成貫穿孔(16); 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱) (請先閱讀背面之注意事項1 --- ▼寫本頁) . 丨線 A7 五、發明說明(y ) 充於八:飧驟係主要透過網版(2 2 )將液態絕緣材料填 ==路(11)以外之空間,而不將基板(1〇) 上之金屬線路(1 1 )费 間包胃## " 设现住,藉此,即不會於線路兩側 ^住m形成孔洞或裂痕。 ㈣四圖所示,係為本發明欲往上形成數層金屬 =圖二先請參閱_Α所示,若第二層 *於該絕緣==== 層(…、第金屬線路(17)、第二絕緣 隔離層(1 4 )之上 層(1 5 )形成於該第-絕緣 屬線路(1Ί”五圖α、β所示,藉此,各金 絕緣隔離層(15)之/;?於平齊之基板(1〇)及 ,Λ . . 7 . ;之^面上,故可加大金屬線路(工 女雷泣A 截面積,而提高其電流量,意即,可製作 大電/;丨L及大電阻的電子元件。 、厂可4本發明係透過一形成斑該層金屬终跋4 網版,有效地於線路兩侧形成絕緣層:而;4目 屬線路之兩側向下凹緣隔離層形成後於形成有金 截面積較大之金=:, 子元件之目的,除此之外ΐ到以早層基板形成大功率電 之外’ _第六圖A、Β及第十一 。圖::,分別為本發明與習用之積層元 圖、、中虛線部份係為最佳電氣特性 由 圖示可知,第六圖A及第十-圖A係為量測該積層i件; (請先閱讀背面之注意事項寫本頁) 裝 訂·--- 線· 經濟部智慧財產局員工消費合作社印製The younger brother I, the ninth, the tenth, the tenth, do not screen form a through-hole state on the second insulating isolation layer. A, B: The impedance values respectively measured in the AC and DC states of the present invention. B · is a cross-sectional view of a conventional multilayer component, which reveals that a net # plate forms a metal pattern with a specific pattern on a substrate. A cross-sectional view of an m-layered component, which reveals that the screen forms a through-hole state on the first insulating layer. • A cross-sectional view of a conventional laminated component, which reveals that a screen plate forms a second metal circuit on the first marginal layer. • A cross-sectional view of a conventional laminated component, which reveals a state where a screen plate forms another through hole on a second insulating layer. Fig. Shows the impedance values measured in the AC and DC states of the present invention. Part of drawing number: ----------------- (Please read the note B on the back first to write this page) 14 16 2 0 2 1 2 2 5 0 5 2) substrate) first insulating layer) first insulating isolation layer) through-hole) screen plate) screen plate) screen plate) substrate) first insulating layer (1 1) first Metal line (1 3) Second insulation layer (1 5) Second insulation isolation layer (17) Second metal line (2 0 1) Line pattern (2 1 1) Anti-line pattern (2 2 1) Through-hole pattern ( 51) The first metal circuit (5 3) through-hole The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) M1436 A7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (^) :: 乂) The second metal circuit (55), the second insulation and isolation layer) and the screen (6 0 1). The process of making the circuit pattern clear can make each layer of the insulation and isolation layer on the substrate close to the horizontal center, so that the cross-sectional area of the metal circuit on the substrate. It is larger for conventional users in order to: form high-power electronic components on f substrates, where the process includes several steps of M:-forming a metal circuit, which is based on- A metal circuit (11) (as shown in Fig. A) forming a specific electron: piece on (work 〇) is formed by using a screen (2 〇) with a special circuit pattern (2 Q 丄) to form a metal The circuit (ii) is formed on the substrate by printing, as shown in the first figure B; forming an insulating layer (12), which is a screen version (Sichuan) with a road pattern (211) formed by Xiang and Qiandao The insulating material 枓 is filled between the metal circuit (11) and the substrate (10), as shown in the second figure A and B; forming an insulating isolation layer (1 4), which is coated with a layer of insulating material-layer metal circuit (i) And the upper end face of the insulating layer (丄 2) as shown in Figure A; forming a through-hole (1 6), and forming a through-hole (16) connected to the insulating isolation layer (丄 4) to the lower metal line (11) ' As shown in the third figure B, 'the screen pattern (2 21) is used to form the through-hole pattern (2 21) at a specific position of the insulating isolation layer (i 4) with respect to the underlying metal circuit (1 ◦) ^' The through-holes (16) are formed downwards using the method of rice carving; this paper size applies to China National Standard (CNS) A4 (210 X 297 public love) (Please read the precautions on the back first 1 --- ▼ Write this page). 丨 Line A7 V. Description of the invention (y) Fill in eight: The step is to fill the space other than the road (11) with the liquid insulating material mainly through the screen (2 2), The metal circuit (1 1) 费 间 包 wei ## on the substrate (10) is not set up, so that holes or cracks will not be formed on both sides of the circuit. Figure 24 shows the number of layers of metal that the present invention intends to form. Figure 2 Please refer to _A first. If the second layer is on the insulation ==== layer (..., the first metal circuit (17) The upper layer (1 5) of the second insulating isolation layer (1 4) is formed on the first insulating line (1 五), as shown in Figures 5 and 5 of the fifth figure, whereby the gold insulating isolation layers (15) are / On the flat surface of the substrate (10) and Λ.. 7.;, It is possible to increase the metal circuit (cross section area of the worker girl Lei A, and increase its current, which means that it can make large electricity /; 丨 L and large resistance electronic components. Factory can be used. The present invention is to form a spot through the layer of metal, which can effectively form an insulating layer on both sides of the line: and 4 meshes are on both sides of the line. After the formation of the downward recessed edge isolation layer, a large gold cross-sectional area is formed = :, the purpose of the sub-element, in addition to the formation of high-power electricity with an early substrate '_ sixth figure A, B And the eleventh. Figures :: This is a multi-layer diagram of the present invention and the conventional, and the dotted lines in the middle are the best electrical characteristics. From the illustration, the sixth figure A and the tenth-figure A are measurements The product i pieces; (Please read the Notes on the back to write this page) stapling --- · wire · Ministry of Economic Affairs Intellectual Property Office employees consumer cooperatives printed
本紙張尺度適用中國國家標準 511436 A7 五、發明說明(^ ) =阻抗圖示,本發明很明顯地較習用製程之元件穩定地 於该理想範圍,又請參照第六圖B與第十一圖B所 不,係為量測本發明與習用製程之積體元件的直流阻抗’ 此直流阻抗值應愈小愈佳,而同樣可明顯得知本發明之直 流阻抗分佈較習用穩定集中且小,综上所 納出以下幾項優點: 」~ 1 ·有效防止裂痕、孔洞產生。 2 ·適合大功率電子元件(如具有大阻抗 性者)製作。 井寸 3 ·配合薄膜製程方法,可達到電子元件體積、 小型化目標。 '領 4 ·製程步驟簡單。 因此,本發明之設計符合發明專利之要件,爰依法且 文提出申請。 ” (請先閱讀背面之注意事項^^寫本頁; i壯衣 Ί^τ·This paper scale applies Chinese national standard 511436 A7. 5. Description of the invention (^) = Impedance diagram. The present invention is obviously more stable in this ideal range than conventional process components. Please refer to Figure 6B and Figure 11 No. B is to measure the DC impedance of the integrated components of the present invention and the conventional process. This DC impedance value should be as small as possible, and it is also obvious that the DC impedance distribution of the present invention is more stable and concentrated than conventional ones. To sum up, the following advantages are included: "~ 1 · Effectively prevent cracks and holes. 2 · Suitable for high power electronic components (such as those with high impedance). Well inch 3 · With the thin film manufacturing method, the volume and miniaturization of electronic components can be achieved. 'Collar 4 · The process steps are simple. Therefore, the design of the present invention complies with the requirements of the invention patent, and the application is submitted in accordance with the law. "(Please read the precautions on the back ^^ to write this page; i 壮 衣 Ί ^ τ ·
-線 .經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐)-Line. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized for China National Standard (CNS) A4 (210 x 297 mm)
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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TW90116214A TW511436B (en) | 2001-07-03 | 2001-07-03 | Improved print manufacturing method for laminated devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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TW90116214A TW511436B (en) | 2001-07-03 | 2001-07-03 | Improved print manufacturing method for laminated devices |
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TW511436B true TW511436B (en) | 2002-11-21 |
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TW90116214A TW511436B (en) | 2001-07-03 | 2001-07-03 | Improved print manufacturing method for laminated devices |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI407868B (en) * | 2010-04-14 | 2013-09-01 | Zhen Ding Technology Co Ltd | Method for manufacturing printed circuit board |
CN103298247A (en) * | 2012-02-24 | 2013-09-11 | 宏恒胜电子科技(淮安)有限公司 | Circuit board and manufacturing method thereof |
-
2001
- 2001-07-03 TW TW90116214A patent/TW511436B/en not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI407868B (en) * | 2010-04-14 | 2013-09-01 | Zhen Ding Technology Co Ltd | Method for manufacturing printed circuit board |
CN103298247A (en) * | 2012-02-24 | 2013-09-11 | 宏恒胜电子科技(淮安)有限公司 | Circuit board and manufacturing method thereof |
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