JP2003234231A5 - - Google Patents

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Publication number
JP2003234231A5
JP2003234231A5 JP2002032698A JP2002032698A JP2003234231A5 JP 2003234231 A5 JP2003234231 A5 JP 2003234231A5 JP 2002032698 A JP2002032698 A JP 2002032698A JP 2002032698 A JP2002032698 A JP 2002032698A JP 2003234231 A5 JP2003234231 A5 JP 2003234231A5
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JP
Japan
Prior art keywords
conductor pattern
ceramic green
green sheet
laminate
electronic component
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Pending
Application number
JP2002032698A
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Japanese (ja)
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JP2003234231A (en
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Priority to JP2002032698A priority Critical patent/JP2003234231A/en
Priority claimed from JP2002032698A external-priority patent/JP2003234231A/en
Publication of JP2003234231A publication Critical patent/JP2003234231A/en
Publication of JP2003234231A5 publication Critical patent/JP2003234231A5/ja
Pending legal-status Critical Current

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Claims (6)

絶縁体層と導体パターンを積層し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に、感光剤入りの絶縁材料で形成された絶縁体層と感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンとが積み重ねられる工程と、該絶縁体層と該導体パターンの積層体を該支持体から剥離した後、該積層体の少なくとも一方の表面にセラミックグリーンシートを積層し、これらを一体焼成する工程を有することを特徴とする積層型電子部品の製造方法。In a method for manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed by the conductor pattern in the laminate,
A step in which an insulator layer formed of an insulating material containing a photosensitive agent and a conductor pattern formed by a photolithography technique using a photosensitive conductive paste are stacked on a support; and the lamination of the insulator layer and the conductor pattern A method for producing a multilayer electronic component comprising the steps of: laminating a body from the support, laminating ceramic green sheets on at least one surface of the laminate, and firing these integrally. 絶縁体層と導体パターンを積層し、積層体内に該導体パターンによって回路素子が形成された積層型電子部品の製造方法において、
支持体上に、感光剤入りの絶縁材料で形成された絶縁体層と感光性導電ペーストを用いフォトリソ技術によって形成された導体パターンとが積み重ねられる工程、該支持体上に形成された絶縁体層と導体パターンの積層体と、セラミックグリーンシートとを積層、圧着した後、該支持体を該積層体から剥離する工程及び、該積層体の該支持体が付着していた表面上にセラミックグリーンシートを積層、圧着し、これらを一体焼成する工程を有することを特徴とする積層型電子部品の製造方法。In a method for manufacturing a laminated electronic component in which an insulator layer and a conductor pattern are laminated, and a circuit element is formed by the conductor pattern in the laminate,
A step in which an insulating layer formed of an insulating material containing a photosensitive agent and a conductor pattern formed by a photolithography technique using a photosensitive conductive paste are stacked on the support; an insulating layer formed on the support And laminating and pressing the laminate of the conductor pattern and the ceramic green sheet, and then peeling the support from the laminate, and the ceramic green sheet on the surface of the laminate to which the support was attached A method for producing a multilayer electronic component comprising the steps of laminating and press-bonding and integrally firing these. 前記絶縁体層間の所定の導体パターンが前記絶縁体層のスルーホール内の導体を介して接続され、積層体内に該導体パターンによって回路素子が形成された請求項１又は２に記載の積層型電子部品の製造方法。  The stacked electron according to claim 1 or 2, wherein a predetermined conductor pattern between the insulator layers is connected via a conductor in a through hole of the insulator layer, and a circuit element is formed by the conductor pattern in the laminate. A manufacturing method for parts. 前記スルーホールがフォトリソ技術又はレーザ加工によって形成される請求項３に記載の積層型電子部品の製造方法。  The method for manufacturing a multilayer electronic component according to claim 3, wherein the through hole is formed by photolithography or laser processing. 前記積層体と前記セラミックグリーンシート間に接着層が設けられた請求項１、２、３、４のいずれかに記載の積層型電子部品の製造方法。  The method for manufacturing a multilayer electronic component according to claim 1, wherein an adhesive layer is provided between the multilayer body and the ceramic green sheet. 前記セラミックグリーンシートが、絶縁性セラミックグリーンシート、磁性体セラミックグリーンシート、非磁性体セラミックグリーンシート、誘電体セラミックグリーンシートのいずれかである請求項１、２、３、４、５のいずれかに記載の積層型電子部品の製造方法。  The ceramic green sheet is any one of an insulating ceramic green sheet, a magnetic ceramic green sheet, a nonmagnetic ceramic green sheet, and a dielectric ceramic green sheet. The manufacturing method of the multilayer electronic component of description.
JP2002032698A 2002-02-08 2002-02-08 Method of manufacturing laminated electronic component Pending JP2003234231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002032698A JP2003234231A (en) 2002-02-08 2002-02-08 Method of manufacturing laminated electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002032698A JP2003234231A (en) 2002-02-08 2002-02-08 Method of manufacturing laminated electronic component

Publications (2)

Publication Number Publication Date
JP2003234231A JP2003234231A (en) 2003-08-22
JP2003234231A5 true JP2003234231A5 (en) 2005-08-11

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ID=27775739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002032698A Pending JP2003234231A (en) 2002-02-08 2002-02-08 Method of manufacturing laminated electronic component

Country Status (1)

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JP (1) JP2003234231A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4178259B2 (en) * 2002-09-02 2008-11-12 株式会社村田製作所 Manufacturing method of electronic parts
JP2006041081A (en) * 2004-07-26 2006-02-09 Mitsubishi Materials Corp Composite common mode choke coil and manufacturing method therefor
US8601673B2 (en) * 2010-11-25 2013-12-10 Cyntec Co., Ltd. Method of producing an inductor with a high inductance
KR101297579B1 (en) * 2010-12-22 2013-08-19 한국세라믹기술원 Manufacturing method of micro-patterned electrode

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