TW486791B - Method for improving adhesion between encapsulation material and circuit substrate having a solder resist layer - Google Patents

Method for improving adhesion between encapsulation material and circuit substrate having a solder resist layer Download PDF

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TW486791B
TW486791B TW89128236A TW89128236A TW486791B TW 486791 B TW486791 B TW 486791B TW 89128236 A TW89128236 A TW 89128236A TW 89128236 A TW89128236 A TW 89128236A TW 486791 B TW486791 B TW 486791B
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Taiwan
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substrate
solder resist
circuit
resist layer
circuit substrate
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TW89128236A
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Chinese (zh)
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Sheng-Chun Ho
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Advanced Semiconductor Eng
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Abstract

A method for improving adhesion between an encapsulation material and a circuit substrate having a solder resist comprises: using a permanganate encapsulation residue removal process to roughen the surface of the circuit substrate having a solder resist layer. In another preferred embodiment according to the present invention, the surface roughening step of the circuit substrate having a solder resist layer can be accomplished by a plasma encapsulation residue removal process, a sand spraying process, or a brush polishing process.

Description

五、發明說明G) 【發明領域】 板,其特別' ^ ^於用以形成電子封裝構造的電路義 板間附著力的方:T種改善封膠塑料與具有防銲層電:基 【先前技術】V. Description of the invention G) [Field of the invention] board, which is particularly used to form the adhesion between the circuit boards used to form the electronic package structure: T kinds of improved sealant plastic and has a solder resist layer: based [previously technology】

基構造-般包含-個以上的主動元件設於一I 半導體晶片。構、f!”:、砷化鍺或砷化鎵製成的 裝(SCM),而包含^杳二右,、包έ 一個元件稱為單—晶片: (則)。該電子封h盖、Α 裝構“冉為多晶片封裝 導_曰μ ^ 裝構造一般具有一封膠體用以密封誃主 方、去二:成'且提供絕緣。該封膠體一般係利用習知的鑄r 如轉注成形法(tr_"〇ldlng);以 將封膠塑料;置於一模具之膜穴内幾 赤ίΐ基板一般包含一層導電材才斗(通常為銅或鍍有銲錤 :’的:)承載於一介電層(通常為玻璃纖維強化環氧樹 曰)。電路基板具有兩層導電電路(conduct 〇r circui 、 面者,稱為雙層基板。而為了容納更多電路 农早一暴板中,一般係將數層導電電路夾設 製成多層基板。 ’丨$層間而 習知電路基板製程包含:(A )將一導電金屬層以習用之 方法層壓(laminating)於一介電層之兩面。(B)在該基板 上形成介層洞(via)或通孔(through-hole)。並且以習知 的方法如無電極電錢(electr〇iess piating)在該介層洞The base structure generally includes more than one active device on an I semiconductor wafer. Structure, f! ":, a package made of germanium arsenide or gallium arsenide (SCM), which contains two components, called a single chip: (then). The electronic seal, cover, Α device structure "Ran is a multi-chip package." The device structure generally has a piece of gel to seal the main body, go to the second side, and provide insulation. The sealant generally uses the conventional casting method such as transfer molding (tr_ "〇ldlng); to seal the plastic; placed in a film cavity of a mold. The substrate generally contains a layer of conductive material (usually copper). Or plated with solder: ':' Carry on a dielectric layer (usually glass fiber reinforced epoxy tree). A circuit substrate has two layers of conductive circuits (conductor circuits), which are called double-layer substrates. In order to accommodate more circuits in a farm board, several layers of conductive circuits are generally sandwiched into a multilayer substrate.丨 $ The conventional circuit substrate manufacturing process includes: (A) laminating a conductive metal layer on both sides of a dielectric layer in a conventional manner. (B) forming a via in the substrate Or through-hole, and through conventional methods such as electrodeless piating in the via hole

486791 五、發明說明(2) 或通孔塗覆一層導電金屬。(c)以微影 (Photol ithography)以及蝕刻(etching) 上導電金屬層中形成所要之導電電路。 ^在该基板 的防銲劑—Ie solder resist)塗佈 表面’轉移所要之圖案,然後顯影形成 时;板 佳之材料例如金或鈀電鍍在未被防 )才科、W力 層。在步驟⑻甲,鑽孔製程將留下:膜缝覆導電金屬 (smear)农孔洞中,由於這些膠渣會導致信賴性 (je^abUity problem),因此必須在無電極電鍍 仃刖去除。目前已有數種去膠渣製程係 ^ : 有數種機械或化學去勝渣方法揭示於美國:::知。例如 4/01,783號揭示。常見之去膠渣製程係 『來移除樹脂膠邊,其揭示於美國專利第 一般而言,由於封膠體與電路基板表 ^ 面大致上相當平坦,因此封膠體與防辉膜間的方;:=, (bonding mechanism)幾乎僅為化學鍵結而沒 (mechanic interlock)的機構,所以在」 境下(例如壓力銷試驗(pressure c〇〇k二=濕的環 = 間的介面易受水之侵餘而形成巨觀上封膠 體與防知膜間之脫層(delaminati〇n)。 【發明概要】 本發明因此提供一種改善封膠塑料與具有防銲層之電路 POO-161, ptd 第5頁 4^6791 五、發明說明(3) 基板間附著力的方法, 術的問題。 藉此克服或至少改善前述之先前技 $艮據本發明之改善封膠塑料與具有防銲層之電路基板間 ,著力的方法,其包含利用一高锰酸鹽去膠渣製程來粗化 ></、有防知層之電路基板表面。該高盆酸鹽 <去膠渣製程主 要包含以,種不同溶液依序處理,這些溶液依序為膨潤溶 液(例如一甘醇 丁基醚(die thy 1 ene glycol monobuty 1 ej h e r )) 驗性向猛酸鹽溶液以及中和溶液(例如無機酸 X /、中 °亥驗性局猛酸鹽溶液亦可由驗性重絡酸趟 >谷液取代。 在本發明其他較佳實施例中,該具有防銲層之電路基板 ί面粗化步驟係可藉由電槳去膠渣製程、喷砂製程或刷磨 製程達成。 由於該電路基板表面之防銲層在經過表面粗化處丨^^係 呈現粗糙狀,所以在該防銲層/封膠體介面之粘著機 了 ^學鍵結外而尚有機械互鎖機構,由於機械互鎖機構具 =抗化學溶劑(例如水)之特性,所以可以使利用根據: 發明之基板而形成之電子封裝構造在高溫高壓高濕的環境 下(例如壓力鍋試驗)仍有極佳之可靠性。 【發明說明】 用於本發明之電路基板一般係由玻璃纖維強化Β τ (^ismalewide-triazine)樹脂,或FR —4玻璃纖維強化環 =樹月曰(fiberglass reinforced epoxy resin)製成之蕊 層(core layer)形成。該電路基板一般可以下列步驟形486791 V. Description of the invention (2) Or the through hole is coated with a layer of conductive metal. (C) Photolithography and etching are used to form the desired conductive circuit in the conductive metal layer. ^ On the substrate's solder resist—Ie solder resist) coating surface ’, transfer the desired pattern, and then develop to form it; a good material such as gold or palladium is electroplated on the unprotected layer and W force layer. In step ⑻, the drilling process will leave: the film is covered with conductive metal (smear) agricultural holes, because these slags will cause je ^ abUity problem, so it must be removed in electrodeless plating 仃 刖. At present, there are several types of slag removal process systems ^: There are several mechanical or chemical slag removal methods disclosed in the United States ::: Know. For example, 4 / 01,783. A common process for removing glue residue is to remove the resin glue edge, which is disclosed in the US patent. Generally, since the surface of the sealing compound and the circuit substrate is substantially flat, the sealing compound and the anti-glow film are square; : =, (Bonding mechanism) is almost only a mechanism of chemical interlocking (mechanic interlock), so under the environment (such as pressure pin test (pressure c〇〇k = wet ring = between the interface is vulnerable to water) The invasion will form a delamination between the macroscopic upper sealant and the anti-knock film. [Summary of the Invention] The present invention therefore provides an improved sealant plastic and a circuit with a solder resist POO-161, ptd No. 5 Page 4 ^ 6791 V. Description of the invention (3) The method and technical problem of adhesion between substrates, thereby overcoming or at least improving the aforementioned prior art. According to the invention, the improved sealing plastic and the circuit substrate with a solder resist layer are improved. In the meantime, a method including roughening the surface of a circuit board with a perforate-repellent layer using a permanganate slag-removing process. The high-potrate slag-removing process mainly includes the following steps: , Different kinds of solutions are processed sequentially, these solutions The sequence is a swelling solution (such as die thy 1 ene glycol monobuty 1 ej her), an empirical solution and a neutralizing solution (such as an inorganic acid X /, a neutral oxalic acid salt) The solution can also be replaced by qualitative re-acid acid trip> Valley fluid. In other preferred embodiments of the present invention, the roughening step of the circuit substrate with a solder resist layer can be performed by an electric paddle slag removal process, spraying The sand process or the brush grinding process is achieved. Since the solder mask layer on the circuit substrate surface is rough after passing through the surface roughening surface, the adhesion at the solder mask layer / sealing gel interface has been improved. There is also a mechanical interlocking mechanism. Because the mechanical interlocking mechanism has the property of being resistant to chemical solvents (such as water), the electronic package structure formed by using the substrate according to the invention can be used in a high temperature, high pressure and humidity environment ( (Such as pressure cooker test) still has excellent reliability. [Explanation of the invention] The circuit substrate used in the present invention is generally reinforced with glass fiber β τ (^ ismalewide-triazine) resin, or FR-4 glass fiber reinforced ring = tree moon (Fiberglas s reinforced epoxy resin) core layer. The circuit substrate can generally be formed in the following steps

五、發明說明(4) $:⑴將一經過表面粗糖化的銅 (_山叫)於'蕊層(core layer)。(6气層[ 式在;蕊層上銅箱中形成所要之導電電:。可Π 之導用於本發明之電路基板可包含任何層數V. Description of the invention (4) $: ⑴Put a copper (_shanjiao) that has been roughly saccharified on the surface to the 'core layer'. (6 气层 [Formula in; copper layer on the core layer to form the desired conductive electricity :. The circuit board can be used for the present invention can contain any number of layers

I 面用:t::之電路基板係已形成一防銲層於#佈線表 面。·:防久層之形成步驟如後:⑷冑一防銲劑㈤心 resist)(例如光可顯像之防銲劑或乾膜防銲劑)塗覆於 基板上之佈線表面,其一般可以浸潰法(dipping 土 、 method)、喷塗法(spray meth〇d)、或網版印刷 printing)等技術達成;(b)後進行一預固化步驟,此時 將该層防銲劑1 2 0係以6 〇 °C -1 0 〇 °C加熱,而形成一防銲港 (solder res ist f i lm) ; (c)將該防銲膜成像(imaging) 以及顯影(developing)以形成所要之防銲膜圖案,其一乘 係使用一具有所要圖案之光罩被用來使得該防銲膜 定區域成像,而在顯影後該特定區域之防銲劑會被:, 使得基板上預先設定部分裸露於該防鮮膜。I-side: The circuit board of t :: has formed a solder mask on the #wiring surface. ·: The formation steps of the durable layer are as follows: a solder resist (a solder resist) (such as a photoimageable solder resist or a dry film solder resist) is applied to the wiring surface on the substrate, which can generally be immersed (Dipping soil, method), spraying method (spray method), or screen printing); (b) a pre-curing step is performed at this time, the layer of solder resist 1 2 0 is based on 6 〇 ° C -1 0 〇 ° C to form a solder resist port (solder resist fi lm); (c) imaging and developing the solder resist to form the desired solder resist pattern One of them is to use a mask with a desired pattern to image a fixed area of the solder mask, and after development, the solder resist in the specific area will be: so that a part of the substrate is preset to be exposed to the freshness prevention. membrane.

根據本發明之改善封膠塑料與具有防銲層之電路基板間 附著力的方法,其包含利用一高錳酸鹽去膠渣製程來粗化 前述之具有防焊層的電路基板表面。該高猛酸鹽去膠涪製 程係包含三步驟。在第一步驟中,一膨潤溶液(例如二甘 醇 丁基醚(di ethy 1 ene glycol monobutyl ether))被用According to the method for improving the adhesion between a plastic sealant and a circuit board having a solder resist layer according to the present invention, the surface of the circuit board having a solder resist layer is roughened by using a permanganate deslagging process. The high-rhenium salt degumming process includes three steps. In the first step, a swelling solution (such as di ethy 1 ene glycol monobutyl ether) is used

來軟化殘膜之結構,在第二步驟中’ 一南猛酸鹽氧化劑 (例如鈉、钟、裡之驗性高锰酸鹽溶液)被用來粗化電 路In order to soften the structure of the residual film, in the second step, a nanamate oxidant (such as sodium, bell, and lysine permanganate solution) is used to roughen the circuit

P00-161.ptd 第7頁 五、發明說明(5) f,上?銲膜之表面;在第三步驟中,-中和溶液(例如 :m ’稀硫酸或氫氯酸),皮用來中和高錳酸鹽並將 除。—般而言’待處理之電路基板係被浸 „ ^ '、方式接觸上述的每一種溶液,並且在每一步驟 古铉辦臨〜、六尺冲冼。坪、、、田§之,在第二步驟中,鹼性 二錳酉;鹽浴液一般係加熱至“Ο Τ或更高,停留時間 錳:gg 2 一般係為二十分鐘或更久。此外,該鹼性高 錳馱鹽浴液亦可由鹼性重鉻酸鹽溶液取代。 在本發明其他較佳實施例中,t亥具有防銲層之電路基板 面^化步驟係可藉由電漿去藤淺製程、喷砂製程或刷 製程達成。 在電水去膠渣製程中,該具有防銲層之電路基·板係被置 於一對平行電裝平板間,該對電襞平板係彼此間隔並且延 =在基板整個表面之上。該電漿去膠渣製程一般係氣 ,槽中,:二#中空氣係被排出並且以混合空氣氧 氣以f氣=敦代甲烷或氧氣以及四氟甲烷)取代。然後, 將一冋功率射頻電場施加於該對平板,用以在平板間產生 電聚。在平板間環繞於待處理基板之電漿會產生複數個放 電電孤而將電路基板上防銲膜之表面粗化。 在喷/、製程中’常用加壓水(pressurized water)做為 推進劑。一般而言,水式噴砂(water type sand blasting)較氧式嘴砂(air sand blasting)允許更 快速有效的表面粗化處理。 在刷磨製程中’該具有防銲層之電路基板係被以研磨料P00-161.ptd Page 7 V. Description of the Invention (5) f, on? The surface of the solder film; in the third step, a neutralizing solution (such as: m 'dilute sulfuric acid or hydrochloric acid) is used to neutralize and remove permanganate. —In general, the circuit substrate to be processed is immersed in a way that contacts each of the above solutions, and at each step, the ancient and the six feet are washed. Ping ,, and Tian § In the second step, the alkaline dimanganese hafnium; the salt bath is generally heated to "0 T or higher, and the residence time manganese: gg 2 is generally twenty minutes or more. In addition, the alkaline permanganese phosphonium salt bath may be replaced by an alkaline dichromate solution. In other preferred embodiments of the present invention, the step of forming a circuit substrate with a solder mask layer can be achieved by a plasma-removing process, a sandblasting process, or a brushing process. In the electro-water slag removal process, the circuit board and board system with a solder resist layer is placed between a pair of parallel electrical board plates, which are spaced apart from each other and extend over the entire surface of the substrate. The plasma slag removal process is generally gas. In the tank, the air in the # 2 is discharged and replaced with mixed air oxygen (f gas = Dunmethane or oxygen and tetrafluoromethane). Then, a pair of power radio frequency electric fields are applied to the pair of flat plates to generate electrocondensation between the flat plates. The plasma surrounding the substrate to be processed between the flat plates will generate a plurality of discharge galvanic isolation and roughen the surface of the solder mask on the circuit substrate. In the spraying process, pressurized water is commonly used as a propellant. In general, water type sand blasting allows faster and more efficient surface roughening than oxygen sand blasting. During the brush grinding process, the circuit board with a solder resist is coated with an abrasive.

第8頁 486791 五、發明說明(6) (abrasive)進行喷射刷磨(jet; — scrub)表面處理,然後水 洗並且烘乾,·此外,其亦可使用拋光輪(r〇u buff)進行 表面處理,然後水洗並且烘乾。 表含運用去膠渣製程技術來提供-種基板 粗化广理$仫由於忒電路基板表面之防銲層在經過表面 呈現粗糙狀’所以在防銲層/封膠體介面之 互鎖機構ΐ右,學鍵結外而尚有機械互鎖機構’由於機械Page 8 486791 V. Description of the invention (6) (abrasive) Jet blasting (scrub) surface treatment, then water washing and drying, In addition, it can also use a polishing wheel (ruo buff) for surface Process, then wash and dry. The table contains the use of slag removal process technology to provide-a kind of substrate roughening. 仫 Because the solder mask layer on the surface of the circuit substrate appears rough on the surface, so the interlock mechanism on the solder mask layer / sealing interface is right. , There is still a mechanical interlocking mechanism outside the bond, 'due to the mechanical

濕的反厂造在在高溫高壓高X 利用本發明之基板而形成:電子以靠性。因此‘ 的環境下(例如壓力鍋試驗)不易溫局壓高濕 可靠性。 因封膠體剝落而降低其 雖然本發明已以前述較佳實施例 ,發明’任何熟習此技藝者,在::離:'並非用以· 靶圍内,當可作各種之更動與修改,發明之精神和 圍當視後附之申請專利範圍所界定者為=本發明之保護範The wet inversion plant is formed at high temperature, high pressure, and high X using the substrate of the present invention: electron reliability. Therefore, the environment of ‘(such as the pressure cooker test) is not easy to achieve high temperature and high pressure and high reliability. Decreased due to the exfoliation of the sealant. Although the present invention has been described in the foregoing preferred embodiment, 'any person skilled in the art, in :: away:' is not intended to be used within the target range. Various changes and modifications can be made. The spirit and scope of the application are defined by the scope of the attached patent application as the protection scope of the present invention.

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POO-161.ptd 第10頁POO-161.ptd Page 10

Claims (1)

486791486791 案號 8912823ft 六、申請專利範圍 1、 一種改善封膠塑料與具有防銲層之電路基板"^附著力 的方法,該基板係用以封裝一半導體元件,該方法係包含 利用一高猛酸鹽去膠渣製程來粗化該具有防銲層之電路基 板表面,其中該高錳酸鹽去膠渣製程包含以三種不同溶液 依序處理’這些溶液依序為膨潤溶液、鹼性高錳酸鹽溶液 以及中和溶液。 2、 依申請專利範圍第1項之改善封膠塑料與具有防銲層之 電路I想間附著力的方法,其中該膨潤溶液包含二甘醇丁 基 _ (d i e t h y 1 e n e g 1 y c ο 1 m ο η 〇 b u t y 1 e t h e r)。 3、 依申請專利範圍第i項之改善封膠塑料與具有防銲層之 電路基板間附著力的方法,其中該中和溶液包含無機酸溶 液。 1、一種改善封膠塑料與具有防銲層之電路基板間附著力 、法,该基板係用以封裝一半導體元件,該方法係包含 =^一重鉻酸鹽去膠潰製程來粗化該具有防録層之電路基 其中該重鉻酸鹽去膠渣製程包含以三種不同溶液Case No. 8912823ft VI. Application for Patent Scope 1. A method for improving the adhesion of a plastic sealant and a circuit substrate with a solder resist layer. The substrate is used for packaging a semiconductor element, and the method includes using a high fidelity acid. The desmearing process is used to roughen the surface of the circuit board with a solder mask. The permanganate desmearing process includes sequential treatment with three different solutions. These solutions are sequentially a swelling solution and an alkaline permanganate. Salt solution and neutralization solution. 2. The method for improving the adhesion between the sealant plastic and the circuit with a solder resist layer according to item 1 of the scope of the patent application, wherein the swelling solution contains diethylene glycol butyl (diethy 1 eneg 1 yc ο 1 m ο η〇buty 1 ether). 3. The method for improving the adhesion between the sealant plastic and the circuit substrate having a solder resist layer according to item i of the patent application range, wherein the neutralization solution includes an inorganic acid solution. 1. A method and method for improving adhesion between a plastic sealant and a circuit substrate having a solder resist layer. The substrate is used to package a semiconductor device. The method includes a thickening process of chromate degumming to roughen the substrate. The circuit base of the anti-recording layer, wherein the dichromate degumming process includes three different solutions 2理,這些/谷液依序為膨潤溶液、鹼性重鉻酸鹽溶液 以及中和溶液。For two reasons, these / cereals are a swelling solution, an alkaline dichromate solution, and a neutralization solution in this order. 486791 案號 89128236 曰 修正 六、申請專利範圍 利用一電漿去膠渣製程來粗化該具有防銲層之電路基板表 面0 6、 一種改善封膠塑料與具有防銲層之電路基板間附著力 的方法,該基板係用以封裝一半導體元件,該方法係包含 利用一喷砂製程來粗化該具有防銲層之電路基板表面表 面。 7、 一種改善封膠塑料與具有防銲層之電路基板間附著力 的方法,該基板係用以封裝一半導體元件,該方法係包含 利用一刷磨製程來粗化該具有防銲層之電路基板表面。486791 Case No. 89128236 Amendment 6. The scope of the patent application uses a plasma deslagging process to roughen the surface of the circuit board with a solder mask. 6. An improved adhesion between the plastic sealant and the circuit board with a solder mask. In the method, the substrate is used for packaging a semiconductor element, and the method includes using a sand blasting process to roughen the surface of the circuit substrate with a solder resist layer. 7. A method for improving adhesion between a plastic sealant and a circuit substrate with a solder mask layer, the substrate is used to package a semiconductor element, the method includes roughening the circuit with a solder mask layer by using a brush grinding process Substrate surface. POO-161.ptc 第12頁POO-161.ptc Page 12
TW89128236A 2000-12-27 2000-12-27 Method for improving adhesion between encapsulation material and circuit substrate having a solder resist layer TW486791B (en)

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