TW439213B - Process of copper adhesion/barrier layer - Google Patents

Process of copper adhesion/barrier layer Download PDF

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TW439213B
TW439213B TW89100142A TW89100142A TW439213B TW 439213 B TW439213 B TW 439213B TW 89100142 A TW89100142 A TW 89100142A TW 89100142 A TW89100142 A TW 89100142A TW 439213 B TW439213 B TW 439213B
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Taiwan
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titanium nitride
hydrogen
layer
barrier layer
copper
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TW89100142A
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Chinese (zh)
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Shau-Lin Shue
Chung-Shi Liu
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Taiwan Semiconductor Mfg
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Abstract

A processing for copper adhesion/barrier layer which is applied for a substrate that the steps includes firstly forming titanium nitride precursor containing carbon and hydrogen on the substrate; and, conducting in-situ nitrogen/silicon methane plasma processing on the titanium nitride precursor containing carbon and hydrogen to form a silicon titanium nitride layer as the copper adhesion/barrier layer; therefore, it provides better barrier characteristic for copper diffusion effect.

Description

五、發明說明(1) 本發明係有關於一種銅附著/阻障層 (adhesion/diffusion iayer)製程,特別有關於一種形成 石夕氮化鈦層以防止銅擴散現象之銅附著/阻障層製程。 隨著高性能積體電路之需求日殷,電路元件之尺寸設 计亦盡可能縮小以達最佳效能。舉例來說,當肋3電晶體 之閉極長度(Gate length)降至〇· 25um(Sub-halfiicron) 以下時’電晶體切換速度亦會隨之大幅增加。因此,為充 分利用電晶體之增加速度’金屬内連線便要有極佳之導電 性(Electrical conductivity)以利傳輸。事實上,先進 〇 積體電路元件之性能也往往受限於金屬内連線之導電性, 其耦接於積體電路各元件。 過去,鋁(A1)及其合金係金屬内連線製程中最廣泛使 用之材料。不過,隨著積體電路元件之尺寸日益縮減,内 連線之元件數量亦持續增加。這導致了窄内連線引線 (Narrow interconnect iead)的大量需求,亦限制了鋁及 f合金在下一代積體電路中之應用。另外,鋁及其合金之 高電阻(High electrical resistance)特性亦妨礙其發 屐β χ 有鑑於此,許多其他金屬(如:金、銀、銅)便被重 考慮做為鋁及其合金之替代品。其中,銅(Cu)因為且 低之電阻及良好之抗電致遷移能力(High 、 仪 eleCtromigration resistance)被認為是鋁及其合金 佳替代品之一。不過,銅在積體電路材料中易擴散1 (difiusion)且不易附著(Adhere)於其他金屬/介電層(鍺V. Description of the invention (1) The present invention relates to a copper adhesion / diffusion iayer process, and particularly to a copper adhesion / barrier layer that forms a titanium nitride layer to prevent copper diffusion. Process. With the increasing demand for high-performance integrated circuits, the size design of circuit components has been reduced as much as possible to achieve the best performance. For example, when the gate length of the rib 3 transistor decreases to less than 0.25um (Sub-halfiicron), the switching speed of the transistor will also increase significantly. Therefore, in order to make full use of the increased speed of the transistor, the metal interconnects must have excellent electrical conductivity to facilitate transmission. In fact, the performance of advanced integrated circuit components is often limited by the conductivity of the metal interconnects, which are coupled to each component of the integrated circuit. In the past, aluminum (A1) and its alloys were the most widely used materials in the interconnection process. However, as the size of integrated circuit components has been shrinking, the number of interconnect components has continued to increase. This has led to a large demand for narrow interconnect ieads, and has also limited the application of aluminum and f alloys in next-generation integrated circuits. In addition, the high electrical resistance characteristics of aluminum and its alloys prevent it from developing β χ In view of this, many other metals (such as gold, silver, and copper) have been reconsidered as alternatives to aluminum and its alloys. Product. Among them, copper (Cu) is considered to be one of the best substitutes for aluminum and its alloys because of its low resistance and good electromigration resistance. However, copper easily diffuses 1 (difiusion) in integrated circuit materials and is not easily adhered to other metals / dielectric layers (germanium

五、發明說明(2) 】在金Ϊ t t1、鼠化矽層…)之缺點卻使其不能直接應 製程中,而必需要經過特殊之處理或提供 額外之附者/阻障層方能使用。 目前已發展出以銅做為CM0S元件之金屬内連線之技 Ϊ骑不ί,$求增加附著力及避免損害鋼金屬下的半 成凡+如下層内連線或裝置區,兩者之間必須額外形成 一層附著/阻障層,用以防止銅金屬層擴散到底下之下層 内連線或裝置區而與之反應,並增加銅金 〇 (TaN)或氮化鈦層(TiN)等,而其防止銅金屬層擴散之能力 仍有待改善。 本發明則提出一種製程相容之銅附著/阻障層製程, 適用於一基底’其步驟係先形成一含碳及氫之氮化鈦前趨 物於基底上,再對含碳及氫之氮化鈦前趨物進行一於同環 境(in-situ)下之氮/矽曱烷電漿處理,形成一矽氮化鈦 層,以作為銅附著/阻障層。 本發明另提出一種製程相容之銅附著/阻障層製程, 其步驟則為於形成一含碳及氫之氮化敛前趨物於基底上 後,先對含碳及氫之氮化鈦前趨物進行一氮/氫電漿處 理’形成一氮化飲層’再對氮化鈦層進行一後(post) 5夕甲 烷電漿(plasma)處理或後(post)矽甲烷熱退火(thermal anneal ing)處理,形成一矽氮化鈦層以作為銅附著/阻障 層。 其中,由於提供一含矽物質之矽氮化鈦來作為附著/V. Description of the invention (2)】 The shortcomings of the golden tin t t1, mouse silicon layer ...) make it unable to directly respond to the manufacturing process, and must require special treatment or provide additional attachments / barrier layers. use. At present, the technology of metal interconnects using copper as a CM0S element has not been developed. It is necessary to increase the adhesion and avoid damage to the semi-ordinary under the steel + the following inner interconnects or device areas. An additional adhesion / barrier layer must be formed between them to prevent the copper metal layer from diffusing to the underlying interconnects or device areas and react with it, and add copper gold (TaN) or titanium nitride (TiN), etc. , And its ability to prevent the diffusion of the copper metal layer still needs to be improved. The present invention proposes a process-compatible copper adhesion / barrier layer process suitable for a substrate. The steps are to form a titanium nitride precursor containing carbon and hydrogen on the substrate, and then The titanium nitride precursor is subjected to a nitrogen / siloxane plasma treatment in an in-situ to form a silicon silicon nitride layer as a copper adhesion / barrier layer. The invention further proposes a process-compatible copper adhesion / barrier layer process. The step is to form a carbon and hydrogen-containing titanium nitride on the substrate after forming a carbon-and-hydrogen-containing nitride precursor. The precursor is subjected to a nitrogen / hydrogen plasma treatment to 'form a nitrided drinking layer', and then the titanium nitride layer is subjected to a post-plasma plasma treatment or post-silicon thermal annealing ( thermal anneal ing) process to form a titanium silicon nitride layer as a copper adhesion / barrier layer. Among them, since a silicon-containing titanium nitride is provided as a silicon

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五、發明說明(3) 較佳之阻障特性。 種鋼附著/阻障層製程 阻障層,因此對於銅擴散現象具有 以下,就圖式說明本發明之一 實施例。 圖式簡微 銅附著/阻障層 第圖召ί%/示本發明之實施例中 製程之圖。 [符號說明] -130 〜1 7 0 半導體基底〜100 ;介電層〜110 ;介層窗〜12〇 ;前趨物 ,矽氮化鈦層〜140、160 ;氮化矽層〜15〇 ;銅金屬層 實施例 '月參閱第1至5圖,其顯示本發明之實施例中,一種銅 附著/阻障層製程。 蚺參閱第1圖,本實施例適用於一基底,此基底包括 一下層裝置區或金屬内連線1〇〇,在此以下層金屬内連線 100為例,此外,於下層金屬内連線1〇〇表面則另形成有一 平坦化之内層金屬介電層(IMD)或内層絕緣層(ILD)IIO, 在此以内層金屬介電層(IMD)為例,而常用的内金屬介電 層材料則包括一層或數層之氧化矽、硼矽玻璃、硼填矽玻 璃或疋低介電係數材料(如flare、pAE_2、FSG、HSQ等)。 1中由於目前在銅導線的製作上是以鑲嵌式(damascene) 製程來解決鋼金屬的蝕刻不易的問題,因此方法之一是先 在平坦的内層金屬介電層n〇上蝕刻出曝露下層金屬内連 線100表面之溝槽(或更包括蝕刻介層窗)120。5. Description of the invention (3) Better barrier characteristics. This kind of steel adhesion / barrier layer process has a barrier layer, and therefore has a copper diffusion phenomenon as follows. One embodiment of the present invention will be described with reference to the drawings. Schematic diagram Copper adhesion / barrier layer. Figure 图% / shows the process of the embodiment of the present invention. [Explanation of symbols] -130 ~ 170 semiconductor substrate ~ 100; dielectric layer ~ 110; interlayer window ~ 120; precursor, titanium silicon nitride layer ~ 140, 160; silicon nitride layer ~ 150. Copper Metal Layer Embodiments Refer to FIGS. 1 to 5, which show a copper adhesion / barrier layer process in an embodiment of the present invention.蚺 Refer to FIG. 1, this embodiment is applicable to a substrate. The substrate includes a lower device area or a metal interconnect 100. Here, the lower metal interconnect 100 is used as an example. In addition, the lower metal interconnect is connected. On the surface, a flat inner metal dielectric layer (IMD) or an inner insulating layer (ILD) IIO is formed on the surface. Here, an inner metal dielectric layer (IMD) is used as an example, and a common inner metal dielectric layer is used. Materials include one or more layers of silicon oxide, borosilicate glass, borofilled silica glass, or low-k dielectric materials (such as flare, pAE_2, FSG, HSQ, etc.). In 1 since the damascene process is used to solve the problem of difficult etching of steel metal in the production of copper wires, one of the methods is to first etch the exposed metal on the flat inner metal dielectric layer n0. Trenches (or more including etched vias) 120 on the surface of the interconnect 100.

第6頁 五、發明說明(4) 接著請參閱第2至3圖,順應性形成一含碳及氫之氮化 鈦前趨物130於介層窗120内並延伸至内層金屬介電層 (IMD)llO表面,再對含礙及氫之氮化鈦前趨物 (Precursor : TiCxNyHz) 130 進行一於同環境(in-si1;u)下 之氮/矽甲烷電(N2/SiH4)漿處理,形成一矽氮化鈦層 1 4 0 ’以作為銅附著/阻障層。例如,利用金屬有機化學氣 相沈積製程(M0CVD) ’於對基底加熱至一製程溫度如 時’沈積一TDMAT (tetrakis (dimethylamido) titanium)或TDEAT (tetrakis (diethylamido ) 〇 titanium )等前趨物130於介層窗120内並延伸至内屬金屬 介電層(IMD)llO表面’然後再對此前趨物13〇進行一於同 環境(in-situ)下之氮/矽甲烷(N2/SiH4)電漿處理,抽除 生成之副產物後’形成一矽氮化鈦層(T i S i [〇 1 4 0,以作為 銅附著/阻障層。5. Explanation of the invention on page 6 (4) Next, referring to FIGS. 2 to 3, a titanium nitride precursor 130 containing carbon and hydrogen is conformably formed in the interlayer window 120 and extends to the inner metal dielectric layer ( IMD) 110 surface, and then treat the titanium nitride precursor (Precursor: TiCxNyHz) 130 containing hydrogen and hydrogen with a nitrogen / silicon methane (N2 / SiH4) slurry treatment in the same environment (in-si1; u) A titanium silicon nitride layer 14 0 ′ is formed as a copper adhesion / barrier layer. For example, a metal organic chemical vapor deposition process (M0CVD) is used to deposit a precursor such as TDMAT (tetrakis (dimethylamido) titanium) or TDEAT (tetrakis (diethylamido) 〇titanium) 130 while heating the substrate to a process temperature as usual. Within the interlayer window 120 and extending to the surface of the internal metal dielectric layer (IMD) 110, then the precursor 13 is subjected to a nitrogen / silicon methane (N2 / SiH4) under in-situ conditions. After the plasma treatment, the by-products formed are removed to form a titanium silicon nitride layer (T i S i [0140] as a copper adhesion / barrier layer.

請參閱第4A至4B圖’其顯示本發明之另一實施例,首 先如第2圖所示,先順應性形成—含碳及氫之氮化鈦前趨 物130於介層窗120內並延伸至内層金屬介電層(ΙΜ1))11〇表 面’然後依據第4Α圖’再對此含破及氫之氮化鈦前趨物 130進行一氮/氫(]^2/{12)電漿處理’形成一氮化鈦層15〇, 接者依據第4Β圖’對氮化鈦層150進行一後(post)石夕曱院 電漿(plasma)處理或後(post)矽甲烷熱退火(thermal anneal i ng)處理,形成一矽氮化鈦層16〇以作為銅附著/阻 障層。例如’利用金屬有機化學氣相沈積製程(Μ 〇 C v ])), 於對基底加熱至一製程溫度如3〇〇 °C時,形成一Please refer to Figs. 4A to 4B ', which shows another embodiment of the present invention. First, as shown in Fig. 2, first conformally formed-a titanium nitride precursor containing carbon and hydrogen 130 in the interlayer window 120 and Extending to the inner metal dielectric layer (IM1)) 11 surface and then performing a nitrogen / hydrogen (] ^ 2 / {12) charge on the titanium nitride precursor 130 containing hydrogen and hydrogen according to FIG. 4A. Plasma treatment 'forms a titanium nitride layer 15o, and then performs a post-plasma treatment or post-silicon thermal annealing on the titanium nitride layer 150 according to FIG. 4B'. (Thermal anneal i ng) treatment, a titanium silicon nitride layer 16 is formed as a copper adhesion / barrier layer. For example, using a metal organic chemical vapor deposition process (MO C v))), when the substrate is heated to a process temperature such as 300 ° C, a

第7頁 五、發明說明(5) TDHAT(tetrakis(dimethylamido) titanium)或 TDEAT(tetrakis(diethylamido)ti1;anium)等前趨物130 於 介層窗120内並延伸至内層金屬介電層(IMD)llO表面,然 後依第4A圖再對此前趨物130進行氮/氫電漿處理,於抽除 生成之副產物後形成一氮化鈦層1 5 0,接著依據第4B圖, 對氮化鈦層150進行一後(post)石夕甲烧電漿(plasma)處理 或熱退火(thermal annealing)處理,形成一石夕氮化敛層 1 6 0以作為銅附著/阻障層。 最後請參閱第5圖,於形成矽氮化鈦層之銅附著/阻障 層160後,以化學氣相沈積法(CVD)、物理氣相沈積法Page 7 V. Description of the invention (5) Antecedents 130 such as TDHAT (tetrakis (dimethylamido) titanium) or TDEAT (tetrakis (diethylamido) ti1; anium), etc. 130 in the interlayer window 120 and extend to the inner metal dielectric layer (IMD) ll10 surface, and then nitrogen / hydrogen plasma treatment of this precursor 130 according to FIG. 4A, after forming the by-products to remove a titanium nitride layer 150, and then according to FIG. 4B, nitriding The titanium layer 150 is subjected to post-plasma plasma treatment or thermal annealing treatment to form a polysilicon nitrided layer 160 as a copper adhesion / barrier layer. Finally, please refer to FIG. 5, after the copper adhesion / barrier layer 160 of the titanium silicon nitride layer is formed, chemical vapor deposition (CVD) and physical vapor deposition are used.

(PVD)或電鑛沈積法(Eiectroplating)在内層金屬介電層 11 0上進行全面性的銅沈積,並使銅填滿上述溝槽。舉例 而言,可利用離子化金屬電漿(IMP)先沈積一層晶種層, 然後再以電鍍法完成銅導電層的沈積,完成銅的沈積後 以内層金屬介電層11 〇為研磨終點進行化學機械研磨將多 餘的金屬銅移去’即可得到上層之銅金屬内連線17〇。 由於本發明在上層銅金屬内連線17〇與内層金屬介電 層110和下層之半導體元件間更提供一含矽物質之矽氮化 鈦來作為附著/阻障層,因此,對於防止金屬銅之擴散阻 障特性可以獲得進—步的改善。 雖然本發明已以一較佳 以限定本發明,任何熟習此 神和範圍内,當可作些許之 護範圍當視後附之申請專利(PVD) or Eiectroplating method performs a comprehensive copper deposition on the inner metal dielectric layer 110 and fills the trench with copper. For example, an ionized metal plasma (IMP) can be used to deposit a seed layer, and then the copper conductive layer is deposited by electroplating. After the copper deposition is completed, the inner metal dielectric layer 110 is used as the polishing end point. Chemical mechanical polishing removes the excess metal copper to obtain the upper copper metal interconnect 170. Since the present invention further provides a silicon-containing titanium nitride as an adhesion / barrier layer between the upper copper metal interconnect 170 and the inner metal dielectric layer 110 and the lower semiconductor elements, therefore, for preventing copper metal The diffusion barrier characteristics can be further improved. Although the present invention has been defined by a preferred one, anyone familiar with this spirit and scope should have some protection scope as the attached patent

實施例揭露如上,然其並非用 技藝者,在不脫離本發明之精 更動與潤飾,因此本發明之保 範圍所界定者為準。The embodiment is disclosed as above, but it is not a skilled person, and it does not deviate from the refinement and retouching of the present invention, so what is defined by the scope of the present invention shall prevail.

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Claims (1)

i439213 六、申請專利範圍 I 一種銅附著/阻障層製程,適用於一基底,包括下 列步驟: (a) 形成一含礙及氫之氮化鈦前趨物於該基底上;及 (b) 對該含碳及氫之氮化鈦前趨物進行一於同環境 Un-si tu)下之氮/矽甲烷電漿處理,形成一矽氮化鈦層, 以作為鋼附著/阻障層。 2. 如申請專利範圍第1項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDMATT。 3. 如申請專利範圍第1項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDEAT。 4. 一種銅附著/阻障層製程,適用於一基底,包括下 列步驟: (a) 形成一含碳及氫之氮化鈦俞趨物於該基底上; (b) 對該含碳及氫之氮化鈦前趨物進行一氮/氫電漿處 理’形成一氮化鈦層;及 (C)對該氮化鈦層進行一後(P〇St)矽甲烷電漿(pi asma) 處理’形成一矽氮化鈦層以作為鋼附著/阻障層。 5*如申請專利範圍第4項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDMAT。 尸6.如申請專利範圍第4項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDEAT。 ?,一種銅附箸/阻障層製程’適用於一基底,包括下 列步驟: a)形成一含碳及氫之氮化鈦前趨物於該基底上;i439213 6. Scope of patent application I. A copper adhesion / barrier layer process is applicable to a substrate, including the following steps: (a) forming a titanium nitride precursor containing hydrogen and hydrogen on the substrate; and (b) The carbon / hydrogen-containing titanium nitride precursor is subjected to a nitrogen / silicon methane plasma treatment under the same environment (Un-Situ) to form a silicon silicon nitride layer as a steel adhesion / barrier layer. 2. The process as described in item 1 of the scope of patent application, wherein the titanium nitride precursor containing carbon and hydrogen is TDMATT. 3. The process as described in item 1 of the scope of patent application, wherein the titanium nitride precursor containing carbon and hydrogen is TDEAT. 4. A copper adhesion / barrier layer process suitable for a substrate, comprising the following steps: (a) forming a titanium nitride containing carbon and hydrogen on the substrate; (b) forming the carbon and hydrogen containing A titanium nitride precursor is subjected to a nitrogen / hydrogen plasma treatment to form a titanium nitride layer; and (C) the titanium nitride layer is subjected to a post (P0St) silicon methane plasma (pi asma) treatment. 'Form a titanium silicon nitride layer as a steel adhesion / barrier layer. 5 * The process as described in item 4 of the scope of patent application, wherein the titanium nitride precursor containing carbon and hydrogen is TDMAT. 6. The process according to item 4 of the scope of patent application, wherein the carbon and hydrogen-containing titanium nitride precursor is TDEAT. ?, A copper cladding / barrier layer process is suitable for a substrate, including the following steps: a) forming a titanium nitride precursor containing carbon and hydrogen on the substrate; 第9頁 六、申請專利範圍 (b)對該含碳及氫之氮化鈦前趨物進行一氮/氫電漿處 理,形成一氮化鈦層;及 (C)對該氮化鈦層進行一後(post)矽甲烷熱退火 (thermal annealing)處理,形成一石夕氮化鈦層,以作為 鋼附著/阻障層。 8. 如申請專利範圍第7項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDMAT。 9. 如申請專利範圍第7項所述之製程,其中,該含碳 及氫之氮化鈦前趨物為TDEAT。Page 9 6. Scope of patent application (b) A nitrogen / hydrogen plasma treatment is performed on the carbon and hydrogen-containing titanium nitride precursor to form a titanium nitride layer; and (C) the titanium nitride layer A post thermal annealing annealing process is performed to form a titanium nitride layer as a steel adhesion / barrier layer. 8. The process according to item 7 of the scope of patent application, wherein the titanium nitride precursor containing carbon and hydrogen is TDMAT. 9. The process according to item 7 of the scope of patent application, wherein the titanium nitride precursor containing carbon and hydrogen is TDEAT. 0503-4993TTV.ptd 第10頁0503-4993TTV.ptd Page 10
TW89100142A 2000-01-06 2000-01-06 Process of copper adhesion/barrier layer TW439213B (en)

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