TW439208B - Post process of self-aligned contact - Google Patents

Post process of self-aligned contact Download PDF

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Publication number
TW439208B
TW439208B TW88117404A TW88117404A TW439208B TW 439208 B TW439208 B TW 439208B TW 88117404 A TW88117404 A TW 88117404A TW 88117404 A TW88117404 A TW 88117404A TW 439208 B TW439208 B TW 439208B
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Taiwan
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self
contact window
aligning contact
patent application
item
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TW88117404A
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Chinese (zh)
Inventor
Tz-Shr Yan
Shiang-Yuan Jeng
Yi-Ping Li
Jing-Luen Jiang
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Vanguard Int Semiconduct Corp
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Abstract

The self-aligned contact (SAC) of the present invention is fabricated by the well-known technology, the polymer and the C-containing residuals will be remained on the SAC structure and do a certain degree of damage to the substrate. Then the SAC postprocessing procedure is performed by using the down-stream mode of etching machine to generate plasma, the reactive gas to generate the plasma contains O2 and fluorine-containing gas to eliminate the remained polymer and carbon-containing residual, and to repair the damage caused by etching. Furthermore, the photoresist can be removed together. The gas pressure of the postprocessing chamber is about 500 to 3000 mT, the power of plasma is about 300 to 1000 W, the flow rate of oxygen is about 1000 to 2000 sccm, the flow rate of fluorine-containing gas is about 25 to 400 sccm, the processing temperature is about 50 to 120 DEG C.

Description

14 3 9 2 0 8 A7 B7 五、發明說明() 發明領域: 經濟部智慧財產局員工消費合作社印製 本發明與半導體元件之製程有關,特別是一種自行對 準接觸窗之形成方法*更特別是在完成自行對準接觸窗之後 執行一後處理製程。 發明背景: 甴於新的應用領域不斷驅動著半導體元件發展,在電腦 與通訊相關產業中需要大量之半導體元件,例如電腦之介面 未來朝影音控制方面發展,上述之控制介面將需要大量之記 憶元件。為.了獲得高性能的積體電路並提高晶圓的構裝密 度,在超大型積體電路(ULSI)技術中,半導體元件的尺寸不 斷的縮小。 而自行對準接觸_窗製程為半導體製程中重要之一環,主 要是提供導體结構與基板主動區域一電性連接之通道。習用 之方法主要包含於半導體基板 2上形成場氧化區(未圖示) 以定義主動區域,接著沈積閘極氧化層 6以及複晶矽層 8 於場氧化區與基板2上方,在此複晶矽層上方接著沈積二氧 化石夕層或氣化石夕層 10,如第一圖所示。定義光罩姓刻上述 之閘極氧化層6、複晶碎層8與氛化s夕層1 〇形成具.有遮蓋 <請先閲讀背面之注意事項再填寫本頁) *c 訂---------線 私外氣尺度逋用.卞.琴單家榫率.((^汾合4:.規楼明7...分箄 辕14 3 9 2 0 8 A7 B7 V. Description of invention () Field of invention: Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs This invention is related to the process of manufacturing semiconductor components, especially a method for forming self-aligned contact windows * and more special After finishing the self-aligning contact window, a post-processing process is performed. Background of the Invention: The development of semiconductor components in new application fields is constantly driving the development of semiconductor components in the computer and communication related industries. For example, the interface of computers will develop in the area of audiovisual control in the future. The above-mentioned control interface will require a large number of memory components. . In order to obtain high-performance integrated circuits and increase the mounting density of wafers, the size of semiconductor components has been continuously reduced in the ultra-large integrated circuit (ULSI) technology. The self-aligning contact-window process is an important part of the semiconductor process, and mainly provides a channel for the electrical connection between the conductor structure and the active area of the substrate. The conventional method mainly includes forming a field oxide region (not shown) on the semiconductor substrate 2 to define an active region, and then depositing a gate oxide layer 6 and a polycrystalline silicon layer 8 on the field oxide region and the substrate 2 to compound the crystal. A silicon dioxide layer or a gasified stone layer 10 is then deposited over the silicon layer, as shown in the first figure. Define the mask last name with the gate oxide layer 6, complex crystal fragment layer 8 and the oxidized layer 10. Covered < Please read the precautions on the back before filling this page) * c Order- ------- Line private air scales. 卞. Qin single mortise rate. ((^ Fen 合 4: .. 楼 明 7 ... 分 箄 辕)

A7 B7 五、發明說明() 層(c a p 1 a y e r) 1 0之閘極結構,如第二圖所示。上述之遮蓋層 (cap layer) 1 0是為防止後續沈積之獏層與閛極做電性接觸 而造成短路。下一步驟1沈積一層介電層後,利闬蝕刻製程 蝕刻該介電層以形成側壁間隙I 2於閘極結構之側壁之上。 完成側壁間隙之製作後進行源極、汲極1 4之摻雜,在製作 側壁間隙之前可以先行製作LDD 1 6之結構。在上述結構之 表面沈積一層介電層18,一般為利用氧化矽,並在該介電 層18之上定義一光阻圖案20,如第三圖所示。以該光阻圖 案2 0做為罩幕,利用蝕刻技術蝕刻上述之介電層1 8以製作 接觸窗,最後去除光阻,完成接觸窗之製作。 一般,侧壁間隙1 2為利用氮化矽作為材質,SAC蝕刻 過程中時易造成側壁間隙之流失,為防止上述之現象必須提 高氮化矽對氧化矽間之蝕刻選擇率,以避免爲化.矽被蝕刻。 一般可以選用C4F3/CO為基礎之蝕刻氣體進行SAC蝕刻。 然而,以上述之蝕刻劑進行蝕刻蝕,其反應氣體將會與光阻 中之C = C鍵反應,而造成覆蓋於 SAC表面上之高分子 (polymer)22殘留。上述之高分子22將造成SAC電阻值之 提昇1更者將會造成SAC之開路狀態'再者,上述之SAC 之過程中,也會在蝕刻過程中對基板造成蝕刻之破壞° 因此,目前急需的是一種SAC製程可以克服上述之缺 (請先閲讀背面之注意事項再填寫本頁) „----訂 *-------- 經濟部智慧財產局員工消費合作社印製 麵 蹈439208 Α7 —-------—-- Β7 五、發明說明() 失β 發明目的及概沭:_ 本發明之主要目的為一種防止高分子產生舆基板被 破壞之自行對準接觸窗(self aiigrl contact)製程。 本發明之再一目的為利用 S AC後處理程序防止高分 子產生與基板被破壞之自行對準接觸.窗(se If align contact) 製程。 本發萌利周習知之技術製作閘極结構,上述之.閘極之結 構包含氮化矽遮蓋層以及氬化矽側壁間隙《接著,沈積一層 氡化夺或類似材質组成之介電層做為電性絕缘之目的。下一 步驟為定義光阻圖案於氧化矽層之上以定義接觸窗之區 域°表後’使用高選学性之;PjEdreactiveionetchingJIi刻進 行接觸窗SAC製作。此蝕刻以氬為離子源,反應氣韹為包 含C〇、C4F8或CO、 C4F8及CF4 »此高選擇性之乾蝕 刻能將氧化矽層飪刻’接觸窗將曝露汲極或是源極。高分子 與含C之殘餘物將殘留於sac結構之上,且對基板造成’ 定程度之破壞β —I--------—0裝 ί請先閱讀背面之注意事項再填寫本頁) l·丨!訂---------線: 經濟部智慧財產局員工消費合作社印製 w 豸·;.玛;,'..-. gl·,... τν. r. Λ:. - "平·· 择.·... ft: ^..-.-^.- 'A.:·... 纖 海:A7 B7 V. Description of the invention The gate structure of the () layer (c a p 1 a y e r) 1 0 is shown in the second figure. The cap layer 10 described above is to prevent the subsequent deposition of the samarium layer from making electrical contact with the samarium electrode and causing a short circuit. The next step 1 is to deposit a dielectric layer, and then etch the dielectric layer to form a sidewall gap I 2 on the sidewall of the gate structure. After the fabrication of the sidewall gap is completed, the source and drain electrodes 14 are doped, and the structure of the LDD 16 can be fabricated before the sidewall gap is fabricated. A dielectric layer 18 is deposited on the surface of the above structure. Generally, silicon oxide is used, and a photoresist pattern 20 is defined on the dielectric layer 18, as shown in the third figure. With the photoresist pattern 20 as a mask, the above-mentioned dielectric layer 18 is etched by an etching technique to make a contact window, and finally the photoresist is removed to complete the fabrication of the contact window. Generally, the sidewall gap 12 uses silicon nitride as a material, and the sidewall gap is easily lost during the SAC etching process. In order to prevent the above phenomenon, it is necessary to increase the etching selectivity between silicon nitride and silicon oxide to avoid chemical conversion. . The silicon is etched. Generally, C4F3 / CO-based etching gas can be used for SAC etching. However, with the above-mentioned etchant, the reactive gas will react with the C = C bond in the photoresist, causing the polymer 22 on the surface of the SAC to remain. The above polymer 22 will cause an increase in the SAC resistance value. Furthermore, it will cause an open state of the SAC. Moreover, during the above SAC process, the substrate will also be etched during the etching process. Therefore, it is urgently needed What is a SAC process can overcome the above-mentioned shortcomings (please read the precautions on the back before filling this page) „---- Order * -------- Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 439208 Α7 ----------- Β7 V. Description of the invention () Loss of β Purpose and summary of the invention: The main purpose of the present invention is a self-aligning contact window that prevents the polymer from being damaged and the substrate being damaged. (Self aiigrl contact) process. Another purpose of the present invention is to use SA post-processing procedures to prevent the polymer from self-aligning contact with the substrate being destroyed. The window (se If align contact) process. The gate structure is made by technology. The structure of the gate includes a silicon nitride masking layer and a silicon argon sidewall gap. Next, a dielectric layer composed of silicon nitride or a similar material is deposited for the purpose of electrical insulation. Next One step for definition The resist pattern is on the silicon oxide layer to define the area of the contact window. Behind the table, high-selectivity is used; PjEdreactiveionetchingJIi is used to make contact window SAC. This etch uses argon as the ion source, and the reaction gas is composed of CO, C4F8 or CO , C4F8, and CF4 »This highly selective dry etching can etch the silicon oxide layer. The contact window will expose the drain or source. The polymer and C-containing residue will remain on the sac structure, and the substrate Caused 'a certain degree of damage β —I --------— 0 installed, please read the precautions on the back before filling out this page) l · 丨! Order --------- line: Printed by the Consumer Cooperatives of the Ministry of Intellectual Property Bureau w 豸 ·;.; ..-.- ^ .- 'A.:· ... Xianhai:

經濟部智慧財產局員工消費合作社印製 i43 9 2 Ο 8 Α7 __Β7_ 五、發明說明() 而言可以採用cf4、c2f6、或c4fs。此外,也可以採用chf3、 CH2F2或CH3F。上述因為RIE蝕刻所造成之損害以及高 分子與含礙之殘留物可以利用含II之向下流射(down s t r e a m)電漿所修復或消除。此外。此後處理程序可以一 並去除光阻。所以本發明之後處理程序可以整合光阻之 去除步驟(PR ashing)。以一較佳實施例而言,後處理之 反應室氣壓約為500至3000mT,電漿之功率約為300至 1000W,氧氣體之流量約為1000至2000sccm,含氟氣 體之流量约為25至400sccm,處理之溫度約為50至120 t。 圖式簡單說明: 第一圖為傳統自行對準接觸窗製程中形成場氧化層及完成 複晶矽層與遮蓋層沈積之截面圖。 第二圖為傳統自行對準接觸窗製程中完成閘極結構之截面 圖。 第三圖為傳統自行對準接觸窗製程中執行SAC蝕刻之截面 圖。 第四圊為本發明之自行對準接觸窗製程中形成閘極結構之 截面圖。 第五圖為本發明之完成自行對準接觸窗製程之截面圖。 第六圖為本發明執行後處理程序之截面圖。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) - - f ! I-----------r--J 訂---------p (請先閱讀背面之注意事項再填窝本頁) 五、發明說明() A7 B7Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs i43 9 2 〇 8 Α7 __Β7_ V. Description of Invention () In terms of (), cf4, c2f6, or c4fs can be used. Alternatively, chf3, CH2F2, or CH3F can also be used. The above-mentioned damage caused by RIE etching, and high molecular and hindered residues can be repaired or eliminated by using down s t r e a m plasma containing II. Also. After that, the photoresist can be removed together. Therefore, the post-processing procedure of the present invention can integrate a photoresist removal step (PR ashing). In a preferred embodiment, the pressure of the post-treatment reaction chamber is about 500 to 3000 mT, the power of the plasma is about 300 to 1000 W, the flow rate of the oxygen gas is about 1000 to 2000 sccm, and the flow rate of the fluorine-containing gas is about 25 to 400sccm, the processing temperature is about 50 to 120 t. Brief description of the figure: The first figure is a cross-sectional view of forming a field oxide layer and completing the deposition of a polycrystalline silicon layer and a cover layer in a conventional self-aligned contact window process. The second figure is a cross-sectional view of the gate structure completed in the traditional self-aligning contact window process. The third figure is a cross-sectional view of SAC etching performed in a conventional self-aligned contact window process. The fourth aspect is a cross-sectional view of a gate structure formed in the self-aligning contact window manufacturing process of the present invention. The fifth figure is a cross-sectional view of the self-aligned contact window manufacturing process of the present invention. The sixth figure is a cross-sectional view of a post-processing program executed by the present invention. This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)--f! I ----------- r--J Order --------- p (Please read the notes on the back before filling in this page) V. Description of the invention () A7 B7

經濟部智慧財產局員工消費合作社印製 如第四圖所示'以一晶面為< Voo >之單晶半導體為基 板,如p型單晶之矽基板4 0。接著,製作做為元件間隔離 之絕緣區域,通常可以使用場氧化製作技術或是溝渠式隔離 技術。以一實施例而言 '利用傳統之L 0 C 0 S製程製作一厚 的場氧化區(未圊示)作為主動區域之絕緣物,此場氧化區域 之形成是在有氧蒸氣之環境下熱氧化*溫度在 8 5 0 -1 0 5 0°C 間產生二氧化矽,厚度為4000-6000埃。 接著,在基板之上形成一閘極氧化層42,再利周化學 氣相法沈積複晶矽層4 4覆蓋閘極氧化層42與場氧化層,厚 度為I 0 0 0至2 0 0 0埃_之間。於上述之複晶矽層4 4表面以化 學氣相法沈積第一氬化矽層46覆蓋於複晶矽層44之上,厚 度範圍為300至2000埃之間。接著,定義第一光阻圊案於 第一氮化矽層4 6之上,以蝕刻技術蝕刻上述之苐一氮化矽 層4 6、複晶矽層4 4以及閘極氧化層4 2。此蝕刻可採用乾蝕 刻去除未被第一光阻覆蓋之區域,形成如第四圖所示之閘極 結構,氮化矽層4 6做為閘極結構4 4之遮蓋層,主要作用為 (諳先閲讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, as shown in the fourth figure, 'Single crystal semiconductor with one crystal plane < Voo > as the substrate, such as a p-type single crystal silicon substrate 40. Next, as the isolation area for the isolation between components, field oxidation fabrication technology or trench isolation technology can usually be used. According to an embodiment, 'the traditional L 0 C 0 S process is used to produce a thick field oxidation region (not shown) as an insulator of the active region. The formation of this field oxidation region is heated in an aerobic vapor environment. Oxidation * temperature produces silicon dioxide between 8 50-1 0 50 ° C, with a thickness of 4000-6000 Angstroms. Next, a gate oxide layer 42 is formed on the substrate, and then a polycrystalline silicon layer 44 is deposited by a chemical vapor deposition method to cover the gate oxide layer 42 and the field oxide layer, and the thickness is I 0 0 0 to 2 0 0 0 Egypt. A first silicon argon layer 46 is deposited on the surface of the above-mentioned polycrystalline silicon layer 44 by chemical vapor deposition to cover the polycrystalline silicon layer 44 with a thickness ranging between 300 and 2000 angstroms. Next, a first photoresist layer is defined on the first silicon nitride layer 46, and the above-mentioned silicon nitride layer 46, the polycrystalline silicon layer 44 and the gate oxide layer 42 are etched by an etching technique. This etching can use dry etching to remove the area not covered by the first photoresist to form a gate structure as shown in the fourth figure. The silicon nitride layer 46 is used as a cover layer for the gate structure 44. Its main function is ( (阅读 Read the notes on the back before filling out this page)

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經濟部智慧財產局員工消費合作社印製 A7 ___B7_ 五、發明說明() 防止複晶矽層4 4與後續之導電獏層之間形成短路現象。相 近功能之材質也可以取代氣化5夕。 參閒第五圖,一介電層如氧化矽層或氮化矽層48形成 於閘極結構以及遮蓋層之表面,以氮化矽作一實施例1上述 之氬化矽層4 S可以利用化學氣相沈積法形成,例如低壓化 學氣相沈積法,一般可以於反應室中利角 SiH4 ' NH3 ' N2 ' N2〇 或其他適合之反應物,於溫度攝氏300至S00 度之下形成氮化5夕層。下一步驟為侧壁間隙(s i d e w a U s p a c e r: 之製作,此步驟利用非等向性蝕刻技術蝕刻氬化矽層 48, 形成側壁間隙(side wall space〇4S於閘極結構之側壁之上。 此Ίέ刻之反應氣體為CHF3 、CF4/H2或CHF3CHF2。此側 壁間隙4 S之功闬如同遮蓋層4 6之作甩是做為.姓刻的位障 (b a r r i e r)為防止複晶梦層 4 4與後續之導電層艰成短路現 象。 沈積一層厚度約1 5 0 0至3 0 0 0埃間由氧化矽或類似材質 組成之介電層 5 0,該氧化矽介電層 5 0做為電性絕緣之目 的。下一步驟為定義光阻圖棄52於氧化矽層50之上以定義 接觸窗之區域。最後,使用高選擇性之 RiE(reactive ion etching)蝕刻進行接觸窗SAC製作。此蝕刻以氬為離子源, 反應氣體為包含C〇、 C4F8或C〇、C4F8及 CF4。此高 ---------一-----…裝-----r---訂----^---- (請先閲讀背卧之注意事項再填寫本頁) 鎳Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ___B7_ V. Description of the invention () Prevent short circuit between the polycrystalline silicon layer 44 and the subsequent conductive plutonium layer. Materials with similar functions can also replace gasification. Referring to the fifth figure, a dielectric layer such as a silicon oxide layer or a silicon nitride layer 48 is formed on the surface of the gate structure and the cover layer, and silicon nitride is used as the silicon argon layer 4 in the first embodiment. Chemical vapor deposition, such as low-pressure chemical vapor deposition, generally forms a nitride SiH4 'NH3' N2 'N2〇 or other suitable reactants in the reaction chamber at a temperature of 300 to S00 degrees Celsius 5th floor. The next step is the production of a side wall gap (sidewa U spacer :). This step uses an anisotropic etching technique to etch the silicon argon layer 48 to form a side wall space (side wall space 04S) on the side wall of the gate structure. The hand-carved reaction gas is CHF3, CF4 / H2 or CHF3CHF2. The function of the side wall gap 4 S is the same as that of the covering layer 4 6. The barrier carved by the last name is to prevent the polycrystalline dream layer 4 4 A short-circuit phenomenon with the subsequent conductive layer is difficult. A dielectric layer 50 composed of silicon oxide or a similar material with a thickness of about 150 to 300 angstroms is deposited, and the silicon oxide dielectric layer 50 is used as electrical The purpose of the insulating insulation. The next step is to define the photoresist pattern 52 on the silicon oxide layer 50 to define the area of the contact window. Finally, the contact window SAC is fabricated using highly selective RiE (reactive ion etching) etching. Etching uses argon as an ion source, and the reaction gas includes C0, C4F8 or C0, C4F8 and CF4. This high ----------------------------- -Order ---- ^ ---- (Please read the notes on back lying before filling this page) Nickel

經濟部智慧財產局員Η消費合作社印製 A7 ____B7 五、發明說明() 如同習知之技術,高分子與含C之殘餘物5 4將殘留於 S A C結構之上,且對基板造成一定程度之破壞。而本發明 之重點之一即為消除上述所造成之高分子與含C之殘餘物 5 4以及復原基板之損壞。 參閱第六圖,在完成自行對準接觸窗SAC之後,接著 執行一後處理(posttreatment)之程序,利用本發明所提供之 後處程序則可以消除上述之缺失。在蝕刻機台中一般具有 RIE模式以及向下流射(downstream)模式,RIE模式一般產 生帶電之離子,而向下流射模式則產生高能量之不帶電之 粒子3此後處理程序為利用钱刻機台之向下流射 m模式產 生電漿來執行SAC後處理程序。產生電漿之反應氣體為包 含〇2以及含氟氣體,如CxFy之氣體,舉例而言可以採用 cf4、c2fs、或C4F8。此外,也可以採用CHF3、CH2F2或 CH3F»氧氣體在電漿中可增加氧原分子解離為自由基之 ;;·. 能力1氧自由基為主要去除¥何物與光阻之反應物。上 述因為RIE蝕刻所造成之損害以及高分子與含碳之殘留 物可以利用含氟之向下流射 電黎所修復或消除。此步 驟所利用之機制主要為氟自由基與損害之矽基板反應。 此外。此後處理程序可以一並去除光阻5 0。所以本發明 之後處理程序可以整合光阻之去除步驟(PR ashing)。以 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -------------Ί Γ -L ---1 l· ---^ ----I--I (請先閲讀背面之注意事項再填窝本頁) 陷 439 2 0 8 A7 B7 五、發明說明() 一較佳實施例而言,後處理之反應室氣壓約為 5 0 0至 3000 mT,電漿之功率約為300 至1000 W,氧氣體之流 量約為1000至2000 seem,含氟氣體之流量約為25至 400 s'c cm,處理之溫度約為50至120 °C。 本發明之優點之一為當完成接觸窗之蝕刻後1利用本 發明所提供之後處理程序可以去除高分子與含碳之殘餘 物,因此可以降低接觸窗之接觸電阻,並防止開路之產生。 比外可以修復因SAC時RIE所造成之基板損傷,再者,本 發明之後處理程序可以同時去除光阻,整合製程步驟。 本發明以一較佳實施例說明如上,而熟悉此領域技藝 暑,在不脫離本發明之精神範圍内,當可作些許更動潤飾, 其專利保護範圍更當視後附之申請專利範圍及其等同領域 而定11 - 二 · lit.--- I I---------1 l· 1 11 --------線 (請先閱請背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐〉Printed by a member of the Intellectual Property Bureau of the Ministry of Economic Affairs and a consumer cooperative. A7 ____B7 V. Description of the invention () As is known in the art, polymers and C-containing residues 5 4 will remain on the S A C structure and cause some damage to the substrate. One of the important points of the present invention is to eliminate the damage of the polymer and the C-containing residue 5 4 and the recovery substrate caused as described above. Referring to the sixth figure, after the self-aligning contact window SAC is completed, a post-treatment process is performed, and the post-processing procedure provided by the present invention can eliminate the above-mentioned defects. The etching machine generally has a RIE mode and a downstream mode. The RIE mode generally generates charged ions, and the downward stream mode generates high-energy uncharged particles. 3 The subsequent processing procedure is to use a money engraving machine. Downstream m mode generates plasma to execute SAC post-processing program. The reaction gas used to generate the plasma is a gas containing 02 and fluorine, such as CxFy. For example, cf4, c2fs, or C4F8 can be used. In addition, CHF3, CH2F2, or CH3F »oxygen gas can also be used in the plasma to increase the dissociation of oxygen molecules to free radicals;; .. Ability 1 oxygen radicals are the main reactants for the removal of anything and photoresist. The damage caused by the RIE etching as well as the polymer and carbon-containing residues mentioned above can be repaired or eliminated by using a fluorine-containing downward flow radiocommunication. The mechanism used in this step is mainly the reaction of fluorine radicals with the damaged silicon substrate. Also. After that, the photoresist 50 can be removed together. Therefore, the post-processing procedure of the present invention can integrate a photoresist removal step (PR ashing). Applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) on this paper scale ------------- Ί Γ -L --- 1 l · --- ^ --- -I--I (Please read the precautions on the back before filling this page) 439 2 0 8 A7 B7 V. Description of the invention () In a preferred embodiment, the pressure of the post-processing reaction chamber is about 5 0 0 to 3000 mT, the power of the plasma is about 300 to 1000 W, the flow of oxygen gas is about 1000 to 2000 seem, the flow of fluorine-containing gas is about 25 to 400 s'c cm, and the processing temperature is about 50 to 120 ° C. One of the advantages of the present invention is that after the etching of the contact window is completed, 1 the post-processing procedure provided by the present invention can be used to remove the polymer and carbon-containing residues, so the contact resistance of the contact window can be reduced and the open circuit can be prevented. In addition, the substrate damage caused by RIE during SAC can be repaired. Furthermore, the post-processing procedure of the present invention can simultaneously remove photoresist and integrate process steps. The present invention is described above with a preferred embodiment, and if you are familiar with the skill in this field, you can make some modifications to it without departing from the spirit of the present invention. The equivalent field depends on 11-II. Lit .--- I I --------- 1 l · 1 11 -------- line (please read the precautions on the back before filling in this Page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is sized for the Chinese National Standard (CNS) A4 (210 X 297 mm)

Claims (1)

ABCD 1 一種i行對準接觸窗之製程,該製程至少包含: 形成半導體元件於一半導體基板之上,該半導體元件包含側 壁間隙形成於該半導體元件之側壁: 形成一介電層覆蓋於該半導體基板與該半導體元件之上做 為-絕緣層, 利用飪刻罩幕飪刻該介電層俾以形成該自行對準接觸窗,.該 自行對準窗具有高分子殘留於其上;及 執行一自行對準接觸窗後處理程序,該自行對準接觸窗後處 理程序包含利用向下流射(down stream)電聚,以氧氣與含氟 氣體作為反應氣體,用以去除上述之高分子並修復因飪刻所 造成之基板損壞。 2如f請專利範圍第1項之自行對準接觸窗製程,其中上述 之自行對準接觸窗後處理程序包含去除該蝕刻罩幕3 3如申請專利範圍第項之自行對準接觸窗製程,其中上述 之含氟氣體包含CXFY。 4如申請專利範圍第3項之自行對準接觸窗製程,其中上述 之含氟氣體選自 CF,、C2Fs、C^FS、CHF3、CH2F2 及 CH3F 所組成之群集之一或其任意組合。 j------—— (請先間讀背面之注意事項再填寫本頁) 訂 經濟部智慧財废局員工消費合作社印製 10 本紙張^度適用中國興家標準又匸以以^現格彳之⑴/^^公釐)..ABCD 1 A process for aligning contact windows in i rows. The process includes at least: forming a semiconductor element on a semiconductor substrate, the semiconductor element including a sidewall gap formed on a sidewall of the semiconductor element: forming a dielectric layer to cover the semiconductor The substrate and the semiconductor element are used as an insulating layer, and the dielectric layer 俾 is etched with a engraved mask to form the self-aligning contact window. The self-aligning window has a polymer remaining thereon; and A self-aligning contact window post-processing program. The self-aligning contact window post-processing program includes using a down stream electro-polymerization, and using oxygen and fluorine-containing gas as a reaction gas to remove the above-mentioned polymers and repair them. Damage to the substrate caused by cooking. 2 If f, please apply the self-aligning contact window process in item 1 of the patent scope, wherein the above-mentioned self-aligning contact window post-processing procedure includes removing the etching mask 3 3 If the self-aligning contact window process in the scope of patent application, The above-mentioned fluorine-containing gas includes CXFY. 4. The self-aligning contact window process according to item 3 of the patent application scope, wherein the above-mentioned fluorine-containing gas is selected from one of the clusters consisting of CF ,, C2Fs, C ^ FS, CHF3, CH2F2, and CH3F or any combination thereof. j ------—— (Please read the notes on the back before filling in this page) Order 10 copies of paper printed by the Employees' Cooperatives of the Ministry of Economic Affairs and the Ministry of Economic Affairs. (彳 / 彳 ^ mm) .. 六、申請專利範圍 5如申請專利範圍第1項之自行對準接觸窗製程,其中上述 之自行對準接觸窗後處理程序包含氧氣體流量約為1 〇 〇 〇至 (請先閱讀背面之注意事項再填寫本頁) 2 0 0 0 seem ° 6如申請專利範圍第1項之自行對準接觸窗製裎,其_上述 之自行對準接觸窗後處理程序包含含氟氣體流量約為2 5至 40 seem ° 7如申諳專利範圍第1項之自行對準接觸窗製程,其令上述 之自行對準接觸窗後處理程序包含電漿之功率約為300 至 1 000 W。 8如申請專利範圍第1項之自行對準接觸窗製程,其中上述 之自行對準接觸窗後處理程序包含反應室氣壓约為500至 3 0 0 0 mT 9如申請專利範圍第1項之自行對準接觸窗製程,其中上述 之自行對準接觸窗後處理程序包含反應室溫度约為50至 1 2 0 °C。 經濟部智慧財是局S工消費合作社印製 10如申請專利範圍第1項之自行對準接觸窗製程,其中形 成上述之自行對準接觸窗之反應氣體包含CO、 C4F8或 8 〇 2 9 3 4 ABC0 ττ、申請專利範圍 (諸先鬩讀背面之注意事項再填寫本頁) CO ' C4F8 及 CF4。 11 一種去除高分子之方法’該方法至少包含: 利用向下流射(down stream)電漿,以氧氣與含氟氣體作為反 應氣體去除上述之高分子,其t上述之含氟氣’體包含 CxFγ ° 12如申請專利範圍第 11項之方法,其中上述之含氟氣體選 自 cf4、C2F6、C4Fs、chf3、ch2f2& ch3f 所組成之群 集之一或其任意組合。 13如申請專利範圍第11項之方法,其中上述之氧氣體流量 約為 1000 至 2000 sccm° 14如申請專利範圍第 11項之方法,其中上述之含氟氣體流 量約為25至40 seem。 經濟部智慧財產局員工消費合作社印製 15如申請專利範圍第11項之方法,其中上述之電漿之功 率約為300 至1000W。 16如申請專利範圍第11項之方法,其中反應之氣壓約為 500 至 3000 mT。 本紙張尺度適用t國國家標準(CNS ) A4規K 210X297公釐)2 A8 B8 C8 D8 六、申請專利範圍 1 7如申請專利範圍第1 1項之方法’其中反應室之溫度約 為 50 至 UOt: a 經濟部智蒽財產局員工消費合作社印製 用.·... i 適 1^..· 尺···I 張 -紙...:本.-'·· c::;. 橾:... 家V 國... I 國' A4·.'.·: 3 釐.一 7 .-2' X . ο··6. Scope of patent application 5 The self-aligning contact window manufacturing process as described in item 1 of the patent application scope, wherein the above-mentioned self-aligning contact window post-processing procedure includes an oxygen gas flow of about 1,000 to (Please read the note on the back first Please fill in this page again for details) 2 0 0 0 seem ° 6 If the self-aligning contact window system of item 1 of the scope of patent application is used, the above-mentioned self-aligning contact window post-processing procedure includes a fluorine-containing gas flow of about 2 5 To 40 seem ° 7 As in the self-aligning contact window process of the first patent application, the above-mentioned self-aligning contact window post-processing procedure includes a plasma power of about 300 to 1,000 W. 8 If the self-aligning contact window manufacturing process of item 1 of the patent application scope, wherein the above-mentioned self-aligning contact window post-processing procedure includes the reaction chamber pressure of about 500 to 3 0 0 mT 9 The alignment window process, wherein the above-mentioned self-aligning contact window post-processing procedure includes a reaction chamber temperature of about 50 to 120 ° C. The Ministry of Economic Affairs ’Smart Money is a self-aligning contact window process printed by the Bureau of Industrial and Commercial Cooperatives, such as item 1 of the scope of patent application, in which the reaction gas forming the above-mentioned self-aligning contact window includes CO, C4F8, or 8 〇 2 9 3 4 ABC0 ττ, scope of patent application (please read the precautions on the back before filling out this page) CO 'C4F8 and CF4. 11 A method for removing polymer, the method includes at least: using a down stream plasma, using oxygen and a fluorine-containing gas as a reaction gas to remove the above polymer, wherein the above-mentioned fluorine-containing gas contains CxFγ ° 12 The method according to item 11 of the scope of patent application, wherein the above-mentioned fluorine-containing gas is selected from one of the clusters consisting of cf4, C2F6, C4Fs, chf3, ch2f2 & ch3f, or any combination thereof. 13 The method according to item 11 of the patent application, wherein the above-mentioned oxygen gas flow rate is about 1000 to 2000 sccm ° 14 The method according to item 11 of the patent application, wherein the above-mentioned fluorine-containing gas flow is approximately 25 to 40 seem. Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 15 If the method of item 11 of the patent application is applied, the power of the above plasma is about 300 to 1000W. 16 The method according to item 11 of the patent application range, wherein the pressure of the reaction is about 500 to 3000 mT. This paper size is applicable to National Standards (CNS) A4 Regulation K 210X297 mm 2 A8 B8 C8 D8 VI. Application for patent scope 1 7 The method of item 11 in the scope of patent application 'where the temperature of the reaction chamber is about 50 to UOt: a For printing by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs ..... i Suitable for 1 ^ .. · Ruler ... I Sheet-Paper ...: 本 .-'... c ::;.橾: ... country V country ... I country 'A4 ·.' ..: 3%. One 7 .-2 'X. Ο ··
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