TW437109B - Manufacturing a heterobipolar transistor and a laser diode on the same substrate - Google Patents

Manufacturing a heterobipolar transistor and a laser diode on the same substrate Download PDF

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Publication number
TW437109B
TW437109B TW087103586A TW87103586A TW437109B TW 437109 B TW437109 B TW 437109B TW 087103586 A TW087103586 A TW 087103586A TW 87103586 A TW87103586 A TW 87103586A TW 437109 B TW437109 B TW 437109B
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layer
region
stack
transistor
sequence
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TW087103586A
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Chinese (zh)
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Patrik Evaldsson
Urban Eriksson
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Ericsson Telefon Ab L M
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8252—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using III-V technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/32—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
    • H01S5/0261—Non-optical elements, e.g. laser driver components, heaters

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Lasers (AREA)

Abstract

A heterobipolar transistor HBT and a laser diode LD are manufactured from a common epitaxial structure comprising a plurality of semiconducting layers (1-9). The transistor can be manufactured directly from the material as it is after finishing the epitaxial steps. For manufacturing the laser diode the structure is changed by diffusing (21) zinc into the material, so that the topmost material layers change their dopant type from n-type to p-type. This is made on selected areas of a wafer, so that transistors and laser diodes thereby can be monolithically integrated. The active region (5) of the laser is located in the collector (3-5) of the transistor, what gives a freedom in designing the components and results in that an individual optimization of the two components can be made. The laser and the HBT can thus be given substantially the same structures, as if they had been individually optimized. The laser will for example be the type vertical injection and can therefor get the same performance as discrete lasers.

Description

經濟部中央標準局員工消費合作社印裝 ' 43 710 9 A7 _'____B7___ 五'發明説明（彳） 技術領域（Technical Field): 本發明是關於如何在同一基材上，製造異質雙極電晶體 (heterobipolar transistor)和雷射二極體的方法及適合這種 製造方法的基材。 背景資料（Background): 關於單晶片上（Monolithic)光電積體電路（OEICs， Optoelectronic Integrated Circuits)(將元件整合到同一個晶 片或同一個電路板（Circuit Plate))的研究始於70年代美國 的加州理工（CALTECH)。並見於 C.P. Lee, S. Margalit，I. Ury和A. Yiv，發表在名為"於半絕緣砷化鎵（GaAs)基材 上整合（Integration)耿氏振盪器（Gunn oscillator)與雷射的製 造方法 11，Appl. Phys. Lett·，Vol. 32，No. 12.，pp.806-807 1978的文獻中a將兩者整合在一起的原因和發展矽積醴電 路的道理是相同的，舉例來說，如果能將光學元件 (Optical Component)，如雷射、波導（Wave Guide)、偵測器 (Detector)像製造電晶體一樣製造在同一個基材上，如此 便能製造大量低成本的晶片（Chip)。單晶片整合製程也使 得擁有相同功能並封裝在同一電路板上所需使用的晶片數 目減少’而傳統上是使用不同的晶片。而且製程的整合使 得所需的外接點連接變少因此還可以增加系統的可靠度 (Reliability)。必須強調的是要達到上述的優點，先決條件 是整合在一起元件的功能（Performance)，並不會比分開製 造的元件降低（Degraded)。 為了建立未來的光學網路（Optical Networks of -4 « 本纸張尺度適用中國國家揉準（CNS) A4規格（2丨OX W7公釐) '~ --------装------訂------味 - _ · (請先閱讀背面之注意事項再填寫本育) 經濟部中央橾準局負工消費合作社印装 4371 0 9 A7 B7 五、發明説明（2 )Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs '43 710 9 A7 _'____ B7___ Five 'Invention Description (彳) Technical Field: The present invention relates to how to make heterogeneous bipolar transistors on the same substrate ( heterobipolar transistor) and laser diode method, and a substrate suitable for this manufacturing method. Background: Research on Monolithic Optoelectronic Integrated Circuits (OEICs, Optoelectronic Integrated Circuits) (integrating components on the same chip or circuit board) began in the United States in the 1970s. California Institute of Technology (CALTECH). Also seen in CP Lee, S. Margalit, I. Ury and A. Yiv, published in the article entitled "Integration of Gunn Oscillators and Lasers on Semi-Insulated Gallium Arsenide (GaAs) Substrates" Manufacturing Method 11, Appl. Phys. Lett ·, Vol. 32, No. 12., pp. 806-807 in 1978a. The reason why the two are integrated together is the same as the reason for developing a silicon integrated circuit. For example, if optical components, such as lasers, waveguides, and detectors, can be manufactured on the same substrate as a transistor, a large number of low-cost components can be manufactured. Cost of Chips. The single-chip integration process also reduces the number of wafers required to have the same functions and be packaged on the same circuit board ', while traditionally using different wafers. In addition, the integration of the process reduces the number of required external point connections and therefore increases the reliability of the system. It must be emphasized that in order to achieve the above advantages, the prerequisite is that the performance of the integrated components (Performance) will not be lower than that of separately manufactured components (Degraded). In order to build the future optical network (Optical Networks of -4 «This paper size is applicable to China National Standard (CNS) A4 specification (2 丨 OX W7 mm) '~ -------- install --- --- Order ------ Taste- _ (Please read the notes on the back before filling in this education) Printed by the Consumers' Cooperatives of the Central Government Bureau of the Ministry of Economic Affairs 4371 0 9 A7 B7 V. Description of the invention (2 )

Tomorrow) ’例如延伸到每個家庭内的網路系統，技術發 展的需求成價格的降低的相互影響是不可或缺的要素之 ——。因此如何將光學和電子元件组合在單一晶片上的這個 問題解答’不僅在技術面令人感到興趣，在系統建立這方 面也吸引相當的曝目。 實現單晶片整合製程的方法有很多。不同方法的選擇部 分取決於雷射光的波長（wavelength);半導體基材（Base Matenal) ’ 如選擇坤化鎵（Galliurn Arsenide，GaAs)，或是鱗 化銦（Indium Phosphide，InP);電子元件，如使用異質雙極 電晶體（HBT) ’ 或疋％ 效電晶體（Fieid Effect Transistor， FET);更進一步光學元件的選擇’如光偵測器（ph〇t〇_ detector) ’雷射（Laser) ’調變器（Modulator);及整合製程 的製造方式等的不同而有不同的整合方式。一般而言，我 們將整合製程的方法分成三類： -1.垂直整合製程：將兩個或更多的電子或是光學元 件，以一個堆在一個上面的方式堆疊在一起的整合方式。 -2.平行整合製程：將兩個或更多的電子或是光學元 件’彼此一個排列一個旁邊在一起的方式。首先，鍍上為 了製造第一個元件所需的薄膜層，然後將第一個元件周圍 不需要的薄膜層蚀刻掉（Etched Away)。然後在已經姓刻掉 薄膜層的區域製造下一個元件。 -3 ·利用相同的基本結構（Basic Structure)製造兩種不同 的元件。當薄膜的層狀結構做好後，只要進一步的處理 (Processing)，如將每個元件區隔開來的蝕刻，鍍上電極接 -5 - 本紙張Μϋ用 網1 ( CNS ) ( 21GX297公釐) ' {請先閲讀背面之注意事項再填寫本頁) 裝- 訂 4371 0 9 A7 B7 五、發明説明（3 ) 點層（Electrical Contacts Layer)，而不需要其他鍵膜的程序 便可以產生互相分隔（Isolated)的元件。 <請先W讀背面之注意事項再填寫本頁) 方法1和2的主要優點是單獨製造的元件功能可以達到 最佳化（Optimized)。玦點則是包含很多製程步驟而使得製 造方法變得複雜。方法3則是一個較簡單的製造方法，但 是經常對於元件的功能必須妥協》 經濟部中央樣準局員工消費合作社印敦 在雷射領域的文獻中常提到的一種方法是電流射入方向 由垂直方向（Vertical injection)變成侧面射入（Lateral injection)的侧向電流射入雷射（LCI-laser，Lateral Current Injection Laser)_。這種製程中η型摻雜或是p型摻雜是利用 擴散（Diffusion)，或是離子佈植（Implantation)來選擇在基 材表面的不同區域製作摻雜的步騾。如此，雷射和電晶體 便可以同時製造在同一基材或晶片上了。上述C.P. Lee et al.，的論文方法已經利用這個方法來整合雷射和場效電晶 體。雷射和異質雙極電晶體的單晶片整合則可見於虬831·-Chaim，Ch· Harder, J. Katz, S. Margalit，A. Yariv，1‘ Ury，的 論文："砷化鋁鎵（GaAlAs)異質結構雷射（Buried -Heterostructure)和雙極光電晶體（Bipolar Phototransistor)的 單晶片整合製程"Appl. Phys. Lett., 40(7)，556,（1982)。然 而這個方法的缺點是產生新的雷射和電晶體的結構。另外 一種已經實用的觀念，可以從T. Fukuzawa，M_ Nakamura, Μ· Hirao，T. Kuroda和J. Umeda的論文：”具有蕭基閘 (Schottky Gate)的場效電晶體和砷化鋁鎵（GaAlAs)雷射的單 晶片整合製程 ”，Appl. Phys. Lett.，36(3)，181 (1980)看 -6- 本紙張尺度適用中國國家標準（CNS) Μ规格（210X297公釐> 經濟部中央梯準局貞工消费合作社印装 437109 at _ B7 五、發明説明（4 ) 到，這是第一次用這種觀念製造雷射結構，在其上有一層 沒有任何摻雜的區域，在那裡可以製造一個場效電晶體。 為了得到和雷射的上方疊層p_型結構做電子的接觸，我 們將p -型摻雜（在本例子是用鋅Zinc)擴散過那層沒有摻雜 的區域= 總結（Summary): 本發明知供一種在同一基材或晶片上製造電晶體和雷射 的簡單方法，並且不會有電晶體和雷射效能降低的情況發 生。因此’這項發明所解決的問題就是提出一種在同一基 材或晶片製造電晶體和雷射，使電晶體和雷射的效能幾乎 和分開來製造的元件幾乎相等。 要把電晶體和雷射做在同一基材上時，首先必須將適當 的半導體層依序地鍍在基材上面以形成所需的基本結構 (Basic Structure) ’比較特別的是這個原始結構就像傳統的 異質雙極電晶體結構一樣。晶片上某些區域可以改變成雷 射的的結構。因此可以製成垂直射入型的雷射（Vertical Injection) ’其效能可以和獨立的雷射元件相當。這個結構 的改變是藉由將鋅擴教到薄膜材料層内。這個方法的優點 是可以利用相同的結構來製造雷射和異質雙極電晶體並獲 得最佳的功能表現就如同其單獨的元件一樣。類似的結構 也用於 GaAs/GaAlAs 並見於 J. Katz, N. Bar-Chaim，P. C Chen, S. Margalit，I. Ury, D. Wilt, M. Yust，A. Ya[iv:"坤化 鎵（GaAs)/坤化鋁鎵（GaAlAs)雙極電晶體和異質結構雷射的 單晶片整合製程"Appl. Phys· Lett.，37(2)，211，1980的論文 本紙張尺度適用中國困家標準（CNS ) A4说格（2丨ox297公釐） (請先閲讀背面之注意事項再填寫本頁) 裝. 訂 4371 〇 9 Α7 Β7 經濟部中央標準局員工消費合作杜印装 五、發明説明（5 ) 申。在該論文中，使用的結構為將雷射的主動區（Active v/area)位於WW異質雙極電晶體的基極部分（Base)，這 和本案在此所提出的方法是不同的。在A K G〇yai，M. s. Miller，s. I Long和D. Leonard 利用磊晶結構來整合雷射 和異質雙極電晶體，，’ SPIE，Vol. 2148，pp.359-366，1994 中’單晶片整合製程也用於GaAs/GaAlAs的系統中，但是 在此系統中雷射的主動區位於相對應異質雙極電晶體集極 (Collector)的區域就像本發明的設計的一樣，這樣的方式 給設計者在設計時較大的自由度，並可以讓兩種元件的功 能都能達到最佳化。 異質雙極電晶體和雷射二極體是從相同的磊晶結構中製 造出來。電晶體可以直接鍍上電極層並利用蝕刻來區隔和 分割而直接從磊晶結構中製造完成。電晶體的各個主動層 為多層薄膜結構中的磊晶層所形成。為了要製造雷射二極 體’必須將鋅擴散到多層薄膜中的上方疊層薄膜中以改變 其摻雜特性由η型變成p-型。擴散的步驟只在晶圓上的所 選的特定區域進行，如此一來，電晶體和雷射二極體便可 以整合在單晶片上。相反地，最上一層薄膜的摻雜特性也 可以由η_型變成ρ_型。 本發明的優點及目的在接下來敘述將會更清楚地被闡 述。這個發明的目的和優點可以透過專利申請範圍中所敘 述的這個方法、製程、器材、組合來幫助瞭解。 圖示（Brief Description of the Drawings): 從下面非限定（non_Hmiting)具體實例的說明可以幫助我 本紙浪尺度適用十國®家揉率（CNS ) A4規格（21〇χ297公董） --------^------、π-----1 ^ - , (請先閲讀背面之注意事項再填寫本頁) 4371 〇 9 Α7 Β7 經濟部尹夹樣隼局貝工消费合作杜印装 五、發明説明（6 ) 們對本發明有更深入的了解。 -圖1是適合製作電晶體的多層蔴 巧存膜結構的剖面示意圖。 -圖2是將特定物質擴散進圖 尸不疋多層薄膜中以製成 適合的雷射結構圖。 -圖3是由圖1的多層薄膜結構所製成電晶體的剖面示意 圖。 圖4是由圖1的多層薄膜食士嫌‘ 丹朕，.〇楫加上如圖2的擴散步騾所 製成之雷結構的剖面示意圖。 -圖5是根據圖2的擴散步騾之後，在薄膜表面之下鋅濃 度隨深度的分佈圖。 -圖6是圖3所示之電晶體在平衡狀態下，電晶體的能帶 圖（Band Diagram)。 -圖7是圖4所示之雷射結構在順向偏壓時的能帶圖。 -圖8是圖3所示之電晶體中，集極-射極間電流（icE)在共 同射極偶合電路（in a common emitter-coupler circuit)狀況下 和集極-射極間電壓（VCE)的關係。 -圖9是圖4所示之雷射結構發光功率和電流之間的關係α 詳細的描述（Detailed Description): 在以下的描述中，使用特定材料的具體實例將被用來作 為說明的例子=其他具有相同性質的材料也可以使用在製 成中，特別是某些摻雜型態可以改變成相反的摻雜型態， 比方η -型摻雜和p -型摻雜分別被p -型和η -型摻雜所取 代。 -9- 本紙^尺度適用中國國家橾隼（CNS ) Α4規格U丨0X297公釐> (請先Μ讀背面之注意>*-唄4後埃本耳} 裴 訂- -—咏 ，、43 71 〇9 經濟部t失樣準局荑工消费合作社印製 五、發明説明（7 ) 在圖1表示以磷化銦（InP)為基材並於其上鍍了 —系列的 磊晶薄膜層。這樣的薄膜層可以在同一個基材上，同時製 作異質雙極電晶體和雷射二極體。這種結構被植入系統 中。為了簡化，圖中所畫的薄膜厚度皆相同*，實際製造時 會因各層的功能’材料和捧雜度等不同而有不同的厚度。 ♦ 磊晶結構是利用有機金屬氣相磊晶（m〇Vpe)或是其他類似 的方法所長成的，利用這個方法每層的厚度和摻雜的程度 都可以得到_良好的控制》基材可以使用η型摻雜的磷化 砷’如果使用丰絕緣體的材料，好比摻雜鐵的磷％珅會更 利於在單晶片上製作電晶體和雷射二極體，也就是說電晶 體或雷射二極體的結構都可以在同一個晶片上製作。磊晶 結構包含了很多不同材料層、各層的厚度和摻雜物（可能 是Ρ型或是η型）也都不同。一般而言，磷化砷具有較寬的 他隨（Band Gap) ’ 可 故出（Ph〇t〇iulninescence)波長 = 1-3仁m的光，此層簡稱Q(i.3)。而另一種光學材料InGaAsP 具有較窄的邊隙和較南的折射係數（Refractive ，可 以產生波長λ PL= I.55 的光，並簡稱為Q〇 55)。此外， 能隙較窄的材料如InGaAs可以用來降低電極接點的電阻， 由圖I可以看出此結構包含： -層1為η·型磷化砷的緩衝層。 _層2為移雜濃度南的η -型鱗化神。 -層3為掺雜濃度低的η_型墙化碎。 _層4為低慘雜濃度n-Q( 1.3 )的Ν型鱗化神。 -層5為沒有摻雜的多重量子井5 (Mu出p〖e Quantum -10- (讀先聞讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家榡車（CNS ) A4規格（210x 297公簸） 4371 0 9 A7 _B7 五、發明説明（8 )Tomorrow) ’For example, to extend to the network system in each home, the interaction between the demand for technological development and the reduction in price is an indispensable element-. Therefore, this question and answer on how to combine optical and electronic components on a single chip is not only interesting in terms of technology, but also attracts considerable attention in terms of system establishment. There are many ways to achieve a single-chip integration process. The choice of different methods depends in part on the wavelength of the laser light; the base material of the semiconductor (Base Matenal) '' such as the choice of Galliurn Arsenide (GaAs), or Indium Phosphide (InP); electronic components, Such as the use of heterogeneous bipolar transistor (HBT) or 疋% effect transistor (Fieid Effect Transistor, FET); further selection of optical components 'such as light detector (ph〇t〇_ detector)' laser (Laser ) 'Modulator (Modulator); and manufacturing methods of integrated processes and other different integration methods. Generally speaking, we divide the methods of integration processes into three categories: -1. Vertical integration process: An integration method in which two or more electronic or optical components are stacked on top of each other. -2. Parallel integration process: A method of arranging two or more electronic or optical elements' next to each other. First, the thin film layer required for manufacturing the first component is plated, and then the unnecessary thin film layer around the first component is etched away (Etched Away). The next component is then made in the area where the film layer has been engraved. -3 • Manufacture two different components with the same basic structure. After the layered structure of the film is completed, as long as further processing is performed, such as etching to separate each element, plating electrodes are connected -5-Net 1 (CNS) (21GX297 mm) ) '{Please read the precautions on the back before filling this page) Binding-Order 4371 0 9 A7 B7 V. Description of the Invention (3) Electrical Contacts Layer, without the need for other key membrane procedures, can generate each other Isolated components. < Please read the notes on the back before filling this page) The main advantage of methods 1 and 2 is that the functions of the separately manufactured components can be optimized. The key point is that it involves many process steps and complicates the manufacturing method. Method 3 is a simpler manufacturing method, but often has to compromise on the function of the component. ”One method often mentioned in the literature of the laser consumer field by the Consumer Cooperatives of the Central Procurement Bureau of the Ministry of Economic Affairs in India is that the direction of the current injection is vertical The direction (Vertical injection) becomes a lateral injection (LCI-laser, Lateral Current Injection Laser). In this process, n-type doping or p-type doping uses diffusion or implantation to select doped steps in different regions of the substrate surface. In this way, the laser and transistor can be manufactured on the same substrate or wafer at the same time. The above paper method by C.P. Lee et al., Has used this method to integrate laser and field-effect electrical crystals. The monolithic integration of lasers and heterobipolar transistors can be found in the paper of 虬 831 · -Chaim, Ch. Harder, J. Katz, S. Margalit, A. Yariv, 1 'Ury, " AlGaAs (GaAlAs) single-chip integration process for Buried-Heterostructure and Bipolar Phototransistor " Appl. Phys. Lett., 40 (7), 556, (1982). However, the disadvantage of this method is the creation of new laser and transistor structures. Another already practical concept can be taken from the papers of T. Fukuzawa, M. Nakamura, M. Hirao, T. Kuroda, and J. Umeda: "Field-effect transistors with Schottky Gate and aluminum gallium arsenide ( GaAlAs) Laser single chip integration process ", Appl. Phys. Lett., 36 (3), 181 (1980) see -6- This paper size applies the Chinese National Standard (CNS) M specification (210X297 mm > Economy Printed by the Ministry of Central Government of the Taiwan Provincial Government, Zhengong Consumer Cooperative 437109 at _ B7 V. Description of the Invention (4) This is the first time that this concept has been used to make a laser structure, and there is a layer without any doping on it. A field-effect transistor can be made there. In order to get electronic contact with the p_-type structure on the top of the laser, we diffuse the p-type dopant (in this example, zinc Zinc) through the layer without doping Miscellaneous area = Summary: The present invention provides a simple method for manufacturing transistors and lasers on the same substrate or wafer, and there is no reduction in the performance of the transistors and lasers. So 'this The problem solved by the invention is to propose a Materials and wafers are used to make transistors and lasers, so that the efficiency of the transistors and lasers is almost the same as that of components manufactured separately. To make the transistor and laser on the same substrate, the appropriate semiconductor layer must first be made. Sequentially plated on the substrate to form the required basic structure. 'What's special is that this original structure is like a traditional heterobipolar transistor structure. Some areas on the wafer can be changed to laser The structure can be made into a vertical injection type (Vertical Injection). Its efficiency can be comparable to an independent laser element. This structure is changed by expanding zinc into the thin film material layer. This method The advantage is that the same structure can be used to make lasers and heterobipolar transistors and obtain the best functional performance as their separate components. Similar structures are also used for GaAs / GaAlAs and are found in J. Katz, N. Bar -Chaim, P. C Chen, S. Margalit, I. Ury, D. Wilt, M. Yust, A. Ya [iv: " GaAs / GaAlAs bipolar transistor And heterostructure laser single crystal Film integration process " Appl. Phys · Let., 37 (2), 211, 1980 The paper size of this paper applies the Chinese Standards for Standardization (CNS) A4 (2 丨 ox297 mm) (Please read the note on the back first Please fill in this page for the matters). Binding. Order 4371 〇9 Α7 Β7 The consumer cooperation of the Central Standards Bureau of the Ministry of Economic Affairs Du Yinzhuang V. Description of Invention (5) Application. In this paper, the structure used is to place the laser's active area (Active v / area) at the base portion of the WW heterobipolar transistor, which is different from the method proposed here. In AKGoyai, M.s. Miller, s. I. Long and D. Leonard, the epitaxial structure is used to integrate laser and heterobipolar transistors, 'SPIE, Vol. 2148, pp.359-366, 1994 'The single-chip integration process is also used in the GaAs / GaAlAs system, but in this system, the active area of the laser is located in the area corresponding to the collector of the heterobipolar transistor, just like the design of the present invention. This method gives the designer greater freedom in design, and can optimize the functions of both components. Heterobipolar transistors and laser diodes are fabricated from the same epitaxial structure. The transistor can be directly plated with an electrode layer and separated and separated by etching to make it directly from the epitaxial structure. Each active layer of the transistor is formed by an epitaxial layer in a multilayer thin film structure. In order to manufacture the laser diode ', zinc must be diffused into the upper laminated film in the multilayer film to change its doping characteristics from n-type to p-type. The diffusion step is performed only on selected specific areas on the wafer, so that the transistor and laser diode can be integrated on a single wafer. Conversely, the doping characteristics of the uppermost film can also be changed from η-type to ρ-type. The advantages and objects of the present invention will be explained more clearly in the following description. The purpose and advantages of this invention can be understood through the methods, processes, equipment, and combinations described in the scope of the patent application. Brief Description of the Drawings: The explanation from the following non-Hmiting specific examples can help me apply the paper wave scale to the ten countries® home kneading rate (CNS) A4 specification (21〇297297). ---- ---- ^ ------, π ----- 1 ^-, (Please read the precautions on the back before filling out this page) 4371 〇9 Α7 Β7 Shellfish Consumption of Yinjia Sample Bureau, Ministry of Economic Affairs Cooperation Du Yinzhuang 5. Invention Description (6) We have a deeper understanding of the present invention. -Fig. 1 is a schematic cross-sectional view of a multilayer memory film structure suitable for making a transistor. -Figure 2 is a diagram of a suitable laser structure by diffusing a specific substance into the multilayered film. -Figure 3 is a schematic cross-sectional view of a transistor made from the multilayer thin film structure of Figure 1. FIG. 4 is a schematic cross-sectional view of a mine structure made of the multilayer thin-film film chef of FIG. 1 'Dan', .〇 楫 and the diffusion step shown in FIG. 2. -Figure 5 is the distribution of zinc concentration with depth below the surface of the film after the diffusion step according to Figure 2. -Figure 6 is the band diagram of the transistor in the equilibrium state of the transistor shown in Figure 3. -Figure 7 is an energy band diagram of the laser structure shown in Figure 4 when forward biased. -Figure 8 is the transistor shown in Figure 3, the collector-emitter current (icE) in a common emitter-coupler circuit (in a common emitter-coupler circuit) and the collector-emitter voltage (VCE) )Relationship. -Figure 9 is the relationship between the luminous power and current of the laser structure shown in Figure 4 α Detailed Description: In the following description, specific examples using specific materials will be used as illustrative examples = Other materials with the same properties can also be used in the production, especially some doping types can be changed to opposite doping types, such as η -type doping and p -type doping are respectively p -type and η-type doping is substituted. -9- The standard of this paper is applicable to the Chinese National Standard (CNS) Α4 specification U 丨 0X297 mm > (Please read the note on the back first > *-呗 4 after Eben)} Pei ----Yong ,, 43 71 〇9 Printed by the Ministry of Economic Affairs of the Lost Samples Bureau, Machining and Consumer Cooperatives V. Description of the Invention (7) Figure 1 shows a series of epitaxial films with indium phosphide (InP) as the substrate and plated on it Such a thin film layer can be made on the same substrate at the same time to make a heterobipolar transistor and a laser diode. This structure is implanted in the system. For simplicity, the thickness of the film drawn in the figure is the same * In actual manufacturing, there will be different thicknesses due to the different functions of each layer, materials, and impurity levels. ♦ The epitaxial structure is formed by using organic metal vapor phase epitaxy (m0Vpe) or other similar methods. With this method, the thickness of each layer and the degree of doping can be well controlled. "The substrate can use n-type doped arsenic phosphide. 'If you use a rich insulator material, it is better than doped with iron. Facilitates the production of transistors and laser diodes on a single wafer, that is, transistors or The structure of the laser diode can be made on the same wafer. The epitaxial structure contains many different material layers, the thickness of each layer and the dopants (may be P-type or η-type) are also different. Generally speaking Phosphorous arsenic phosphide has a wide band Gap 'Phoutiuininescence' wavelength = 1-3 ren m, this layer is referred to as Q (i.3). And another optical material InGaAsP has a narrower edge gap and a southern refractive index (Refractive, which can generate light with a wavelength of λ PL = I.55, and is simply referred to as Q〇55). In addition, materials with narrower energy gaps such as InGaAs can be used to reduce The resistance of the electrode contact can be seen from Figure I that this structure contains:-Layer 1 is a buffer layer of η-type arsenic phosphide. _ Layer 2 is an η-type scaler of south impurity concentration.-Layer 3 is Η-type wall fragmentation with a low doping concentration. _ Layer 4 is an N-type scaling god with a low miscellaneous concentration nQ (1.3).-Layer 5 is an un-doped multiple quantum well 5 (Muoutp 〖e Quantum -10- (Read the notes on the back first and then fill out this page) This paper size is applicable to China National Car (CNS) A4 size (210x 297 male dust) 4371 0 9 A7 _B7 V. Description of the invention (8)

Well)，主要包含一個或更多有應變或無應變（stained or unstrained)的能障（Barrier)所包圍的有應變或無應變量子井 所構成。因此多重量子井5在理想的狀沉下，是由兩種不 同型的較薄薄膜層交互堆疊而成的。整個多重量子井設計 的淨電壓（Net Vohage)為零，也就是說他的電塾已經經過 補償。 -層6為摻雜濃度高的p-Q( 1.3) = -層7為捧_雜濃度較低的η -型磷化銦。 -層8為摻雜濃度較高的η，型磷化銦。 -最上方疊層的層9為摻雜濃度較高的inGaAs。 在異質雙極電晶體中，層3、4 ' 5為電晶體的集極區 域’層6則是基極。異質界面（Heterojunctions)位於層3、4 之間和層6、7之間《而在雷射二極體的部分，層5形成主 動區，層4、6則是波導的部分》 為了製造雷射二極體，在做完磊晶結構之後，接下來進 行擴散的步驟=由圖2可以看出，從氣態的二乙基鋅 (Diethyl zinc DEZn，或是其他適當的鋅來源，將鋅擴散到 材料令’如箭頭2 1所示，在特定溫度，特定電壓，特定 的時間下’鋅會擴散到—定的深度，如圖1的情況會擴散 到層7、8、9之間。在那些鋅擴散至材料的地方，會使的 該區的材料成為電子的受體（Accept〇r)。在適當的鋅濃度 下’會使得最上方疊層的η型摻雜結構變為中性，如果鋅 的濃度更的話’這層材料反而會變成ρ型的。為了控制鋅 擴散的區域，必須先鍍上一層氮化矽（Silicon Nitride， -11 - 本紙張尺料财 S S W(CNS)A^Frir〇X297^) --------—裝-------訂-------線 (请先Μ讀背面之注意事項再填寫本頁) 經濟部中央揉隼局負工消费合作社印製 43?1 〇9 經潦部中央揉窣局貝工消费合作社印装 A7 B7 五、發明説明（9 ) 丄）如圖上2 2的部分，之後利用光蝕刻術（Lithography) 丈除要擴散鋅進去區域的氮化矽。這樣被氮化矽覆蓋的區 域就不後受到擴散的影響（不會有鋅擴散進去），如圖2 所示。 」用乾姓刻（Dry Etching)和濕Ί虫刻（Wet Etching)的組合配 。光姓刻術來製造溝槽（Gr〇〇ves)到基材以便將異質雙極電 晶體和雷射二極體的結構分開a 如同則面所提到的，異質雙極電晶體可以直接根據圖1 水平區隔來獲得。此外一種垂直的電晶體設計，如圖3， 在相對應的層中有電極和集極、基極、射極相連接。因為 要水平區隔，所以要做兩個階梯狀的溝槽（Steps)，第一個 溝槽在層2的表面，第二溝槽則在層6的表面。在進行這 些步驟的時候7電極接點1 2和電極接點1 1則分別被鍍在 (Deposited)集極和基極上。前面所提到位於集極電極外的 用來作為水平區隔的溝槽，將會完全挖穿到基材的部分。 如泉使用的是n-InP，集極電極接點12可以直接做在基材 的下方。而電極接點13則鍍在最上方簦層薄膜表層。每 一層薄膜的功能分別是： 層2為集極的電極接點層。 -集極則是由層3-5所構成。 •層6則是電晶體的基極部分=> -射極則是由廣7所構成。 •層8、9為電極接點層^ 和傳統的異質雙極電晶體結構不同之處是：為避免當結 -12- 本紙张尺度週用中國國家標準（CNS ) A4^t格（2I0X297公釐） --------—^------ΪΤ----- (請先閲讀背面之注意事項再填寫本頁) 4371 0 9 經濟部中央橾率局貝工消费合作社印製 A7 B7 五、發明说明（10 ) 構被修改成雷射結構時，雷射量子井所發出的光會被吸 收’因此材料的能隙必須要夠大以免吸收放出的光。結果 使得基極和射極之間傳導帶能隙的不連續性（Discontinuity) 降低了。然而必須強調的是，為了避免影響到電晶體的電 流增益（Current Gain)，能陈的不連續還是必須維持夠高。 另一個差異是位於集極處的多重能量井。然而這並不會影 響到電晶體的特性（非直流電下N〇n_DC的電性）。在元件 的操作方尤上’上述設計所做出的異質雙極電晶體和傳統 的高性能的異質雙極電晶體並沒有太大的差別， 如圖2所不的結構經過擴散、橫向區隔及製造接點之後 便形成雷射二極體。如果所用的基板為半絕緣性，而雷射 二極體的接點為η型的話’則該接點和電晶體基極的接點 12相同並位於相同的表面。如果基板是η_ίηρ的話，接點 可以鍍在基板的下面如圖4中所示之14。此外雷射二極體 另具有Ρ -接點15在薄膜層的最上方疊層薄膜9。圖4中各 廣薄膜的功能與作用如下： -層1-3薄膜為塗覆層（Claddiflg)及接點層。 -層4為下分離限制異質結構層（L〇wer Separate c〇nfinement Heterostructure, SCH) ° -層 5 為主動區（Active Region)- -層ό為上分離限制異質結構層（Upper Separate confinement structure) 0 -層7、8為塗覆層。 •層9為接點層。 -13- 本紙張尺纽t _家樣準( --------------11------ i (請先閱讀背面之注意事項再填寫本頁) 4371 09 A7 B7 11 五、發明説明（ 此結構包含傳統雙異質結構型的量子井雷射所有部份’ 並與波長為1.55 /zm的先進雷射二極體的標準結構極為類 似。主要的不同點是上異質結構層中的高卜型摻雜，上 異質結構層中的鬲p -型摻雜是異質雙極電晶體所必須的 並可能會造成雷射二極體的效能降低。然而如杲摻雜量適 當的話並改進結構的設計，根據實際結果及模擬顯示雷射 的效能可以被進一步提异。相對應於電晶體中的異質界面 層是位於分離異質結構層4和6的位置，至於雷射二極禮 的主動區3和第4層的下n-SCH (n-型的分離異質結構）是位 於相對應於電晶體中的集極區域。而第6層的上p_SCj^,j 是位於相對應於電晶體的基極區域中3 在實際製程中，如圖1的磊晶機材結構是在680。(：的溫度 下利用低壓的有機金屬氣相磊晶法成長在η·ΙηΡ的基板 上。鋅是利用二乙基鋅當作原料使其擴散到材料裡面，並 灌入pH 3以維持其大於一大氣壓的壓力（for an overatomospheric pressure) ’並利用氫氣作為載體。控制的 條件為溫度475°C，氣壓100毫巴，時間為1小時2 0分=鋅 的濃度在InP的薄膜層中為1 . 1〇18，濃度分佈如圖5所 示。鍍膜參數如表所示。 在製造異質雙極電晶體時利用蒸鍍和光阻剝離法（Lift-Off of Photoresist) 鍍上 ΤΊ/Pt/Au的 金屬層 作為射 極接點 ，殘 留的金屬層則作為活性離子蝕刻時（在氫氣和甲烷所形成 的電漿中）將半導體薄膜層蝕刻至層6深度時的保護層’ 配合HC1: H2〇的溼式蚀刻，然後利用相同的製程來製造基 • 14- 本紙张尺度逋用中國國家樣準（CNS ) A4规格（Z10X297公t ) <請先W請背面之注意事項再填寫本頁) t- 經濟部中夹樣隼局負工消费合作社印装 ，4371 09 A7 B7 經濟部中央樣牟局貝工消费合作社印製 五、發明説明（12 ) 極的Pt/Ti/Pt/’Au接點。氮化矽所形成的保護層則用來保護 基極和集極的接點。如圖3，如果要大量製造很多的結構 在基板上時，藉著乾式蝕刻可以去除基極和集極層中環繞 中間結構區域的部份薄膜以分隔出不同的區域^集極的接 點可以藉由蒸鍵Ni/AuGe在基板的下方來形成圖8表示 製成之電晶體其集極-射基間電流ICE隨集極-基極間電壓 改變的情形’在相同射極線路的狀況下（in a common emitter circuit) ’並在不同基極電流的情況下，ιΒ=〇，20, 40 ...,100 βΑ β 從基材製造階梯式（Ridge Type)雷射二極體，首先必須 在基材表面製造出間隔寬度為寬的線條以區隔出每 個雷射二極體的結構。然後利用上述製造射接接點的方式 將上方疊層接點鍍到上表層。金屬接點的薄膜在後績乾蝕 刻蝕刻深度到p -塗覆層（p-cladding)時可以作為保護層。為 了完成階梯式雷射二極體的結構並利用選擇性溼式蝕刻將 深度蝕刻至蝕刻終止層（Etch Stop Layer)。為了絕緣保護 及平坦化的緣故’並利用電漿輔助化學氣相（PECVD)鍍一 層1.5 厚的氮化矽。晶片在拋光研磨至厚度僅剩120仁m 時再蒸鏟一層AuGe /Ni/Ti/Pt/Au在晶片背面作為接點。然 後雷射二極體經分割並黏接到矽晶片上以幫助散熱。圖9 顯示所製造之雷射二極體其發光功率和注入電流之間的關 係。 -15- 本紙張尺度逋用中國®家搮車（CNS)A4现格（2丨0X297公釐） (請先閱讀背面之注意事項再填寫本頁) i 4" τ 4371 Ο 9 Α7 Β7 五、發明说明（13 ) 經濟部中央樣隼局男工消费合作社印裝 表L HBT-結構 每層的名稱 材料 厚度 摻雜濃度 [nm] [cm’3] 接點 InGaAs 50 n:5 · 10 丨8 InP 1300 n:l * 1018 InGaAsP ( λ -1,3 /Z m) 2 n:l * 1018 射極 InP 200 n:5 · 1017 距離層 InGaAsP ( λ =1，3 # m) 5 未掺雜 基極 InGaAsP ( λ -1,3 β m) 80 p:4 · 10ls 集極 9xInGaAsP，( ；Ul，3 # m)-能障層，8 未摻雜 拉伸應力0,9%， 8xInGaAsP4 # m)-量子丼層 7 未摻雜 層7壓縮應力1% 集極 InGaAsP ( Λ=1}3 /Zm) 40 n:l · 1017 集極 InP 200 n:l · 1017 次集極 InP 500 n:l · 10IS 表2.雷射二極體結構 每層的結構 材料 厚度 摻雜濃度 [nm] [cm-3] 接點 InGaAs 50 擴散p-型元素 包覆層 InP 1300 搞散p-型元素 袖刻停止層 InGaAsP ( λ =1?3 /Z m) 2 搞散p-型元素 塗覆層 InP 200 換散p-型元素 p-SCH InGaAsP ( λ =lf3 jU m)' 5 搞教p-型元素 p-SCH InGaAsP ( λ =1,3 β m) 80 η;4 · 1018 主動層 9xInGaAsP-(又=153 y m)-能障層 S 未摻雜 拉伸應力0j%， 8xInGaAsP-(又=1，55 /Z m)-量子井層 7 未摻雜 層，壓縮應力1% n-SCH InGaAsP ( λ =1?3 m) 40 n:l * 1017 包覆層 InP 200 n:l * 10i7 包覆層 InP 500 n:l * ΙΟ18 -16- (請先閲讀背面之注意事項再填寫本頁) I丨裝 訂 本紙張尺度遘用中國國家標準（CNS > A4規格（210X297公釐） 4371 〇 9 A7 B7 五、發明説明（14 ) 圖6為異質雙極電晶體在平衡狀態下計算所得之電子和 電洞的ft ττ圖。圖7則為雷射二極體在順向偏恩下的能帶 圖。 上述的雷射二極體為側邊發光型，然而只要經過些許的 製程改變也可以製造成表面發光型的雷射二極體。 如果精於製造的程序及方法，很容易即可以改善這些條 件°因此本發明並不僅僅侷限於上述所提出之代表性元件 及例子。兑是各種改變及概念或範圍不脫離以上所描述 的’皆包含在本專利申請範圍之内3 (請先M讀背面之注意項再填寫本頁) 裝 經濟部中央橾牟局貝工消费合作社印装 -17- 本紙張尺度遴用中囷國家橾準（CNS ) A4说格（210X297公* )Well), which mainly consists of one or more strained or unstrained quantum wells surrounded by strained or unstrained barriers. Therefore, the multiple quantum well 5 sinks in an ideal shape, and is formed by stacking two different thin film layers alternately. The net voltage (Net Vohage) of the entire multiple quantum well design is zero, which means that his voltage has been compensated. -Layer 6 is p-Q (1.3) with high doping concentration =-Layer 7 is η-type indium phosphide with lower impurity concentration. -The layer 8 is an η-type indium phosphide with a higher doping concentration. -The layer 9 stacked on top is inGaAs with a higher doping concentration. In a heterobipolar transistor, layers 3, 4'5 are the collector regions of the transistor 'and layer 6 is the base. Heterojunctions are located between layers 3 and 4 and between layers 6 and 7 "In the part of the laser diode, layer 5 forms the active area, and layers 4 and 6 are part of the waveguide" To make lasers Diode, after completing the epitaxial structure, the next step of diffusion = can be seen from Figure 2, from the gaseous diethyl zinc (Diethyl zinc DEZn, or other appropriate zinc source, diffuse zinc to The material order 'as shown by arrow 21, at a certain temperature, a certain voltage, and a certain time,' zinc will diffuse to a certain depth, as shown in the case of Fig. 1, it will diffuse to layers 7, 8, and 9. In those Where zinc diffuses to the material, the material in this region will become an acceptor of electrons. At an appropriate zinc concentration, 'the n-type doped structure of the uppermost layer will become neutral. If the concentration of zinc is greater, this layer of material will instead become ρ-type. In order to control the area of zinc diffusion, a layer of silicon nitride (Silicon Nitride, -11-SSW (CNS) A ^ Frir 〇X297 ^) ---------- install ------- order ------- line (please read the note on the back first) Please fill in this page again.) Printed by the Central Government Bureau of the Ministry of Economic Affairs and the Consumer Cooperative of the Ministry of Economic Affairs. 43-1 〇9 Printed by the Central Government Bureau of the Ministry of Economic Affairs and printed by the Shell Industry Consumer Cooperative. A7 B7 5. Description of the invention (9) 丄) Part 2 2 and then use Lithography to remove silicon nitride in the area where zinc is to be diffused. In this way, the area covered by silicon nitride will not be affected by diffusion (no zinc will diffuse into it), as shown in Figure 2. "Use a combination of Dry Etching and Wet Etching. Photolithography to make grooves (grooves) to the substrate so as to separate the structure of the heterobipolar transistor and the laser diodea As mentioned in the above, the heterobipolar transistor can be directly based on Figure 1 is obtained by horizontal segmentation. In addition, a vertical transistor design, as shown in Figure 3, has electrodes, collectors, bases, and emitters connected in the corresponding layers. Because it is to be separated horizontally, two step-shaped grooves (Steps) are to be formed. The first groove is on the surface of layer 2 and the second groove is on the surface of layer 6. During these steps, the 7-electrode contact 12 and the 11-electrode contact 11 are plated on the deposited collector and the base, respectively. The trenches mentioned above, which are located outside the collector electrode and used as a horizontal partition, will be completely cut through to the part of the substrate. If N-InP is used, the collector electrode contact 12 can be directly under the substrate. The electrode contact 13 is plated on the top surface of the thin film. The function of each layer is: Layer 2 is the electrode contact layer of the collector. -The collector is composed of layers 3-5. • Layer 6 is the base part of the transistor = >-Emitter is composed of Guang7. • Layers 8 and 9 are electrode contact layers ^ The difference from the traditional heterobipolar transistor structure is: To avoid dangling -12- This paper uses China National Standard (CNS) A4 ^ t grid (2I0X297) (Li) --------— ^ ------ ΪΤ ----- (Please read the precautions on the back before filling out this page) 4371 0 9 Shellfish Consumer Cooperative, Central Bureau of Economic Affairs, Ministry of Economic Affairs Print A7 B7 V. Description of the invention (10) When the structure is modified into a laser structure, the light emitted by the laser quantum well will be absorbed. Therefore, the energy gap of the material must be large enough to avoid absorbing the emitted light. As a result, the discontinuity in the conduction band energy gap between the base and the emitter is reduced. However, it must be emphasized that in order to avoid affecting the current gain of the transistor, the discontinuity must be maintained high enough. Another difference is the multiple energy wells located at the collector. However, this does not affect the characteristics of the transistor (the electrical properties of Non_DC under non-direct current). Especially in the operation of the element, the heterobipolar transistor made by the above design is not much different from the traditional high-performance heterobipolar transistor. The structure shown in Figure 2 is diffused and separated laterally. After manufacturing the contacts, a laser diode is formed. If the substrate used is semi-insulating, and the contact point of the laser diode is η-type, then the contact point is the same as the contact point 12 of the transistor base and located on the same surface. If the substrate is η_ίηρ, the contacts can be plated on the underside of the substrate as shown in Figure 14-14. In addition, the laser diode has a P-contact 15 and a thin film 9 is laminated on the uppermost part of the thin film layer. The functions and functions of the various films in Figure 4 are as follows:-Layers 1-3 films are Claddiflg and contact layers. -Layer 4 is the lower separation limiting heterostructure layer (SCH) °-Layer 5 is the active region--Layer 6 is the upper separation limiting heterostructure layer (Upper Separate confinement structure) 0-layers 7, 8 are coating layers. • Layer 9 is the contact layer. -13- This paper ruler t _ home sample standard (-------------- 11 ------ i (Please read the precautions on the back before filling this page) 4371 09 A7 B7 11 V. Description of the invention (This structure contains all parts of a traditional dual heterostructure type quantum well laser 'and is very similar to the standard structure of an advanced laser diode with a wavelength of 1.55 / zm. The main differences are High-type doping in the upper heterostructure layer, and 鬲 p -type doping in the upper heterostructure layer is necessary for the heterobipolar transistor and may cause the performance of the laser diode to decrease. However, such as erbium doping If the amount of impurities is appropriate and the design of the structure is improved, the laser performance can be further improved according to actual results and simulations. Corresponding to the heterogeneous interface layer in the transistor is located at the position separating the heterostructure layers 4 and 6, as for the lightning The lower n-SCH (n-type separated heterostructure) of the active region 3 and the fourth layer of the radio diode is located in the collector region corresponding to the transistor. The upper p_SCj ^, j of the sixth layer is It is located in the base region corresponding to the transistor. In the actual manufacturing process, the epitaxial machine structure shown in Figure 1 is at 680. (: At low temperature, the organic metal vapor phase epitaxy method is used to grow on the η · ΙηΡ substrate. Zinc is diffused into the material by using diethylzinc as the raw material, and is filled with pH 3 to maintain its pressure greater than one atmosphere. For an overatomospheric pressure, and using hydrogen as a carrier. The controlled conditions were a temperature of 475 ° C, an air pressure of 100 mbar, and a time of 1 hour and 20 minutes = the concentration of zinc in the InP film layer was 1.1. 18. The concentration distribution is shown in Figure 5. The coating parameters are shown in the table. When manufacturing a heterobipolar transistor, a metal layer of Ί / Pt / Au is deposited by evaporation and the Lift-Off of Photoresist method as a coating Emitter contacts, and the remaining metal layer is used as a protective layer when the semiconductor thin film layer is etched to the depth of layer 6 during reactive ion etching (in the plasma formed by hydrogen and methane). Wet etching with HC1: H2〇 And then use the same manufacturing process to manufacture the base • 14- This paper size uses the Chinese National Standard (CNS) A4 size (Z10X297 male t) < Please first note the back page before filling this page) t- Ministry of Economy Negative workload Printed by Cooperative Cooperative, 4371 09 A7 B7 Printed by the Shell Sample Consumer Cooperative of the Central Sample and Mobilization Bureau of the Ministry of Economic Affairs 5. Description of the invention (12) Pt / Ti / Pt / 'Au contacts. The protective layer formed by silicon nitride is It is used to protect the contacts of the base and collector. As shown in Figure 3, if a large number of structures are to be manufactured on the substrate, a part of the thin film surrounding the intermediate structure region in the base and collector layers can be removed by dry etching. Separate different regions ^ The contacts of the collector can be formed by evaporating the bond Ni / AuGe under the substrate. Figure 8 shows the transistor made. The collector-emitter current ICE varies with the collector-base voltage. Changing situation 'in the same emitter circuit (in a common emitter circuit)' and in the case of different base currents, ιΒ = 0, 20, 40 ..., 100 βΑ β manufacturing stepped from the substrate (Ridge Type) Laser diodes must first be manufactured on the surface of the substrate with a line with a wide interval width to distinguish each laser diode structure. Then, the above-mentioned method of manufacturing the shot contact is used to plate the upper laminated contact to the upper surface layer. The thin film of the metal contact can be used as a protective layer when the dry etching etch depth reaches p-cladding. In order to complete the structure of the stepped laser diode, selective wet etching is used to deeply etch to the Etch Stop Layer. For the sake of insulation protection and planarization ', a plasma-assisted chemical vapor phase (PECVD) coating is used to deposit a layer of 1.5 silicon nitride. When the wafer is polished to a thickness of only 120 in.m, a layer of AuGe / Ni / Ti / Pt / Au is steamed on the back of the wafer as a contact. The laser diode is then split and glued to a silicon chip to help dissipate heat. Figure 9 shows the relationship between the light emitting power and the injection current of the manufactured laser diode. -15- This paper uses China® furniture (CNS) A4 (2 丨 0X297 mm) (please read the precautions on the back before filling this page) i 4 " τ 4371 〇 9 Α7 Β7 V. Description of the invention (13) Printed form of the male sample consumer cooperative of the Central Bureau of Samples of the Ministry of Economic Affairs L HBT- Name of each layer of the structure Material thickness Doping concentration [nm] [cm'3] Contact InGaAs 50 n: 5 · 10 丨 8 InP 1300 n: l * 1018 InGaAsP (λ -1,3 / Z m) 2 n: l * 1018 emitter InP 200 n: 5 · 1017 distance layer InGaAsP (λ = 1,3 # m) 5 undoped group InGaAsP (λ -1,3 β m) 80 p: 4 · 10ls collector 9xInGaAsP, (; Ul, 3 # m) -energy barrier layer, 8 undoped tensile stress 0,9%, 8xInGaAsP4 # m) -Quantum plutonium layer 7 Undoped layer 7 Compressive stress 1% InGaAsP (Λ = 1) 3 / Zm) 40 n: l · 1017 collector InP 200 n: l · 1017 secondary collector InP 500 n: l · 10IS Table 2. Structure material thickness of each layer of laser diode structure Doping concentration [nm] [cm-3] Contact InGaAs 50 Diffusion p-type element coating InP 1300 Disperse p-type element sleeve stop Layer InGaAsP (λ = 1? 3 / Z m) 2 Scatter p-type element coating InP 200 Scatter p-type element p-SCH InGaAsP (λ = lf3 jU m) '5 Teach p-type element p-SCH InGaAsP (λ = 1,3 β m) 80 η; 4 · 1018 active layer 9xInGaAsP- (again = 153 ym) -energy barrier layer S undoped tensile stress 0j%, 8xInGaAsP- (again = 1,55 / Z m) -quantum well layer 7 undoped Layer, compressive stress 1% n-SCH InGaAsP (λ = 1 ~ 3 m) 40 n: l * 1017 cladding layer InP 200 n: l * 10i7 cladding layer InP 500 n: l * ΙΟ18 -16- (please Read the notes on the reverse side and fill in this page) I 丨 The size of the paper is bound to the Chinese national standard (CNS > A4 size (210X297 mm) 4371 〇9 A7 B7 V. Description of the invention (14) Figure 6 shows heterodipole Ft ττ diagram of electrons and holes calculated by the transistor under equilibrium. Figure 7 shows the energy band diagram of the laser diode under forward bias. The above-mentioned laser diode is a side-emitting type, but it can also be manufactured into a surface-emitting type laser diode with a few process changes. These conditions can be easily improved if skilled in manufacturing procedures and methods. Therefore, the present invention is not limited to the representative components and examples proposed above. Various changes and concepts or scopes that do not depart from those described above are included in the scope of this patent application3 (please read the notes on the back before filling out this page). Printed-17- This paper uses China National Standards (CNS) A4 format (210X297) *

Claims (1)

ABCD 補充4371 Ο 9 —______ 六、申請專利範圍 •—種在具有一表面之相间基板上製造電晶體及雪射二極 體之方法’其步驟包括： -在基板表面上建構—疊層序列，選擇在疊層序列中 的叠層成為半導體並具有此一順序和組成及捧雜濃度， 使得 广在基材界限屋之表面處，側向界限至少一個第— ω時，在該至少一個第一區域中形成電晶體结構，及 . δ使一種物質揸1進入該順序層之上方疊層中，位 於基板表面之至少一個第二區域時，各第二區域係與第 一區域彼此分隔，改變上方吞層中的搀雜成j，其側向 地界限至少一個第二區域中之至少一個第二菡 層‘ ’而形成雷射電晶體結構。 2. 如申請專利範園第丨項之方法，其中簦廣岸列係經選 擇，以致疊層序列中有一層形成量子井結構或雷射結構 的王動區，該雷射結構係在使該物質擴散至第二區域 中’並側向界限第二區域時而形成。 3. 如申請專利範圍第i項之方法，其中疊層序列係經選 擇，以致當使該物置至至少一個第二區域中之疊層 序列之上方疊層時，在上方疊層中摻雜之型式’會從卜 摻雜改變至p -摻雜或從£_摻雜改變至n摻鍊。 4. 如申請專利範圍第1項之方法，其中疊層序列係經選 擇，因此一個異質接面係在疊層序列中形成，於是在側 向界限至少一個第一區域時，致使在第一區域中之疊層 形成一個電晶體結構，此電晶體結構為1質繫炻愈符 ___-18， 本纸張又度連用中國_家橾準（CNS > Α4规格（210><297公簸） --------------ΐτ------0 i {請先Μ讀背面之注意事項再填寫本頁) 經滌部令央標率局—工消费合作社印装 /¾ 〇g 43?1 A8 B8 C8 D8 、申請專利範圍 ϋ 經濟部4-央輮準局見工消费合作社印裂 如申請專利範圍第1項之方法，其+眷層序列係經選 擇，因此一個異質接面係在疊層序列中形成 > 以致當側 向界限至少一個第一區域時，致使在第—區域内之疊層 中形成電晶體結構’此電晶體結構為異質雙極電晶體， 其具有異質接面位在該電晶體結構射極和基極之間。 6.如申請專利範圍第1項之方法，其中疊層序列係經選 擇，因此—疊層序列中之第一層係與疊層序列中之直接相 鄰第二層形成異質接面..，介於該第一層與第二層之間， 因此在使該物質擴散至該至少一個第二區域中之上方疊 層，及側向界限該至少一個第二區域，以致在至少一個 第二區域中之疊層形成雷射结構時，該第一層係對雷射 結構之主動區域塊形成一個各別界限異質結構（S(：H)。 7·如申請專利範圍第丨項之方法，其中疊層序列係經選 擇，因此當側向界限至少一個第一層，以致在第一區_域 中之吞層形成雷射結構時，在疊層序列辛之疊層會在電 晶體結構中形成一層集極，當使該物質播散到至少一個 第二區域中之上方疊層並側向界限該至少一個第二區 域’以致在至少一個第二區域中之疊層形成雷射結構 時’則形成一種獨立分離的n _型界限異質結構（n_sc：H) 來作為雷射結構的主動區^ 8.如申請專利範圍第1項之方法，其中疊層序列係經選 擇’因此當側向界限至少一個第一區域，以致使該至少 一個第一區域中之疊層形成雷射結構時，在叠層序列t -19- (請先Μ讀背面之注意Ϋ項再填寫本頁) .丨-裝. 訂 - ΜNs c (V - ^ABCD Supplement 4371 Ο 9 —______ 6. Scope of Patent Application • —A method for manufacturing transistors and snow-emitting diodes on interphase substrates with one surface 'The steps include:-Constructing on the substrate surface-a stacking sequence, The stack selected in the stack sequence becomes a semiconductor and has this sequence and composition and impurity concentration, so that at the surface of the substrate boundary house, the lateral boundary is at least one first-ω, at the at least one first The transistor structure is formed in the region, and δ causes a substance 揸 1 to enter the upper layer of the sequential layer. When at least one second region is located on the substrate surface, each second region is separated from the first region and changes the top. The dopant in the engulfing layer forms j, which laterally delimits at least one second plutonium layer '' in at least one second region to form a laser crystal structure. 2. For the method of applying for the patent item # 1, in which the Guangguang bank system is selected so that there is a layer in the stacking sequence that forms a quantum motion structure or a laser structure, the laser motion structure is used to make the The substance diffuses into the second region and forms laterally when the second region is delimited. 3. The method as claimed in item i of the patent application, wherein the stacking sequence is selected so that when the object is stacked above the stacking sequence in at least one second region, the top stack is doped with Pattern 'will change from p-doped to p-doped or from p-doped to n-doped. 4. For the method of claim 1 in the patent application scope, in which the stacking sequence is selected, so a heterojunction is formed in the stacking sequence, so when at least one first area is laterally bound, the first area is caused The laminated structure in the middle forms a transistor structure. The transistor structure is 1 quality system Yu Yu Fu ___- 18. This paper is also used in China_ 家 橾 准 (CNS > Α4 size (210 > < 297) (Ban) -------------- ΐτ ------ 0 i (Please read the precautions on the back before filling in this page) Order issued by the Ministry of Economic Affairs Cooperative printed / ¾ 0g 43? 1 A8 B8 C8 D8, the scope of patent application ϋ Ministry of Economic Affairs 4-Central Bureau of quasi-government see the industrial and consumer cooperative printing method such as the first scope of the patent application, its + dependent sequence Selection, so that a heterojunction is formed in the stacking sequence > such that when laterally bounding at least one first region, a transistor structure is formed in the stack in the first region 'this transistor structure is heteroduplex A polar transistor having a heterojunction between the emitter and the base of the transistor structure. 6. The method according to item 1 of the scope of patent application, wherein the stacking sequence is selected, so-the first layer in the stacking sequence forms a heterojunction with the directly adjacent second layer in the stacking sequence .., Is interposed between the first layer and the second layer, and thus is stacked above the substance to diffuse into the at least one second region, and laterally delimits the at least one second region so that at least one second region When the layers are stacked to form a laser structure, the first layer forms a separate boundary heterostructure (S (: H)) to the active area block of the laser structure. 7. The method according to item 丨 in the scope of patent application, wherein The stacking sequence is selected so that when at least one first layer is laterally bounded so that a laser structure is formed in the swallowing layer in the first region, the stacking in the stacking sequence will form in the transistor structure. A layer of collector, when the substance is spread to the upper stack in at least one second region and laterally bounds the at least one second region 'so that the stack in at least one second region forms a laser structure' then Form an independent n-type boundary difference Structure (n_sc: H) as the active area of the laser structure ^ 8. As in the method of the scope of patent application item 1, wherein the stacking sequence is selected 'so when at least one first area is delimited laterally, When the stack in a first area forms a laser structure, at the stack sequence t -19- (please read the note on the back before filling in this page). 丨-installed. Order-ΜNs c (V-^ -C 4371 Ο 9 六、申請專利範圍 散到至:：體結構中形成一層基極’當使該物質擴 ㈣至乂-個第二區域中之上方叠廣並側向界限至少一 個第二區域，以致使在至少一個第二區 趣構時，形成-種獨立分離的ρ_型界限異質二: SCH)來作為雷射結構之主動區。 9. -種具有-#層序列之基板，在此眷層㈣中之叠屠係 由半導體材料構成，並位於基極表面上，其中疊層序列 包含以此-順序具有此種组成及捧雜之#層，在基板表 面之第一區岑被惻向界限時，在裹—區^中之要層係形 成電晶體結構，及當使預定捿雜劑播散£這些疊層之上 立^時，於上方查_層中之摻雜係被改變，因此當基板 表面之第二區域被側向界限時，於第二區域中之疊層會 形成窜射結構» 10. 如申請專利範圍第9項之基板，其中疊層序列包含以此 順序具有此種組成及摻雜濃度之疊層，當基板表面之第 一區域被侧向界限，以致在第一區域中之疊層形成電晶 禮結構時’該疊層係在電晶體結構中形成集極，其包含 一層，當使預定摻雜劑擴散至該疊層序列之上方疊層 中’以改變上方疊層中之摻雜，及側向界限基板表面之 第二，以致使第二區域中之疊層形成雷射結構時， 該層係形成雷射結構之量早井結槿或主動區β 11. 如申請專利範圍第9項之基板，其中疊層序列包含以此 順序具有此種組成及摻雜之疊層，當使預定摻雜劑擴散 至上方疊層時，上方疊層之摻雜型式係由η -摻雜轉變為 本紙張尺度遑用國家橾率（CNS ) Α4規格（210Χ297公釐） 1^---;----d------ir------0 (請先Μ讀背面之法意事項再4寫本頁) 鍾濟部_央標準局員工消费合作社印«. -20- 43Ή Ο 9 Α8 Β8 CS D8 六、申請專利範圍 Ρ -摻雜或是由Ρ-摻雜轉變為η_掺雜a 12. 如申請專利範圍第9項之基板，其中疊層序列包含具有 特定堆疊順序，組成及摻雜之疊層，以致至少一個異質 在疊層序列中形成，因此當侧向界限基板表面之第 一區域，以致使星一尾差之疊層形成電晶體結構時，該 電晶體結構為異質嚶炻電晶體。 13. 如申請專利範圍第9項之基板，其中簦層序列包含具有 特定堆疊順序’组成及摻雜之晏層，以致一個異質接面 係於疊層序列中形成，此異質接面係位在疊層序列中之 第一層與第一層之間，當基板表面之第一區域被側向界 限’以致第一區域中之疊層形成電晶體姑構時，該第一 層與第一層係個別形成電晶禮結構之射極與基極，此電 晶體結構為異質雙極電晶體。 經濟部令央檬隼局貝工消费合作杜印«. ~ i — (請先wt»背面之注意事項再填寫本頁) 14. 如申請專利範圍第9項之基板，其中疊層序列包含以此 順序具有此種組成及摻雜之疊層，當基板表面之第一區 域被側向界限，以致藉第一區域中之疊層形成電晶禮結 構時’遠層係形成電晶體結媒之集極，當使預定摻雜劑 擴散至上方疊層中，且基板之第二區域被侧向界限，以 致在第二s_座中之疊層形成雷射結構時，係形成—個獨 立分離之η -型界限異質结構（n-SCH)來作為雪射結構之 主動區。 15. 如申請專利範圍第9項之基板，其中疊層序列包含以此 順序具有此種組成及摻雜之疊層，當基板之策一區域被 側向界限’以致在第一區域中之疊層形成電晶想、结嫌 -21 - 本紙張尺度逋用中國國家標準（CNS )八4規》格（210X297公釐） 4371 Ο 9 H C8 D8 六、申請專利範圍 時，該層係包含在電晶體之基極中，當使.預..定Ιϋ激掖 卷至上方春層中，且基板之j二區域被側向界限，以致 在第二區域中之疊層形成雷射結構，則形成一個獨立分 離的Ρ -型界限異皙結mfp-SCH)來作為之主動 區。 (請先閣讀背面之注意事項再填寫本頁) '1T 經濟部中央標準局貝工消費合作社印裂 -22- 本紙張尺度適用中躅«家揉準（CNS ) A4規格（210X297公釐）-C 4371 〇 9 VI. The scope of patent application is scattered to :: a layer of bases is formed in the body structure. When the substance is expanded to one of the second regions, it is widened and laterally bounded by at least one second region. Therefore, when at least one second zone is interesting, an independent and separate ρ-type boundary heterogeneity II (SCH) is formed as the active zone of the laser structure. 9.-A substrate with a-# layer sequence, in which the stacking system is composed of semiconductor materials and is located on the base surface, where the stacking sequence includes this composition and inclusions in this order The # layer, when the first region of the substrate surface is pushed to the limit, the main layer system in the wrap-region ^ forms a transistor structure, and when a predetermined dopant is dissipated, these stacks stand on top of each other. At the time, the doping system in the upper layer is changed, so when the second region of the substrate surface is laterally delimited, the layer in the second region will form a transmission structure »10. The substrate of item 9, wherein the stacking sequence includes a stack having such a composition and a doping concentration in this order. When the first region on the surface of the substrate is laterally delimited, the stack in the first region forms a crystallite. In the structure, 'the stack forms a collector in the transistor structure, which includes a layer, when a predetermined dopant is diffused into the upper stack of the stack sequence' to change the doping in the upper stack, and the side Toward the boundary substrate surface so that the stacked shape in the second region In the case of a laser structure, this layer forms the amount of the laser structure, which is early well-formed or active area β 11. For the substrate of item 9 of the scope of the patent application, the stacking sequence includes those having this composition and doping in this order. Lamination, when the predetermined dopant is diffused to the upper lamination, the doping pattern of the upper lamination is changed from η-doping to the paper size (CNS) A4 specification (210 × 297 mm) 1 ^ ---; ---- d ------ ir ------ 0 (Please read the French and Italian matters on the back before writing this page) Zhongji Ministry _ Central Standards Bureau Staff Consumer Cooperatives Print «. -20- 43Ή Ο 9 Α8 Β8 CS D8 VI. Patent application scope P-doped or converted from P-doped to η-doped a 12. For example, the substrate of the ninth scope of the patent application, where The layer sequence includes a stack with a specific stacking sequence, composition, and doping, so that at least one heterogeneity is formed in the stack sequence. Therefore, when the first region of the substrate surface is laterally delimited, the stack with a star difference is formed electrically. In the case of a crystal structure, the transistor structure is a heterofluoride. 13. For the substrate with the scope of patent application No. 9, wherein the sequence of the plutonium layer includes a specific stacking sequence and a doped layer, so that a heterojunction is formed in the laminated sequence, and the heterojunction is located at Between the first layer and the first layer in the stacking sequence, when the first region of the substrate surface is laterally bounded so that the stack in the first region forms a transistor structure, the first layer and the first layer It is the emitter and base of the transistor structure, which is a heterobipolar transistor. Order printed by the Ministry of Economic Affairs of the Yangmeng Bureau of Shellfish Consumer Cooperation «. ~ I — (Please note on the back of wt» before filling out this page) 14. If the substrate of the scope of patent application No. 9 is applied, the stacking sequence includes This sequence has such a composition and doped stack. When the first region of the substrate surface is laterally delimited, so that when the stack is formed in the first region to form a transistor structure, the 'distant layer' forms the transistor junction. The collector, when a predetermined dopant is diffused into the upper stack, and the second region of the substrate is laterally delimited, so that the stack in the second s-block forms a laser structure, an independent separation is formed. The n-type boundary heterostructure (n-SCH) is used as the active area of the snow-shot structure. 15. For a substrate with the scope of patent application item 9, wherein the stacking sequence includes a stack having such a composition and doping in this order, when a region of the substrate is laterally bounded so that the stack in the first region The layer is formed and the crystal is formed.-This paper uses the Chinese National Standard (CNS) Regulation 8 (210X297 mm) 4371 Ο 9 H C8 D8. 6. When applying for a patent, this layer is included in the In the base of a transistor, when the .predetermined.determined ϋ is excited into the upper spring layer, and the two regions of the substrate are laterally delimited, so that the stack in the second region forms a laser structure, then An independent P-type marginal heterojunction (mfp-SCH) is formed as its active region. (Please read the precautions on the back before filling in this page) '1T Printed by the Central Laboratories of the Ministry of Economy, Central Bureau of Standards and Consumers' Cooperatives -22- This paper size is applicable to the standard «Home Rubbing Standard (CNS) A4 (210X297 mm)"
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Publication number Priority date Publication date Assignee Title
US7247892B2 (en) * 2000-04-24 2007-07-24 Taylor Geoff W Imaging array utilizing thyristor-based pixel elements
JP2002057405A (en) * 2000-08-07 2002-02-22 Mitsubishi Electric Corp Semiconductor laser device and its manufacturing method
US6525348B1 (en) * 2001-07-17 2003-02-25 David C. Scott Two terminal edge illuminated epilayer waveguide phototransistor
US6531721B1 (en) * 2001-12-27 2003-03-11 Skyworks Solutions, Inc. Structure for a heterojunction bipolar transistor
US20040161006A1 (en) * 2003-02-18 2004-08-19 Ying-Lan Chang Method and apparatus for improving wavelength stability for InGaAsN devices
KR20060063947A (en) * 2003-08-22 2006-06-12 더 보드 오브 트러스티스 오브 더 유니버시티 오브 일리노이 Semiconductor device and method
US7446926B2 (en) 2004-09-27 2008-11-04 Idc, Llc System and method of providing a regenerating protective coating in a MEMS device
US7471855B2 (en) * 2005-07-13 2008-12-30 Alcatel-Lucent Usa Inc. Monlithically coupled waveguide and phototransistor
US8260151B2 (en) * 2008-04-18 2012-09-04 Freescale Semiconductor, Inc. Optical communication integration
US8592745B2 (en) * 2009-08-19 2013-11-26 Luxtera Inc. Method and system for optoelectronic receivers utilizing waveguide heterojunction phototransistors integrated in a CMOS SOI wafer
JP2011199031A (en) * 2010-03-19 2011-10-06 Denso Corp Semiconductor device, and method of manufacturing the same
CN104485578B (en) * 2014-12-11 2017-05-10 中国科学院半导体研究所 Transistor laser, and manufacturing method thereof
US10134881B1 (en) * 2017-05-18 2018-11-20 Qualcomm Incorporated Quantum well thermal sensing for power amplifier
DE102018124576A1 (en) 2018-10-05 2020-04-09 Osram Opto Semiconductors Gmbh METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT WITH IMPLEMENTATION OF A PLASMA TREATMENT AND SEMICONDUCTOR COMPONENT
US11271566B2 (en) * 2018-12-14 2022-03-08 Integrated Device Technology, Inc. Digital logic compatible inputs in compound semiconductor circuits
CN110459953A (en) * 2019-07-03 2019-11-15 潘瑶麟 A kind of mutual injection type side section accurate adjustment semiconductor laser of use for laboratory single-chip integration
CN111416274B (en) * 2020-02-27 2021-07-02 电子科技大学 Feedback type multi-pole quantum cascade ring laser
CN113130478A (en) * 2021-04-13 2021-07-16 厦门市三安集成电路有限公司 Radio frequency chip and preparation method

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373688A (en) * 1986-09-17 1988-04-04 Mitsubishi Electric Corp Semiconductor light emitting device
JPH01143285A (en) * 1987-11-28 1989-06-05 Mitsubishi Electric Corp Disordering of semiconductor superlattice and semiconductor laser device
US5164797A (en) * 1988-06-17 1992-11-17 Xerox Corporation Lateral heterojunction bipolar transistor (LHBT) and suitability thereof as a hetero transverse junction (HTJ) laser
FR2635611B1 (en) * 1988-08-18 1990-10-19 Centre Nat Rech Scient PROCESS FOR NEUTRALIZATION OF ACCEPTOR ATOMS IN TYPE P INP
US5106764A (en) * 1989-04-10 1992-04-21 At&T Bell Laboratories Device fabrication
JP2566661B2 (en) * 1990-04-18 1996-12-25 三菱電機株式会社 Impurity diffusion method
KR940005454B1 (en) * 1991-04-03 1994-06-18 삼성전자 주식회사 Compound semiconductor device
US5202896A (en) * 1991-07-16 1993-04-13 The United States Of America As Represented By The Secretary Of The Air Force Bipolar inversion channel field effect transistor laser
US5239550A (en) * 1991-12-03 1993-08-24 University Of Connecticut Transistor lasers
US5266794A (en) * 1992-01-21 1993-11-30 Bandgap Technology Corporation Vertical-cavity surface emitting laser optical interconnect technology
US5283447A (en) * 1992-01-21 1994-02-01 Bandgap Technology Corporation Integration of transistors with vertical cavity surface emitting lasers
JPH0645633A (en) * 1992-07-22 1994-02-18 Nec Corp Semiconductor optical switch and its driving method

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