TW430956B - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
TW430956B
TW430956B TW088120401A TW88120401A TW430956B TW 430956 B TW430956 B TW 430956B TW 088120401 A TW088120401 A TW 088120401A TW 88120401 A TW88120401 A TW 88120401A TW 430956 B TW430956 B TW 430956B
Authority
TW
Taiwan
Prior art keywords
semiconductor device
mounting
manufacturing
configuring
providing
Prior art date
Application number
TW088120401A
Other languages
English (en)
Chinese (zh)
Inventor
Haruo Hyoudo
Takayuki Tani
Takao Shibuya
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Application granted granted Critical
Publication of TW430956B publication Critical patent/TW430956B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
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    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/321—Disposition
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    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/4805—Shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
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    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW088120401A 1998-11-27 1999-11-23 Method for manufacturing semiconductor device TW430956B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33783798A JP3877454B2 (ja) 1998-11-27 1998-11-27 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW430956B true TW430956B (en) 2001-04-21

Family

ID=18312449

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088120401A TW430956B (en) 1998-11-27 1999-11-23 Method for manufacturing semiconductor device

Country Status (5)

Country Link
US (3) US6197616B1 (ko)
EP (1) EP1005075A1 (ko)
JP (1) JP3877454B2 (ko)
KR (3) KR20000035739A (ko)
TW (1) TW430956B (ko)

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Publication number Priority date Publication date Assignee Title
EP2015359B1 (en) * 1997-05-09 2015-12-23 Citizen Holdings Co., Ltd. Process for manufacturing a semiconductor package and circuit board substrate
JP3819574B2 (ja) * 1997-12-25 2006-09-13 三洋電機株式会社 半導体装置の製造方法
JP4073098B2 (ja) * 1998-11-18 2008-04-09 三洋電機株式会社 半導体装置の製造方法
KR100379835B1 (ko) * 1998-12-31 2003-06-19 앰코 테크놀로지 코리아 주식회사 반도체패키지및그제조방법
US6350664B1 (en) 1999-09-02 2002-02-26 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of manufacturing the same
JP2001085361A (ja) * 1999-09-10 2001-03-30 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
US6875640B1 (en) * 2000-06-08 2005-04-05 Micron Technology, Inc. Stereolithographic methods for forming a protective layer on a semiconductor device substrate and substrates including protective layers so formed
JP2002026182A (ja) * 2000-07-07 2002-01-25 Sanyo Electric Co Ltd 半導体装置の製造方法
JP3738176B2 (ja) * 2000-08-03 2006-01-25 三洋電機株式会社 半導体装置の製造方法
US6856075B1 (en) * 2001-06-22 2005-02-15 Hutchinson Technology Incorporated Enhancements for adhesive attachment of piezoelectric motor elements to a disk drive suspension
US6470594B1 (en) * 2001-09-21 2002-10-29 Eastman Kodak Company Highly moisture-sensitive electronic device element and method for fabrication utilizing vent holes or gaps
DE102004046227B3 (de) * 2004-09-22 2006-04-20 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterbauteils mit Durchkontakten durch eine Kunststoffgehäusemasse und entsprechendes Halbleiterbauteil
TWI258889B (en) * 2005-05-27 2006-07-21 Mitac Int Corp Biaxial antenna structure of portable electronic device
US7910404B2 (en) * 2008-09-05 2011-03-22 Infineon Technologies Ag Method of manufacturing a stacked die module
CN103000768A (zh) * 2011-09-09 2013-03-27 展晶科技(深圳)有限公司 发光二极管封装结构的制造方法

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CA1183280A (en) * 1981-02-09 1985-02-26 Francis N. Sinnadurai Integrated circuit chip carrier
US5468999A (en) * 1994-05-26 1995-11-21 Motorola, Inc. Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding
JP3541491B2 (ja) * 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
US5741729A (en) * 1994-07-11 1998-04-21 Sun Microsystems, Inc. Ball grid array package for an integrated circuit
JPH0936151A (ja) * 1995-07-20 1997-02-07 Japan Aviation Electron Ind Ltd 小型樹脂モールド集積回路装置の製造方法およびこの方法により製造された集積回路装置
JPH09116273A (ja) * 1995-08-11 1997-05-02 Shinko Electric Ind Co Ltd 多層回路基板及びその製造方法

Also Published As

Publication number Publication date
US20020022302A1 (en) 2002-02-21
US20010003055A1 (en) 2001-06-07
US6511864B2 (en) 2003-01-28
US6309911B2 (en) 2001-10-30
US6197616B1 (en) 2001-03-06
KR20020030066A (ko) 2002-04-22
KR20020035056A (ko) 2002-05-09
EP1005075A1 (en) 2000-05-31
KR100348955B1 (ko) 2002-08-22
KR20000035739A (ko) 2000-06-26
JP2000164768A (ja) 2000-06-16
JP3877454B2 (ja) 2007-02-07

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