TW423101B - Method of producing bottle-shaped deep trench - Google Patents

Abstract

A method of producing a bottle-shaped deep trench is applicable on a semiconductor substrate, and comprises: performing a first etching stage, which uses a plasma gas composition of nitrogen fluoride, hydrogen bromide and a premixed helium/oxygen, at a specified pressure and a specified flowrate of the nitrogen fluoride, hydrogen bromide and premixed helium/oxygen, to etch a semiconductor substrate thereby forming a neck-portion profile; performing a second etching stage by increasing the flowrate of the nitrogen fluoride and the hydrogen bromide and adjusting the specified flow ratio between the hydrogen bromide and the premixed helium/oxygen to over about 4:1, to etch the semiconductor substrate below the neck-portion profile to form a bottom profile; and performing a third etching stage by increasing the flowrate of the hydrogen bromide and reducing the specified pressure, to etch the semiconductor substrate surround the bottom profile in order to form a bottle-shaped deep trench. Therefore, the depth and width of the bottle-shaped deep trench can be increased and the surface area of the bottle-shaped deep trench can be increased.

Description

4231 01, V. Description of the invention (1) The present invention relates to a method for manufacturing a deep groove, and more particularly to a method for manufacturing a bottle-shaped deep groove. In recent years, with the increase of the integration degree of integrated circuits, the design of semiconductor processes has also developed toward reducing the size of semiconductor elements to increase the density. Take the currently used dynamic random access memory (DRAM) as an example. The 64M DRAM manufacturing process has been switched from 0.35um to less than 0.3um, while 128M DRAM or 256M DRAM is moving towards 0.2um. Because Dianguyi is basically composed of the surfaces of two conductive layers (ie, electrode plates) separated by an insulating substance, and the ability of a capacitor to store charge is determined by three physical characteristics, namely (1) the thickness of the insulating substance; (2) Surface area of the electrode plate; and (3) electrical properties of the insulating substance. Among them, in order for the S memory circuit to contain a large number of memory cells, the substrate area of the memory cells must be continuously reduced to increase the density. At the same time, the electrode plate portion of the memory cell capacitor must still have sufficient surface area to store sufficient charge. Generally speaking, high-density memory systems have two different capacitor formation technologies, one of which is a three-dimensional stacked capacitor cell (STC), and the other is a trench capacitor. For example, a crown-shaped stacked capacitor structure uses a space above the access device in the silicon crystal to form a capacitor electrode plate, while a trench-type valley uses a deep trench in the active region of the substrate to form a capacitor. Storage area. The technology of the present invention is an extension of the trench capacitor technology. However, as the DRAM process continues to shrink, the diameter of deep trenches is large.

Page 4 V. Description of the invention (2) Smallness will also be limited. When the aspect ratio of the trench has exceeded 35: 1, 'deep trenches as capacitor storage areas will be limited. In addition,' The capacitance is directly proportional to the surface area of the capacitor electrode plate. The surface area of the electrode plate of the trench capacitor is the product of the depth of the trench and the circumferential area of the trench. The circumferential area of the trench is related to the aperture of the trench. In other words, when the process is When the technology is reduced from 0.2um to 0.18um, the aperture of the trench becomes smaller, which makes it difficult for the trench capacitor to obtain a sufficient surface area to maintain the capacitance at about 4 OpF. Furthermore, 'to form a deep trench with a smaller critical size, it is necessary to choose a high aspect ratio for etching. At the same time, the smaller the critical dimension of the trench, the more difficult it is to maintain the vertical profile of the trench. The more the system tends to narrow the bottom of the substrate, this is also a challenge facing the current etching technology. Taking the traditional manufacturing process as an example, a semiconducting material composed of other materials such as a dynamic random access pad stack layer (pad s-sequence deposition nitridation such as broken glass is used for deep bottom 10 and nitriding effect to expose part of the distribution and The exposed surface is exposed, and then it is set to form a deposit.

As shown in FIG. 1, firstly, the silicon substrate 10 is provided to manufacture a desired semiconductor-mounted memory, etc., and secondly, the semiconductor substrate 1 is a tack layer) 15, such as a chemical vapor phase silicon layer 12 on the semiconductor substrate 1. The surface and the sink layer 14 are on the surface of the rat fossil evening layer 12, and the hard mask of the stacked layer trench engraving step. In addition, a pad oxide layer is formed between the fragile layers 12 to reduce. Next, a surface of the semiconductor substrate is formed in the pad stacking layer 15. For example, a photoresist pattern 16 may be formed by a photolithography process such as light and shadow, and then a reactive ion rice engraving process or plasma 4231 01 is used. ) Etching process, etc., etch pad stack layers 15 to form a mask opening 20. Secondly, the trench etching step controlled by different etching parameters in several stages is continuously performed. For example, an anisotropic etching process is used. Here, the reactive ion etching process is used as an example. Among them, because the mask opening 20 may cause a part of the semiconductor silicon substrate to form a native oxide layer due to exposure to the external environment, it is necessary to first perform an etching step of the native oxide layer, for example, using bromination Hydrogen (HBr) and nitrogen fluoride (NF3) are the main plasma gas composition to etch through the possible primary oxide layer. Its shoe engraving parameters are as follows: pressure of 20 to 50mtorr, preferably 25mtorr; RF power of 500 to 900w, preferably 600w; magnetic field of 10 to 40 Gauss, preferably is Gauss; hydrogen bromide (HBr) and nitrogen fluoride (NF3) flow rate (seem) ratio is about 20: 5; etching time is about 20 to 40 seconds, preferably 25 seconds. Secondly, the "etching stage of neck pr0fiie of bottle groove" is performed, for example, using hydrogen bromide (HBr), nitrogen fluoride (liver 3) and pre-mixed helium / milk (He / 02) as the main The source of the polycondensing gas is etched to remove a part of the exposed semiconductor silicon substrate to form a neck profile 22 having a tapered top portion and a depth of about 1.2 um. The etching parameters are as follows: a pressure of 80 to 110 mtorr, preferably 100 mtorr; an RF power of 700 to 900 w 'preferably 800 w; a magnetic field of 80 to 110 gauss' (preferably 100) Gauss; hydrogen bromide (HBr), nitrogen fluoride (NF3) and helium / oxygen (He / 02) flow (seem) ratio is about 87:13:35; helium / oxygen (H e / 0 2) mixture The ratio is about 70%: 30%: the engraving time is about 90 to 11

V. Description of the invention (4) ---- seconds, preferably 9 5 seconds. Then 'see Figure 2' for the bottom profile etch step of the bottle trench, for example, continue to use brominated gas (HBr), gasified nitrogen (NF3), and pre-mixed helium / oxygen (He / 〇2) as the main source of electro-polymerization gas from the neck contour 22 to continue to remove the exposed part of the semiconductor stone Xi substrate to form a bottom contour 26 with a depth of about 6.3 um. The etching parameters are as follows: a pressure of 110 to 130 mtorr, preferably 125 mtorr; an RF power of 600 to 1000 w, preferably 100 000 w; a magnetic field of 40 to 60 gauss. It is preferably 50 Gauss; the flow (Sccm) ratio of hydrogen bromide (HBr), gasified nitrogen (NF3) and helium / oxygen (He / 02) is about 87: 13: 3 5; the etching time is about 4 50 to 500 seconds, preferably 485 seconds. The problem with the aforementioned conventional technology is that during the etching of the bottom profile of the bottle-shaped trench, since the etching process is limited by the surface diameter of the trench and the depth of the trench, only a tapered deep trench can be formed. , And can not form a deep trench that can increase the surface area of the capacitor storage area. In addition, a traditional bottle-shaped capacitor manufacturing process was proposed by T. Ozaki et al. (See 0.228 um Trench Cell Technologies with Bottle Shaped Capacitor for 1Gbit DRAMs, by T. Ozaki, et al, IEDM, 95, pp66 1 -664 , 1 995), wherein the manufacturing method of the bottle-shaped capacitor is as follows. First, a ring oxide layer with a thickness of about 80 nm is formed on the upper part of the trench, and then the capacitors such as the oxide mask and the primary oxide layer are removed. In the process 'at this time, the thickness of the ring-shaped oxide layer is also reduced to about 50 nm', and then a polycrystalline silicon layer is deposited and doped with phosphorus ions in the same environment.

M2 V. Description of the invention (5) Doping ions into the trench during the fire process can prevent phosphorus ions from being doped on the trench. Qiu Er 2 is an oxide-like layer, and ^ β is used for chemical dry etching. Zhao removes the polycrystalline dream layer, and at the same time exhausts each ring + 摅 *. The diameter of the trench below the m-deficient oxygen layer is also the result: the problem with the second pass technology is that the silicon substrate and doped ions ΓΓΓΠϊ are not better than other materials such as oxide layers, so the + conductor device Size shrinkage does not meet demand. In view of this, Yue Huijing has long considered that the purpose of the present invention is to solve the above-mentioned problems and to provide a method for manufacturing a bottle-shaped trough. A semiconductor substrate includes a first etching stage, which uses nitrogen fluoride and bromine. Hydrogen hydride and pre-mixed helium / oxygen are plasma gas compositions. The semiconductor substrate is etched at a predetermined pressure with a predetermined flow of one of nitrogen fluoride, hydrogen bromide, and pre-mixed helium / oxygen to form a neck. Profile; performing a second etching stage, which increases the predetermined flow rate of nitrogen fluoride and hydrogen bromide and adjusts the existing flow rate ratio of hydrogen bromide and pre-mixed helium / oxygen to about 4: 1 or more. The semiconductor substrate under the profile forms a bottom profile; and the third stage of the engraving process, which increases a predetermined flow of hydrogen bromide and reduces a predetermined pressure, etches the semiconductor substrate around the bottom profile to form a bottle-shaped deep trench. In this way, the depth and width of the bottle deep groove can be increased, and the surface area of the bottle deep groove can be increased accordingly. In order to make the above and other objects, features, and advantages of the present invention more comprehensible ', a preferred embodiment is exemplified below, and in conjunction with the accompanying drawings, a detailed description is as follows: Brief description of the drawings

4231 01 V. Description of the invention (6) " ~ Figures 1 to 2 are cross-sectional views of a semiconductor structure, which show an embodiment of a conventional manufacturing method of a bottle-shaped deep trench. 3 to 7 are cross-sectional views of a semiconductor structure, showing an embodiment of a method for manufacturing a bottle-shaped deep trench according to the present invention. [Symbol description] 10, 100 ~ substrate; 11, 110 ~ pad oxide layer; 12, 12 ~ pad nitrogen layer, 14, 140 ~ oxide layer, 15, ~ pad stack layer; 6, bo ~ light Barrier layer '20, 200 ~ mask openings; 22, 220 ~ neck outline; 240, 260 ~ bottom outline; 241, 26 side wall of bottom outline. Embodiment First, please refer to Figs. 3 to 7, which show a manufacturing process of an embodiment of the present invention. Figure 3 shows the initial steps of the invention. The substrate 100 is made of a semiconductor material, for example, it is made of silicon. For convenience of description, a silicon substrate is used as an example here. First, as shown in Figures 3 and 4, after providing a semiconductor substrate composed of scrap or other materials, a pad stack layer is formed on the semiconductor substrate 100. 150), for example, in a chemical vapor deposition process, a silicon nitride layer 120 is sequentially deposited on the surface of the semiconductor substrate 100, and an insulating layer such as a borosilicate glass layer 14 is deposited on the surface of the silicon nitride layer 120, and the pads are stacked. Layer 15 G is used here as a hard mask for the deep trench etch step. In addition, a pad oxide layer 110 may be formed between the semiconductor substrate 100 and the silicon nitride layer 120 to reduce stress and promote adhesion. Next, a mask opening 200 is formed in the pad stacking layer 150 to expose a part of the surface of the semiconductor substrate.

4231 01

歹 1 A photoresist pattern 160 can be formed on the surface of the 塾 stack layer 150 by photolithographic processes such as coating and exposure development of the photoresist material, and then the etching pad stack layer such as reactive ion etching process or plasma etching process can be used. 〗 5 〇 to form a curtain opening 2 0 0. Secondly, the trench etching step controlled by different etching parameters in several stages is performed continuously. For example, an anisotropic etching process is used. Here, a reactive ion etching process is used as an example. Among them, 'because the opening of the mask 200 may cause some semiconductor silicon substrates to form a native oxide layer (native 0xide 1 ayer) due to exposure to the external environment', so it can be performed first-the etching stage of the native oxide layer, such as Hydrogenated hydrogen (HBr) and nitrogen fluoride (NF3) are used as the main plasma gas composition to etch through the possible primary oxide layer. Its engraved parameters are as follows: a pressure of 20 to 50 mtorr, preferably 25 mtorr; an RF power of 500 to 900 w, preferably 600 w; a magnetic field of 10 to 40 gauss, preferably 15 gauss; hydrogen bromide (HBr) and nitrogen fluoride (NF3) flow rate (seem) ratio is about 20: 5; the remaining time is about 20 to 40 seconds, preferably 25 seconds. Secondly, please refer to FIG. 5 for the etching stage of the neck profile of the bottle groove, such as' Using hydrogen bromide (HBr), nitrogen fluoride (NF3) and pre-mixed helium Oxygen (He / 02) is the main plasma gas source to remove the exposed semiconductor silicon substrate by etching to form a neck wheel temple 220 with a tapered top portion and a depth of about 1.2 um. The remaining parameters are as follows: pressure from 80 to 110 mtorr, preferably 100 mtorr; RF power from 700 to 900 w, preferably 800 w; 80

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Magnetic field to 110 Gauss, preferably 100 Gauss; ratio of flow (sccm) of hydrogen bromide (HBr), nitrogen fluoride (NF3) and helium / oxygen (He / 02) is about 87:13:35 ; The mixing ratio of helium / oxygen (He / 02) is about 70%: 30%; the etching time is about 90 to 110 seconds, preferably 95 seconds. Then '凊 Refer to Figure 6' for the first button stage of the bottom profile (b 〇11 〇mpr 〇fi 1 e) of the bottle groove, for example, continue to use HBr (HBr), gasification nitrogen ( NF3) and pre-mixed helium / oxygen (jje / 〇2) are the main plasma gas sources to continue etching to remove the exposed semiconductor silicon substrate from the neck contour 220 to form a bottom contour 240. Among them, in order to enlarge the bottom profile 240 'the lateral etch capability of this etching stage must be increased'. Therefore, the main adjustments of its etching parameters include: (a) Increase the flow of nitrogen fluoride (NF3) to reduce the bottom profile 24. sidewall 241 The formation of polymer (polymer), increase the ability of lateral etching. (b) Increase the flow of hydrogen bromide (HBr) and increase the ability to etch laterally. (c) Increasing the flow ratio of hydrogen bromide (HBr) to helium / oxygen (He / 02) to 4: 1 or more or preferably 5: 1 or more 'increases the ability of lateral etching. In this embodiment, the preferred etching parameters after adjustment are as follows: a pressure of 110 to 130mtorr, preferably 100mtorr; an RF power of 600 to 1000w, preferably 1000w; a magnetic field of 55 to 75 Gauss, 65 Gauss is preferred; the flow (seem) ratio of hydrogen bromide (HBr), nitrogen fluoride (NF3), and helium / oxygen (He / 02) is changed to about 200: 20: 20, where nitrogen fluoride ( NF3), the flow of hydrogen bromide (HBr) increased to 20 and 200 sccm, the flow of helium / oxygen (He / 02) decreased to 20 sccra, and the flow of hydrogen bromide (HBr) and helium / oxygen (He / 02) The ratio is increased to 10: 1; the etching time is about 180 to 220

4231 01

The second 'is preferably 200 seconds. Next, please refer to FIG. 7 for the second etching stage of the bottom profile of the bottle groove, such as' continue the use of hydrogen bromide (HBr), nitrogen fluoride (NF3), and pre-mixed helium / oxygen (He / 〇2) is the main source of the electropolymerization gas, and the exposed part of the semiconductor silicon substrate is continuously etched from the bottom contour 240 to form a bottom contour 260. Among them, in order to increase the depth of the Bulun Temple 260 and the width of the side wall 261, it is necessary to further increase the vertical etch and horizontal money engraving capabilities at the same time. Therefore, the main adjustments of its # 刻 parameters include: : (A) Reduce the pressure and increase the ability of vertical etching. (b) Increasing the flow of hydrogen bromide (HBr) and increasing the capacity of the lateral remainder. In this embodiment, the preferred parameters for the remaining moment after adjustment are as follows: a pressure of 20 to 50 mto.rr, preferably 30 mtorr; an RF power of 600 to 1000 w, preferably 600 w; 55 to 75 Gauss The magnetic field (Gauss) is preferably 65 Gauss; the flow rate (seem) ratio of hydrogen bromide (HBr), nitrogen fluoride (NF3) and helium / oxygen (He / 02) is changed to about 15: 13: 20, Among them, the flow rate of nitrogen fluoride (NF3) is maintained at 13 sccm of the traditional process, the flow rate of bromine number (Η B r) is increased to 150 sccm, the flow rate of helium / oxygen (He / 〇2) is reduced to 20 sccm, and bromination The flow ratio of hydrogen (HBr) to helium / oxygen (He / 〇2) is increased to 10: 1; the etching time is about 270 to 320 seconds, preferably 300 seconds. In addition, after completing the bottle-shaped deep trench of the foregoing embodiment, it can still continue the subsequent traditional semiconductor manufacturing processes, such as the fabrication of semiconductor components. For example, the bottle-shaped deep trench can be used to form a capacitor storage of a trench capacitor structure. Area. And because the bottle-shaped deep grooves of this embodiment expand outward, the surrounding grooves

Page 124231 01 The area is increased by about 50%, so: the bottle-type trench manufacturing method of the bottle-type trench manufacturing method which also increases by about 50% or more can also meet the two generations of structures up to 0_13um can be applied to Under the dynamic random cell area, the applied materials and materials can be greatly increased, and the materials and spaces with appropriate characteristics are not limited to the embodiments. A person who is familiar with this technique has been disclosed in a preferred embodiment. Changes and retouching as defined by the scope of the patent application for effective use of the next generation of memory are not limited to the rule of formation as follows, do not depart from * Therefore, whichever is the fifth, the description of the invention (ίο) the base wall surface of the tank capacitor storage area The area required to form the trench due to the present invention, even to the capacitive junction of the present invention, while the limited memory of the present invention, the person described in the present invention, can be composed of the structure of the invention. Although the invention is to limit the invention, Within the scope of God and God, when protecting the scope, the space used by the capacitor structure behind the trench is replaced by the memory. Therefore, the capacity of a capacitor is a dram. Replaced by the example method, inch size. However, it does not use the essence of the invention

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Claims (1)

4231 CM μ, the patent application scope of the bottom 1 'bottle-shaped deep trench manufacturing method, suitable for a semiconductor substrate', which includes: pre-, (^) to perform a first etching stage, which uses nitrogen fluoride, hydrogen bromide The helium / oxygen of the gas phase η is a plasma gas composition. At a predetermined pressure and a predetermined flow rate of one of the pre-mixed helium / oxygen hydrogen and one of the pre-mixed helium / oxygen to form a The contour of the neck (the fixed line-the second stage of the engraving stage) which increases the gasification nitrogen and evolution hydrogen ratio cumulus * " IL 罝 and adjusts the predetermined flow rate of the hydrogen bromide and pre-mixed helium / oxygen to about Above 4: 1, describe the half of the neck contour-the bottom contour; and + the conductor base in the shape and (^ VI line-a third name carved stage 'which increases the predetermined flow of the desertified hydrogen formation One bottle-shaped deep groove. Substrate 2. The method as described in item 丨 of the patent application scope, wherein in the step 'the predetermined pressure is about 80 to 1101011: 001 ...! 3. The method according to item i, wherein, in step, :), the desert hydrogen, nitrogen fluoride, and pre-mixed helium have an existing value of about 87: 1 3: 35. 4. The method as described in item 丨 of the scope of patent application, wherein in step (b) 'the hydrogen bromide, nitrogen fluoride, and pre-mixed helium / oxygen predetermined flow ratio is about 200: 20: 20. 5. The method according to item 1 of the patent application scope, wherein in step (c), the predetermined pressure is about 20 to SOmtorr. 6. The method according to item 1 of the patent application scope, wherein step Page 14 4231 01 VI. Scope of patent application (C) 'The predetermined ratio of the hydrogen bromide, nitrogen fluoride, and pre-mixed helium / oxygen flow is about 1 50: 1 3: 20. 7. —A method for manufacturing a bottle-shaped deep trench, which is suitable for a semiconductor substrate, includes: (a) performing a first stage of etch, which uses nitrogen fluoride, hydrogen bromide, and pre-mixed helium / oxygen as Plasma gas composition, engraving the semiconductor substrate to form a neck profile under a pressure of 80 to 110 mtorr and a predetermined flow of nitrogen fluoride, thorium bromide, and pre-mixed helium / oxygen; (b) A second etching stage is performed, which increases the flow rate of the nitrogen fluoride and hydrogen bromide and adjusts the ratio of the hydrogen bromide to the pre-mixed helium / oxygen flow rate to about 4: 1 or more, and etches the semiconductor under the contour of the neck The substrate to form a bottom profile; and (c) performing a third etching stage that increases the flow of hydrogen bromide and reduces the pressure to 20 to 50 mtorr, etches the semiconductor substrate surrounding the bottom profile to form a bottle-shaped deep trench . 8. The method according to item 7 of the scope of patent application, wherein in step (a), the predetermined pressure is about 100 mTrr. 9. The method according to item & in the scope of the patent application, wherein in step (a), the predetermined ratio of the hydrogen bromide, nitrogen fluoride, and pre-coupled helium / oxygen is about 87: 1 3: 35. 10. The method according to item 9 of the scope of the patent application, wherein in step (b), the hydrogen bromide, nitrogen fluoride, and helium / gas flow ratio of pre-wave combining is about 200: 20: 20. 11. The method as described in claim 10, wherein Section 15 贳 4 2 31 0 I VI. Patent application scope (c), the pressure is about 30mtorr ° 1 2. The method according to item 11 of the patent application scope, wherein in step (c), the hydrogen bromide The ratio of the predetermined flow rate of helium, nitrogen fluoride, and pre-mixed helium / oxygen is about 150: 13: 20. Page 16