TW388085B - Method for improving the uniformity of threshold voltage - Google Patents

Description

V. Description of Invention () S-1 Field of Invention:

7 7 A B The present invention relates to a semiconductor device manufacturing process, and particularly to a method for increasing the silicon nitride removal rate to improve the uniformity of the starting voltage of the device. S-2 Background of the Invention: In modern semiconducting semiconductor processes, silicon nitride (Sl3N4) is a common dielectric material. Its main uses are two: one is as a cover layer for the silicon dioxide layer, and the other is As a protective layer for general components. First, at the initial stage of device fabrication, a silicon nitride layer is grown on the pad oxide layer by LPCVD. This nitride layer is transferred to the mask on the photomask through an appropriate emblem and etching process, and then a field oxide layer is produced. This silicon nitride layer is the cover layer of this oxidation process. Secondly, because silicon nitride has excellent anti-blocking ability for metal ions and is not easily penetrated by water and gas, it is widely used as a semi-conductive layer. The protective layer of the lead element. (Please read the nasal ballast X in the back of the French and Italian matters first.) ¾. Order the Central Bureau of the Ministry of Economic Affairs β; The capacitor dielectric of traditional DRAM printed by the Industrial and Commercial Cooperatives is silicon dioxide / silicon nitride / Silicon dioxide (0 / N / 0) or silicon nitride / silicon dioxide (N / 0) »Silicon nitride is a dielectric material with a high dielectric constant, so it is also used to make capacitors deposited on components and The interlayer dielectric material (ILD) covers the layers to form a dielectric layer between the polycrystalline silicon and the first metal layer, and is not partially removed until the contact window is etched. Traditionally, there are two deposition methods for the silicon nitride layer depending on their functions. -2-This paper size is applicable to the Central European Standard (CNS) Α4 size (210X297 mm).

-Description of the invention () For LPCVD and PECVD, the LPCVD method is used to deposit the capacitor. The nitrided dream layer deposited by LPCVD method is more uniform and dense, and the protective layer must be deposited using a lower temperature PECVD. When the silicon nitride capacitor is left on the chip t, the electric curtain is started by the gas vessel used in the last alloying process t. Generally, argon atoms are used to repair incomplete broken bonds to adjust the M0s. Voltage, but because the silicon nitride layer is too dense, leading to hydrogen penetration, the goal of adjusting the initial voltage can not be achieved, so the change of the voltage is very large, so that the uniformity of the initial voltage of the long-channel element is higher than it. In the components with larger surface precision, even if the melting time and temperature are prolonged, the uniformity of the long channel component cannot be completely improved. If the standard deviation is larger, the uniformity is worse, and the standard deviation is from 0 to 0.24. Although there is improvement, the degree of improvement is limited, the state and change cannot be achieved, and the son of the gas argon element cannot start the voltage difference. Especially increase the number of tables to change 0.35 Ideal state, please read the note I * 5 on the back first

Page Order Printed by the Central Laboratories of the Ministry of Economic Affairs

Table 1: Process results of different fusion conditions (VT average / standard deviation) Process conditions Element 450β〇 90 min 450. . 90 ~ min + 410eC 90 min 45 0eC 180 min 101 0-805 / 0.50 0.773 / 0.35 0.724 / 0.24 102 0.642 / 0.09 0.636 / 0.07 0.638 / 0.08 20 times of 102, the data in the table shows that prolonging the fusion time and temperature cannot completely improve the opening dimension of the long channel element. T SS to CNS > Α4 specification (210X29 ^^ "

V. Description of the invention () The uniformity of the starting voltage and the quasi-difference are still as high as 0.24, and the time for heating the raccoon should not be too long, and the temperature should not be too high. Otherwise, the electrical properties of the components may be changed. Method for uniformity of initial voltage · S-3 Invention purpose and description: The purpose of the present invention is to provide a method for improving the uniformity of the initial electrical calendar of a long-channel element, by increasing the removal rate of the silicon nitride layer in the element to Above 1.05%, good uniformity can be achieved. The method for improving the uniformity of the starting voltage provided by the present invention is printed by the male sample consumer cooperative of the Central Sample Bureau of the Ministry of Economic Affairs. The silicon helium layer formed in the process is removed, and the removal area is 1,05% relative to the entire wafer area The above can get good uniformity. The method to achieve a removal rate of 1.05% or more is as follows. First, the silicon nitride layer of the pad structure on the process control monitor (PCM) is removed. The nitride nitride layer on the scribe line area is also removed; secondly, the contact window etching when the device is making the contact window will increase the area of the contact window. The area where the silicon nitride layer is etched is also Increase the ratio of the absolute area of the nitrogen-siliconized layer removal to the total area of the chip, so as to improve the uniformity of the starting voltage to the ideal state β __ 4- This paper adopts Chinese National Standard (CNS) Α4 grid (210X297) Chu A7 B? 5. Description of the invention () S-4 country-style brief description: (1) Circle A shows a half-sided wafer. The surface map shows the steps for forming a capacitor dielectric layer. The first circle B shows half of the cross section of the wafer, which explains the steps for forming a contact window according to the present invention. The first C * period shows the cross-section of a half-conductor wafer. Illustrates the steps of the halide volume etching. The second circle A shows the view circle above the half-guide wafer. The second circle B shows the second semi-conductor. A cross-section view of the -3 tangent line illustrates the cutting line between the components. 5-5 Detailed description of the invention: The present invention provides a method for improving the uniformity of the starting voltage of the device, which is to improve the removal rate of the silicon nitride layer, for example, to increase the etching area of the contact window and remove the cutting lines between the components. The silicon nitride layer and the silicon nitride layer of the PCM pad structure can increase the removal rate of the silicon nitride layer. When the removal rate of the silicon nitride layer reaches more than 1.05%, the initial voltage of the device can obtain good uniformity. degree.

Please read first-memorandum, note

Order 〇 Central sample standard negative X Consumer η Social printing% Refer to Table 2, it is shown in the process that a silicon nitride layer deposition step to form a capacitor dielectric layer is omitted, so although the capacitor is not formed, the component can still be used. Formed according to the traditional manufacturing method, and then the initial voltage of each component is detected—--5 This paper size is applicable to China National Standard (CNS) Α4 specification (2 丨 0 X 297 mm) Industrial and consumer cooperatives print A7 __ — — — B7 V. Description of the invention () The result of uniformity. The area of the device 201 in Table 2 is 20 times the area of the device 202. According to the data in the table, the results of the non-deposited silicon nitride layer show that the area uniformity of the starting voltage of the device without the device has been improved, especially The standard deviation of large-area components has changed from 0.28 to 0.002, which has improved significantly. Therefore, it is assumed that the existence of the solidified silicon layer has a considerable influence on the initial voltage uniformity of the long-channel element. The present invention is directed to this point. Table 2 · Initial voltage measurement results of undeposited silicon nitride layer (VT average / standard deviation) Process conditions Element standard process Undeposited gasification Meng Guang 201 0.732 / 0.28 0.708 / 0.002 202 0.630 / 0.006 0.647 / 0.004 With reference to the first circle A ', a semiconductor substrate is first provided, on which a capacitor first polycrystalline layer 2 has been formed, and then a silicon oxide layer 4 and a silicon nitride layer 6 of a capacitor dielectric layer are successively formed, and then An inner dielectric material layer (ILD) 8 is covered on the silicon nitride layer 6 as an isolation layer for the device. Continuing the first circle B, a contact etching of a contact window 10 is performed. This contact etching etches the capacitive dielectric layer, thereby increasing the removal rate of the silicon nitride layer. Subsequently, an etching 12 is performed to make another storage electrode. As shown in the first circle C, a polycrystalline silicon layer of the capacitor second electrode is deposited thereon to form a capacitor structure of the device. -6-• · I m---I-ίία 装 ί (Please read the notes on the back before filling this page)

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This paper size is applicable to the Chinese National Kneading Rate (CNS) A4 specification (2 丨 0X297 mm) ——- J A7 B7 V. Description of the invention () Refer to Table 3, which is shown in the process of removing the PCM (process control) monitor) After the gasification on the pad structure, the results of measuring the initial electrical uniformity of each element are measured. "In the general component process, the silicon nitride layer on the PCM pad structure is removed and the contact window is etched at any time. At the same time, the silicon nitride layer deposited on the pad structure is etched away at the same time, so the removal rate of the vaporized silicon layer relative to the area of the entire wafer is also increased, and the initial voltage measurement is performed after the device is manufactured. * Table 3 The area of the middle element 301 is 20 times the area of the element 302. According to the data in the table, the result of removing the vaporized silicon on the PCM pad structure, regardless of the size of the element, the initial electrical uniformity is improved, especially the larger area. The standard deviation of components has been changed from 〇65 to 0_012, and the standard deviation of components with smaller area has also been changed from 016 to 009, which has been significantly improved. In addition, the product yield has also improved a lot 'from 81.95% to 91.23%. Therefore, the present invention provides a method for removing the gasification dream on the structure of the pCM pad, which can effectively improve the uniformity of the initial hail pressure of the component and the product yield. Table 3: Measurement results of the initial voltage of silicon nitride removal on the PC M pad structure (please read the precautions on the back before filling this page) Central Processing Bureau of the Ministry of Economic Affairs, Consumer Cooperative, Printing Conditions, Components, Standard Process, PC Removal ^ M | Silicon nitride 301 on the pad structure 0-746 / 0.065 U.67U / 0.012 302--r ----0601 / 0,016 0.570 / 0.009 LZ0 81.95% 91.23% Referring to the second circle A, a semiconductor chip is shown The upper circle of view indicates that the paper size is suitable. 8 8 家 揉 准 (CNS) Α 格 （2 丨 A7 Β7 V. Description of the invention） After the components on the wafer are completed, the cutting line between the components is used for 20 In order to separate the element area 22, in order to cut the wafer into operable element crystals. Second, referring to the second diagram B, showing the cross-sectional view of the semiconductor Λ wafer according to the 3-3 tangent in the second diagram A illustrates the element. The relative position of the area 22 and the cutting line area 20 is that the present invention simultaneously etches the silicon nitride layer of the cutting line in the process of etching the contact window to increase the removal area of the silicon argon layer to 105% or more and achieve a good start. Voltage Uniformity β Reference Table 4 'illustrates the invention Comparison of process results with traditional process results. The silicon nitride layer removal rate of traditional process results is only 0.7216%. * The uniformity of the initial ephemeris results is poor. In a preferred embodiment of the present invention, the PCM pad structure is removed. The results of the above silicon helium oxide show that the removal rate of silicon nitride eaves is 1.0584%. The initial voltage measurement results are good, and another preferred example is the removal of silicon nitride on the cutting line structure. The result also shows that it has a good uniformity of the starting voltage. I- I----I an---I In 11 n · n '· 0 (Please read the note on the back ^ Matters ## ^^ 萸> D printed by the Central Procurement Bureau, Ministry of Economic Affairs and Consumer Cooperatives. Table 4: Comparison of results of various processes of the present invention. Quasi-process removal of silicon nitride on PCM pad structure. Removal of siliconized silicon on cut line structure. Silicon nitride removal. The rate is 0.7216% 1.0584% 6.6532% The uniformity of the starting voltage is good and good. As described above, the method provided by the present invention for improving the uniformity of the starting voltage is to improve the removal rate of the silicon nitride layer, such as increasing the contact window.

This paper scale is applicable to China's national standard (CNS > Α4 specification (210 × 297mm) Λ7-一 -___ Β7 ___ V. Description of the invention () Any engraved area, except for the vaporized silicon layer and PCM pad on the cutting line The silicon nitride layer on the structure can increase the removal rate of the silicon nitride layer relative to the entire chip. When the removal rate of the silicon nitride eaves reaches more than 105%, the initial hail pressure of the device can be good. The invention is described above with a preferred embodiment, and is only used to help understand the implementation of the invention. It is not intended to limit the spirit of the invention. Those skilled in the art will appreciate the spirit of the invention after Without deviating from the spirit of the present invention, when some modifications and equivalent changes can be made, the scope of patent protection should be determined by the scope of the attached patent application and its equivalent fields. Printed a paper-standard quasi-standard for the home country and the country FT I public 97 2

Claims (1)

388085 D8, scope of patent application 1. A method for improving the uniformity of the starting voltage of a device, the steps of the method include at least: forming a dielectric layer including a silicon nitride layer on a semiconductor substrate; forming a photoresist ring On the dielectric layer, as a leather screen for a pad structure of an etching process control monitor (PCM); and perform an etching step to the surface of the substrate to remove the dielectric layer on the PCM pad structure . Method 1 of the above, in which the above-mentioned dielectric layer (please read the precautions on the reverse side before filling out this page), the Ministry of Economic Affairs, Central Bureau of Work, and Consumer Cooperatives printed the oxide / nitride / oxide three-layer film Formation ° 3. The method according to item 1 of the scope of the patent application, wherein the above-mentioned dielectric layer is formed of a nitride / halide bilayer film. 4. The method according to item 1 of the scope of patent application, wherein the above-mentioned dielectric layer is removed by the above-mentioned etching step to an area of the entire wafer. 5. —A method for improving the uniformity of the starting voltage of the device 'The steps of the method include at least: forming a first dielectric layer including a silicon nitride layer on a half conductive substrate; forming a second dielectric layer on The first interlayer layer is used as the inner layer dielectric material (ILD) of the element; ^ Paper Ruler National Standard (CNS) A4 specification (210x297 mm) j88085 VI. Patent application scope ABCD Forming a photoresist pattern on the second dielectric layer as a leather curtain for contact window etching; and performing an etching step to the surface of the substrate to form a contact window to improve the removal rate of the first dielectric layer. The method of the old item 5, wherein the above-mentioned first dielectric layer is formed of a three-layer thin film of a halide / nitride / halide. 7. The method of claim 5 in which the above-mentioned first dielectric layer is formed of a vaporized / oxide double-layered film. 8. · A method for improving the uniformity of the starting voltage of a device, the steps of the method include at least: forming a dielectric layer including a silicon nitride layer on a semi-conductive substrate; forming a photoresist ring on the dielectric layer As a mask for etching the cutting line; and performing an etching step to the surface of the substrate to remove the dielectric layer on the cutting line. Pin (please read the notes on the back first and then fill in the book) • ο Binding the male laborer ’s consumer cooperation with the Central Standards Bureau of the Ministry of Economic Affairs Du Yinfan's method in the 8th range, of which the three-layer thin flag of the dielectric layer oxide mentioned above Form β 10. The method according to item 8 of the scope of the patent application, wherein the above-mentioned dielectric layer is formed of a nitride / halide bilayer film. -11-This paper scale is applicable to China National Standard (CNS) A4 specification (210 X W7 mm) A8 B8 C8 D8 388085 Patent application scope 11. If the method of the eighth patent scope is applied, the above dielectric layer consists of The above etching step removes more than 1.05% of the total area of the entire wafer. 12. —A method for improving the uniformity of the starting voltage of the device. This method is to remove the silicon nitride layer covering the surface of the wafer, so that the removal rate (silicon nitride removal area / total area of the wafer) is more than 1.05%. When adjusting the starting voltage, it will facilitate the penetration of argon atoms. I--—II I ----= ------- '1 1. ^ 1 n •'., Next to Γ (please read the precautions on the back before filling in this page) Order the center of the Ministry of Economic Affairs Printed by the Bureau of Standards for the Industrial and Consumer Cooperatives -12- This paper size applies to China National Standard (CNS) A4 (210X297 mm)