TW384535B - Method of forming fuse in IC - Google Patents

Method of forming fuse in IC Download PDF

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Publication number
TW384535B
TW384535B TW87109524A TW87109524A TW384535B TW 384535 B TW384535 B TW 384535B TW 87109524 A TW87109524 A TW 87109524A TW 87109524 A TW87109524 A TW 87109524A TW 384535 B TW384535 B TW 384535B
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integrated circuit
layer
scope
patent application
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TW87109524A
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Chinese (zh)
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Guo-Chin Huang
Tze-Liang Ying
Yu-Hua Li
Ming-Shin Li
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Taiwan Semiconductor Mfg
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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

Method of forming fuse in IC includes as follows: a polysilicon layer, which has a section of short circuit area, covering a dielectric layer and then depositing a plurality of interlayer dielectric layers before depositing a protection layer to form a multi-layer structure, which includes a plurality of annular go-through plugs and a plurality of ring-type metal layers in interlayer dielectric layers, where the profile of the interlayer dielectric layer surrounds the protection circle and protrudes the rest; having 2 extended plugs at both ends of short circuit area in polysilicon layer, on which a connection layer is provided as fuse of the laser repair window, due to using tungsten as relevant materials for plus and fuse to avoid corrosion.

Description

經濟部中央標率局員工消費合作社印製 A7 B7 五、發明説明(I ) (―)發明技術領域: 本發明是有關一種積體電路之熔絲形成方法,尤指一 種藉由使用鎢(tungsten)作爲複數個環狀插塞、二延伸插塞 與一連接層之材質’以及該層間介電層之側面輪廓係以於 一保護環周圍較凸於該連接層之周圍者。 (二)發明技術背景: 一般而言,關於積體電路之記憶體元件的製造方法, 是於一晶圓上形成大量的記憶體位元,並將該記憶體位元 相連接起來,藉以形成記憶元陣列,做爲記憶體元件的儲 存裝置。然而,對於積體電路的製程步驟而言,係有數百 個流程步驟,在製作過程中難免會有因沉積、蝕刻等步驟 的不均勻,或是因化學物質所含有之些許雜質而產生缺陷 (Defect)之現象,造成產品的良率大幅下降。 於一積體電路(1C)中係由數百萬乃至數億個記憶單元所 構成者。就一個製作不良的積體電路而言,經常不是全部 的記憶單元都有缺陷,有時候是僅有少數幾個(甚至只有一 個)記憶單元出現缺陷。爲了有效提高產品的良率,進而減 低生產成本,在設計積體電路時,便設計若干額外的備用 位元,當所完成積體電路只有少數缺陷時,便可利用雷射 光切斷備用位元電路之熔絲(Fuse),使備用位元得以取代毀 損位元,該積體電路便可被修復而芷常運作,此即爲還原 (redundancy)之動作。另一方面,當製作積體電路的熔絲區 域時,需在熔絲區域之上方形成一窗口,以利奮射光入 射,然而水氣會從接觸窗進入熔絲區域’然後經由介電層 2 (請先閲讀背面之法意事項再填寫本頁) —^n—、 mfl .ml 、-'° 本紙張尺度適用中國國家標準(CNS ) A4规格(2丨〇'〆297公釐〉 經濟部中央標隼局員工消費合作杜印製 A7 B7 五、發明説明(y ) 而侵入積體電路,造成積體電路的污染與金屬線的嚴重腐 蝕,影響積體電路的正常操作。所以在積體電路之熔絲的 製作過程中,通常都在熔絲區域的周圍,製作保護環 (Protective Ring)的結構,隔絕積體電路與雷射修護窗,避 免水氣或污染物從介電層侵入積體電路。關於所述之整個 結構,則稱爲雷射修護窗。 煩請請參閱圖一,圖一係爲傳統包含熔絲之雷射修復 窗之結構剖面示意圖。該雷射修復窗包括一複晶矽層2在基 板1上,做爲熔絲;一介電層3/複數個金屬層間介電層4/保 護層5之複層結構,覆蓋在該複晶矽層2的表面;一保護 環’係包括有複數個貫通所述金屬層間介電層之環狀金屬 插塞7及複數個環狀金屬層6。用以保護熔絲不在雷射修復 之前便遭受破壞,在該熔絲上方則需保留一層厚度介於 2000埃至10000埃的氧化矽做爲保護罩(圖中未標示)。該保 護罩的厚度必須嚴格控制,如果太薄則無法達到保護熔絲 的功效;但若此保護罩太厚,則雷射光穿不透,無法進行 雷射修復。·‘ 此傳統結構係有下列二項嚴重的缺點: (1)此傳統結構係以複晶矽層做爲熔絲,該複晶矽之上 有一層介電層、數層金屬層間介電層、以及一層保 護層’所述各層皆是由氧化矽所形成,因此在該熔 絲之上有超過6微米厚的氧化砂層。當形成雷射修護 窗時,需要將此氧化矽層蝕刻到僅剩2000埃至10000 埃,触刻終止點僅能以餓刻時間加以控制。因蝕刻 一 —_ 3 本紙張尺度適i中國國家標準(CNS ) A4規格(210^297公釐〉" — (請先閲讀背面之注意事項再填寫本頁)Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A7 B7 V. Description of the Invention (I) (―) Technical Field of the Invention: The present invention relates to a fuse forming method for integrated circuits, especially a method using tungsten (tungsten) As a material of the plurality of ring-shaped plugs, two extension plugs and a connection layer, and the lateral profile of the interlayer dielectric layer, those surrounding the protection ring are more convex than those of the connection layer. (II) Technical Background of the Invention: Generally speaking, a method for manufacturing a memory element of an integrated circuit is to form a large number of memory bits on a wafer and connect the memory bits to form a memory element. Arrays are used as storage devices for memory elements. However, for the integrated circuit manufacturing process, there are hundreds of process steps. During the manufacturing process, it is inevitable that there will be defects due to unevenness in the steps such as deposition and etching, or defects caused by some impurities contained in chemical substances. (Defect) phenomenon, resulting in a significant decline in product yield. In an integrated circuit (1C), it is composed of millions or even hundreds of millions of memory cells. For a poorly fabricated integrated circuit, not all memory cells are often defective, and sometimes only a few (or even only one) memory cell is defective. In order to effectively improve the yield of the product and thus reduce the production cost, when designing the integrated circuit, a number of extra spare bits are designed. When the completed integrated circuit has only a few defects, the spare bits can be cut off by laser light. The fuse of the circuit allows the spare bit to replace the damaged bit, and the integrated circuit can be repaired and operated normally. This is the action of redundancy. On the other hand, when making the fuse area of the integrated circuit, a window needs to be formed above the fuse area to facilitate incident light, but water vapor will enter the fuse area from the contact window and then pass through the dielectric layer 2 (Please read the legal and legal matters on the back before filling this page) — ^ n—, mfl .ml,-'° This paper size is applicable to China National Standard (CNS) A4 specification (2 丨 〇297mm) Ministry of Economic Affairs The Central Bureau of Standards Bureau ’s consumer cooperation printed A7 B7. 5. Description of the invention (y) Invasion of the integrated circuit, resulting in pollution of the integrated circuit and severe corrosion of the metal wires, affecting the normal operation of the integrated circuit. During the production of circuit fuses, a protective ring structure is usually made around the fuse area to isolate the integrated circuit and the laser repair window to prevent water vapor or pollutants from entering the dielectric layer. Integrated circuit. The entire structure is called a laser repair window. Please refer to Figure 1. Figure 1 is a schematic cross-sectional view of the structure of a traditional laser repair window containing a fuse. The laser repair window includes A polycrystalline silicon layer 2 on the base 1 is used as a fuse; a multilayer structure of a dielectric layer 3 / a plurality of metal interlayer dielectric layers 4 / a protective layer 5 covers the surface of the polycrystalline silicon layer 2; a guard ring 'includes a plurality of A ring-shaped metal plug 7 and a plurality of ring-shaped metal layers 6 penetrating the metal interlayer dielectric layer are used to protect the fuse from being damaged before the laser is repaired, and a layer of a thick dielectric layer needs to be retained above the fuse. Silicon oxide between 2000 Angstroms and 10,000 Angstroms is used as a protective cover (not shown in the figure). The thickness of the protective cover must be strictly controlled. If it is too thin, the effect of protecting the fuse cannot be achieved; but if the protective cover is too thick, then Laser light is impenetrable and cannot be repaired by lasers. · 'This traditional structure has the following two serious disadvantages: (1) This traditional structure uses a polycrystalline silicon layer as a fuse, and the polycrystalline silicon has A dielectric layer, several metal interlayer dielectric layers, and a protective layer are each formed of silicon oxide, so there is a layer of sand oxide over 6 microns thick on the fuse. When a laser repair is formed When protecting windows, this silicon oxide layer needs to be etched to only 2000 angstroms to 1 0000 Angstroms, the end point of the engraving can only be controlled by the time of engraving. Because of etching one —_ 3 This paper is suitable for Chinese National Standard (CNS) A4 specifications (210 ^ 297 mm> " — (Please read the back first (Notes for filling in this page)

,1T A7 B7 經濟部中央標準局負工消費合作社印製 五、發明说明(3) 速率不易穩定地控制,因此常會使得熔絲上方氧化 矽保護罩的厚度太厚或太薄,即其厚度不好控制, 難以形成良好的雷射修護窗。 (2)此傳統結構的窗口極深,由金屬層所形成的保護環 並無法完全涵蓋保護住所述窗口,外界的水氣依然 可由保護環下方的介電層侵入積體電路,造成積體 電路的污染與金屬線腐蝕,影響積體電路的正常操 作。 針對上述之缺失,亦有人以上述之雷射修護窗結構爲 基礎而提出一種包括有一複晶矽層,其中之一區段爲斷路 區域,該斷路區域之兩端設置有二延伸金屬插塞,而該二 延伸金屬插塞係延伸於一金屬層間介電層上,且於該二延 伸金屬插塞之頂端係設置有一連接金屬層,係與保護環其 中之一環狀金屬層位於同一平面者,一做爲雷射修護窗的 纖。 對於此種雷射修護窗的熔絲結構方式而言,雖然已經 減低熔絲之窗□深度,然其主要缺點乃係由於仍使用複晶 矽作爲雷射修護窗的熔絲,是以同樣會有氧化矽之厚度難 以控制之缺失。另一方面,該技術中係以金屬之鋁銅(A1-Cu)作爲環狀插塞及延伸金屬插塞之材質;然而,該鋁銅金 屬於蝕刻窗口時會對該熔絲以及相關插塞有嚴重的侵蝕現 象發生’嚴重破壞雷射修護窗之功能’是以有待加以改 善。 (三)發明之簡要說明: 4 (請先閲讀背面之注意事項再填窝本f ) 訂 線ο· 本紙張尺度適用中國國家檩準(CNs ) A4規格(210X297公釐) 經濟部中央標隼局員工消費合作社印製 A7 B7_ 五、發明説明(^ ) 針對上述之缺失,本發明人乃根據實際雷射修護窗之 製成步驟經驗,提出一種可有效改善上述兩習用技術缺失 之本發明,即: 本發明之主要目的在於提供一種積體電路之熔絲形成 方法。 本發明之次要目的是提供一雷射修護窗內熔絲的結 構。 本發明之再一目的是提供一種雷射修護窗之保護環結 構,可以將雷射修護窗整個圍起來,有效防止水氣侵入積 體電路。 本發明之另一目的是能有效避免雷射修護窗之熔絲於 蝕刻時遭受侵蝕。 本發明之又一目的是能有效提高雷射光之吸收效率。 本發明之又一目的是使該熔絲於漲裂時不會產生濺射 之現象。 本發明之又一目的是於蝕刻窗口時,能有效控制氧化 層之厚度。·‘ 本發明之最後目的,則係能避免於較薄之氧化層時, 元件之基板被雷射修護所破壞。 . 爲了達成上述之目的,本發明藉由使用鎢(tungsten)作 爲相關插塞及連接層之材質。本發明所述雷射修護窗的結 構包括有一複晶矽層,該複晶矽層之其中一區段爲斷路區 域,之後於該複晶矽層及斷路區域上覆蓋有一介電層,於 5 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) — !!------------1Τ------$· (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標隼局J工消費合作社印製 A7 B7 五、發明説明(5 ) 該介電層上則覆蓋複數個層間介電層,最後再覆蓋一保護 層而形成複層之結構。 另外,包括有一保護環,其主要係由複數個貫通複數 層間介電層之環狀插塞及複數個環狀金屬層所組構而成, 其中該層間介電層之側面輪廓,即係以該保護環周圍較凸 於其他範圍之側觀形狀者;於該複晶矽層之斷路區域的兩 端上則設有二延伸插塞,其延伸於層間介電層中,且位於 該保護環內並與該保護環隔離;於該二延伸插塞之頂端則 設有一連接層,其係與另一層間介電層位於同一平面,且 其厚度與該層間介電層等高,以做爲雷射修護窗之熔絲。 如此而完成本發明所述之積體電路熔絲形成方法與結構。 是以,藉由上述之使用鎢作爲環狀插塞、延伸插塞與 連接層等之材料,係可有效避免習用技術中使用鋁銅金屬 作爲材質時,所產生之侵蝕現象,以及能有效控制氧化層 之厚度。另一方面,由於增厚該熔絲之厚度,係可有效減 少窗口蝕刻時之侵蝕問題;並且使用鎢作爲相關插塞與連 接層之材質,'可避免熔絲於漲裂時產生濺射之現象,以及 可提高雷射光之吸收率。 爲使貴審查委員對於本發明案之特徵、目的與功效 能有更進一步之瞭解與認識,茲配合圖式詳細說明如后: (四)圖式之簡要說明: 圖一係爲習用雷射修復窗之結構剖面示意圖。 圖二係爲本發明實施例中形成延伸插塞與第環狀插塞 所需窗口之剖面示意圖。 、 6 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) __________' i ' _^______丁______ (請先閱讀背面之注意事項再填寫本頁) A7 B7 五、發明説明(皂) 圖三係爲本發明實施例中形成第二層間介電層與第二環 狀金屬層之剖面示意圖。 圖四係爲本發明實施例中形成第二環狀插塞與一連接層 所需窗口之剖面示意圖。 圖五係爲本發明實施例中形成連接層、第三層間介電層 與第四環狀金屬層之剖面示意圖。 圖六係爲本發明實施例中形成第四層間介電層、保護層 與一窗口之剖面示意圖。 圖七係爲本發明實施例之頂視圖。 圖號說明: (請先閱讀背面之注意事項再填寫本1) 經濟部中央標準局員工消費合作社印裝 1基板 2複晶矽層 3介電層 4金屬層間介電層 5保護層 6環狀金屬層 7環狀金屬插塞 10基板 20複晶矽層 3〇介電層 40第一層間介電層 41第二層間介電層 42第三層間介電層 43第四層間介電層‘ 50第一環狀金屬層 51第二環狀金屬層 52第三環狀金屬層 53第四環狀金屬層 60保護層 70、71延伸插塞 80第一環狀插塞 81第二環狀插塞 82第三環狀插塞 90連接層 100 窗口 110保護環 120複層結構 7 訂 本纸張尺度適用中國國家楼準(CNS ) A4規格(210X297公釐) 經濟部中央標準局員工消費合作社印製 A7 __ B7__^_____ 五、發明説明(y ) (五)發明詳細說明: 本發明主要係爲一種積體電路之熔絲形成方法及結 構,其中不僅以二延伸插塞將一熔絲之位置升高(亦即減少 雷射修護窗之窗口深度),且將熔絲之厚度增加至與一層間 介電層之厚度相等,藉以避免熔絲於蝕刻窗口時被不當侵 蝕;另一方面,本發明使用鎢作爲本發明中所提出之相關 插塞與連接層之材質,藉由鎢之良好特性可避免習用技術 • ' ...... , 使用錫週金屬容易造成被蝕刻侵蝕之鑛朱;並且本發明所 提出之複數個層間介電層,其側觀輪廓形狀係以一保護環 周圍之厚度較凸於其他範圍者。 首先,煩請參閱圖二,圖二係爲本發明實施例中形成 延伸插塞與第一環狀插塞所需窗口之剖面示意圖。於圖二 形成之前,本發明係先於一基板ίο上沉積一具有斷路區域 之複晶矽層20,其爲積體電路之第一複晶矽,或亦可爲第 二複晶矽者,該複晶矽層20之厚度係介於1000埃至3000埃 之間;之後再沉積上一層介電層30,其係爲一氧化矽層, 而該介電層30之厚度係介於5000埃至13000埃之間者。之後 於該複晶矽層20之中央兩端形成二延長插塞70,該二延長 插塞70係以鎢(tungsten)作爲材質者,並與該介電層30同 高。再於該介電層30上形成第一環狀金屬層50,以作爲之 後複層結構之啓始,其材質係可以鋁銅金屬作爲材質者, 而其厚度係介於3000埃至6000埃之間。之後形成一第一層 間介電層40於該介電層30及第一環狀金屬層50上,該層間 介電層40係爲一氧化矽層者,且該層間介電層40之側觀輪 _8 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ~ 一 (請先閲讀背面之注意事項再填寫本頁) 訂Printed by 1T A7 B7 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the Invention (3) The rate is not easy to control stably, so the thickness of the silicon oxide protective cover above the fuse is often too thick or too thin, that is, its thickness is not Good control, it is difficult to form a good laser repair window. (2) The window of this traditional structure is extremely deep, and the protective ring formed by the metal layer cannot completely cover and protect the window. The external water and gas can still penetrate the integrated circuit through the dielectric layer below the protective ring, resulting in the integrated circuit. The pollution and metal wire corrosion affect the normal operation of the integrated circuit. In response to the above-mentioned shortcomings, there is also a proposal based on the laser repair window structure described above, which includes a polycrystalline silicon layer, one of which is a disconnection area, and two extended metal plugs are provided at both ends of the disconnection area. The two extended metal plugs extend on a metal interlayer dielectric layer, and a connecting metal layer is provided on the top of the two extended metal plugs, which is located on the same plane as one of the ring metal layers of the protection ring. One, as a fiber for laser repair window. For the fuse structure of this type of laser repair window, although the depth of the fuse window has been reduced, the main disadvantage is that polycrystalline silicon is still used as the fuse of the laser repair window. Similarly, the thickness of silicon oxide is difficult to control. On the other hand, in this technology, metal aluminum copper (A1-Cu) is used as the material of the ring plug and the extended metal plug; however, when the aluminum copper metal is etched on the window, the fuse and related plugs are used. There is a serious erosion phenomenon that "severely damages the function of the laser repair window" is to be improved. (3) Brief description of the invention: 4 (Please read the notes on the back before filling in the book f) Threading ο · This paper size applies to China National Standards (CNs) A4 (210X297 mm) Central Standard of the Ministry of Economic Affairs Printed by the Consumer Cooperative of the Bureau A7 B7_ 5. Description of the Invention (^) In view of the above-mentioned shortcomings, the present inventor proposes an invention that can effectively improve the lack of the above-mentioned two conventional technologies based on the actual manufacturing process experience of the laser repair window. That is, the main object of the present invention is to provide a fuse forming method of an integrated circuit. A secondary object of the present invention is to provide a structure for repairing a fuse in a laser protection window. Another object of the present invention is to provide a protective ring structure for a laser repair window, which can completely surround the laser repair window and effectively prevent water and gas from entering the integrated circuit. Another object of the present invention is to effectively prevent the fuse of the laser repair window from being eroded during etching. Another object of the present invention is to effectively improve the absorption efficiency of laser light. Another object of the present invention is to prevent the fuse from spattering when it is cracked. Another object of the present invention is to effectively control the thickness of the oxide layer when the window is etched. · ‘The final object of the present invention is to prevent the substrate of the component from being damaged by laser repair when the oxide layer is thinner. In order to achieve the above object, the present invention uses tungsten (tungsten) as the material of the related plug and connection layer. The structure of the laser repair window according to the present invention includes a polycrystalline silicon layer, and one of the sections of the polycrystalline silicon layer is a disconnection region, and then a dielectric layer is covered on the polycrystalline silicon layer and the disconnection region. 5 This paper size applies to China National Standard (CNS) A4 (210X297 mm) —! !! ------------ 1Τ ------ $ · (Please read the notes on the back before filling out this page) Printed by AJ B7, J Industrial Consumer Cooperative, Central Bureau of Standards, Ministry of Economic Affairs Description of the invention (5) The dielectric layer is covered with a plurality of interlayer dielectric layers, and finally a protective layer is covered to form a multi-layered structure. In addition, it includes a guard ring, which is mainly composed of a plurality of ring-shaped plugs penetrating through a plurality of interlayer dielectric layers and a plurality of ring-shaped metal layers. The side profile of the interlayer dielectric layer is formed by The side of the protection ring is more convex than the other side of the shape; two extension plugs are provided on both ends of the open circuit region of the polycrystalline silicon layer, which extend in the interlayer dielectric layer and are located in the protection ring Inside and isolated from the protection ring; a connecting layer is provided at the top of the two extension plugs, which is located on the same plane as the other interlayer dielectric layer, and its thickness is the same as that of the interlayer dielectric layer, as Laser fuse for fuse window. In this way, the integrated circuit fuse forming method and structure according to the present invention are completed. Therefore, by using tungsten as the material of the ring plug, the extension plug and the connection layer, it can effectively avoid the erosion phenomenon that occurs when using aluminum copper metal as the material in conventional technology, and can effectively control it. The thickness of the oxide layer. On the other hand, because the thickness of the fuse is thickened, it can effectively reduce the erosion problem during window etching; and the use of tungsten as the material of the related plug and connection layer can prevent the fuse from sputtering when it is cracked. Phenomenon, and can improve the absorption rate of laser light. In order for your reviewers to have a better understanding and understanding of the features, purposes and effects of the present invention, the detailed description is given below in conjunction with the drawings: (4) Brief description of the drawings: Figure 1 is a conventional laser repair Schematic sectional view of the window structure. FIG. 2 is a schematic cross-sectional view of a window required to form an extension plug and a ring-shaped plug in the embodiment of the present invention. 、 6 This paper size applies to Chinese National Standard (CNS) A4 specification (210X297 mm) __________ 'i' _ ^ ______ D______ (Please read the notes on the back before filling this page) A7 B7 V. Description of the invention ( (Soap) FIG. 3 is a schematic cross-sectional view of forming a second interlayer dielectric layer and a second annular metal layer in an embodiment of the present invention. FIG. 4 is a schematic cross-sectional view of a window required to form a second annular plug and a connection layer in the embodiment of the present invention. FIG. 5 is a schematic cross-sectional view of forming a connection layer, a third interlayer dielectric layer, and a fourth ring-shaped metal layer in the embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of forming a fourth interlayer dielectric layer, a protective layer, and a window in the embodiment of the present invention. FIG. 7 is a top view of an embodiment of the present invention. Description of drawing number: (Please read the notes on the back before filling in this 1) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 1 substrate 2 polycrystalline silicon layer 3 dielectric layer 4 metal interlayer dielectric layer 5 protective layer 6 ring Metal layer 7 annular metal plug 10 substrate 20 polycrystalline silicon layer 30 dielectric layer 40 first interlayer dielectric layer 41 second interlayer dielectric layer 42 third interlayer dielectric layer 43 fourth interlayer dielectric layer ' 50 First ring-shaped metal layer 51 Second ring-shaped metal layer 52 Third ring-shaped metal layer 53 Fourth ring-shaped metal layer 60 Protective layers 70, 71 Extension plugs 80 First ring-shaped plug 81 Second ring-shaped plug Plug 82 Third ring plug 90 Connection layer 100 Window 110 Protective ring 120 Multi-layer structure 7 The size of the paper is applicable to China National Building Standard (CNS) A4 (210X297 mm) Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs System A7 __ B7 __ ^ _____ 5. Description of the invention (y) (5) Detailed description of the invention: The present invention is mainly a fuse forming method and structure of an integrated circuit, which not only uses two extension plugs to position a fuse Raise (ie reduce the window depth of the laser repair window), and The thickness of the fuse is increased to be equal to the thickness of an interlayer dielectric layer, so as to prevent the fuse from being erroneously eroded during the etching window. On the other hand, the present invention uses tungsten as the related plug and connection layer proposed in the present invention. The material, with the good characteristics of tungsten, can avoid the conventional technology • '......, The use of tin metal can easily cause erosion and erosion; and the side view of the plurality of interlayer dielectric layers proposed by the present invention The outline shape is the one with a thickness around the protection ring that is more convex than other areas. First, please refer to FIG. 2. FIG. 2 is a schematic cross-sectional view of a window required to form the extension plug and the first annular plug in the embodiment of the present invention. Prior to the formation of FIG. 2, the present invention first deposits a polycrystalline silicon layer 20 with a cut-off region on a substrate, which is the first polycrystalline silicon of an integrated circuit or a second polycrystalline silicon. The thickness of the polycrystalline silicon layer 20 is between 1000 angstroms and 3000 angstroms; then a dielectric layer 30 is deposited, which is a silicon oxide layer, and the thickness of the dielectric layer 30 is between 5000 angstroms. To 13,000 angstroms. Then, two extension plugs 70 are formed at the central ends of the polycrystalline silicon layer 20, and the two extension plugs 70 are made of tungsten (tungsten) as the material and are the same height as the dielectric layer 30. A first ring-shaped metal layer 50 is formed on the dielectric layer 30 to start the subsequent multi-layer structure. The material can be aluminum copper metal, and the thickness is between 3000 Angstroms and 6000 Angstroms. between. Thereafter, a first interlayer dielectric layer 40 is formed on the dielectric layer 30 and the first ring-shaped metal layer 50. The interlayer dielectric layer 40 is a silicon oxide layer, and a side of the interlayer dielectric layer 40 is formed. View Wheel _8 This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) ~ 1 (Please read the precautions on the back before filling this page) Order

五、發明説明(y ) 廓係以靠近第一環狀金屬層50之厚度較中央部份爲凸出 者’其中央厚度係介於5〇〇〇埃至13〇〇〇埃之間,而較凸出部 份之厚度係介於5000埃至13000埃之間。之後於整個結構上 形成第二層間介電層41,此時並未將其側觀輪廓改變,而 是形成複數個窗口,即如圖二所示一般。而該複數個窗口 乃係用以形成較厚之延長插塞以及相關環狀插塞者,其進 一步相關技術描述,則煩請參閱圖三所示。 經濟部中央標隼局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 訂 煩請參閱圖三’圖三係爲本發明實施例中形成第二層 間介電層41與第二環狀金屬層51之剖面示意圖。在此圖三 所示結果之前’本發明經由前圖二所示而形成如圖三所示 之延長插塞71,該延長插塞71即與第一層間介電層4〇之中 央部份等高者;以及另外形成有第一環狀插塞80,該第一 環狀插塞80係以鎢作爲其材質者;之後於原第一層間介電 層40之上形成第二環狀金屬層51,其材質係可以鋁銅金屬 作爲材質者’最後再將該第二層間介電層41之側觀輪廓蝕 刻成在第二環狀金屬層51周圍處較凸於中央部份之形狀。 然而該第二層間介電層41所不同於第一層間介電層4〇者, 乃係該第二層間介電層41之整體厚度因該第一層間介電層 40之形狀而較爲平均,即如圖三所示之外觀形狀。另外, 該第二層間介電層41仍同樣係爲氧化矽層者。 煩請參閱圖四,圖四係爲本發明實施例中形成第二環 狀插塞與一連接層所需窗口之剖面示意圖。是於該圖三形 成第二層間介電層41後,再於整個結構上形成第三層間介 電層42 ’並加以蝕刻出複數個窗口,用以沉積形成之後所 9 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) A7 B7 經濟部中央樣率局員工消費合作社印製 五、發明説明(f ) 需之一連接層90與第二環狀插塞81者,其中該第二環狀插 塞81與連接層90係以鎢作爲材質,可避免蝕刻時被侵蝕之 缺失;此外,而該第三層間介電層42仍同樣係爲一氧化矽 層者。 煩請參閱圖五,圖五係爲本發明實施例中形成連接層 90、第三層間介電層42與第四環狀金屬層50之剖面示意 圖,其主要係針對該圖四所示之窗口而沉積形成一連接層 90與第二環狀插塞81,以及形成一第三環狀金屬層52 ’其 中該連接層90係作爲一雷射修護窗之熔絲者,其厚度係與 該第二層間介電層41之厚度相同,即該連接層90之厚度係 介於5000埃至13000埃之間,是以本發明所提出之熔絲厚度 係較厚於習用之熔絲厚度者,並且該連接層90是以鎢作爲 材質,其不僅可避免於窗口蝕刻時該連接層90之熔絲會被 侵蝕之缺失,並且有較好之雷射光之吸收率。之後將該第 三層間介電層42形成如第二層間介電層41之側觀輪廓形 狀;最後再以同樣之步驟方式而形成第三環狀插塞82,以 及形成第四環肤金屬層53,即如圚五所示之剖面形狀。其 中該第三環狀插塞82主要仍係以鎢作爲材質者。 煩請參閱圖六,圖六所示係爲本發明實施例中形成第 四層間介電層、保護層與一窗口之剖面示意圖。其中主要 係於該圖五所示之整體結構上形成一第四層間介電層43 者,並且於該第四層間介電層43上覆蓋一保護層60。其中 該第四層間介電層43則係以氧化矽(Si02)作爲材質者,其厚 度係介於1000埃至5000埃之間。關於該保護層60則係以氮 10 (讀先閱讀背面之注意事項再填寫本頁) -a5. Description of the invention (y) The profile is that the thickness near the first ring-shaped metal layer 50 is greater than the central portion. Its central thickness is between 5000 angstroms and 13,000 angstroms, and The thickness of the more protruding part is between 5000 angstroms and 13,000 angstroms. Thereafter, a second interlayer dielectric layer 41 is formed on the entire structure. At this time, the lateral profile is not changed, but a plurality of windows are formed, as shown in FIG. 2. The plurality of windows are used to form thicker extended plugs and related circular plugs. For further related technical descriptions, please refer to FIG. 3. Printed by the Employees' Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs (please read the notes on the back before filling this page). Please refer to Figure 3 for more details. A schematic cross-sectional view of the annular metal layer 51. Prior to the result shown in FIG. 3, the present invention forms the extension plug 71 shown in FIG. 3 through the previous FIG. 2. The extension plug 71 is the central part of the first interlayer dielectric layer 40. The same height; and a first ring-shaped plug 80 is additionally formed, the first ring-shaped plug 80 is made of tungsten as its material; and then a second ring is formed on the original first interlayer dielectric layer 40 The metal layer 51 can be made of aluminum copper metal as the material. Finally, the side profile of the second interlayer dielectric layer 41 is etched into a shape that is more convex at the center portion around the second annular metal layer 51. . However, the second interlayer dielectric layer 41 is different from the first interlayer dielectric layer 40 in that the overall thickness of the second interlayer dielectric layer 41 is smaller than that of the first interlayer dielectric layer 40. The average is the appearance shape shown in Figure 3. In addition, the second interlayer dielectric layer 41 is also a silicon oxide layer. Please refer to FIG. 4, which is a schematic cross-sectional view of a window required to form a second ring-shaped plug and a connection layer in the embodiment of the present invention. After the second interlayer dielectric layer 41 is formed in FIG. 3, a third interlayer dielectric layer 42 'is formed on the entire structure and a plurality of windows are etched to deposit the 9 paper sizes applicable after the formation. Standard (CNS) A4 specification (210X297mm) A7 B7 Printed by the Consumer Cooperatives of the Central Samples Bureau of the Ministry of Economic Affairs 5. Description of the invention (f) Those who need one of the connection layer 90 and the second ring plug 81, of which the first The two annular plugs 81 and the connection layer 90 are made of tungsten, which can avoid the loss of erosion during etching. In addition, the third interlayer dielectric layer 42 is also a silicon oxide layer. Please refer to FIG. 5, which is a schematic cross-sectional view of forming a connection layer 90, a third interlayer dielectric layer 42, and a fourth ring-shaped metal layer 50 in the embodiment of the present invention, which is mainly directed to the window shown in FIG. 4. A connection layer 90 is deposited to form a second ring-shaped plug 81, and a third ring-shaped metal layer 52 is formed. The connection layer 90 is used as a fuse for a laser repair window, and its thickness is similar to that of the first The thickness of the two interlayer dielectric layers 41 is the same, that is, the thickness of the connection layer 90 is between 5000 angstroms and 13,000 angstroms. The fuse thickness proposed by the present invention is thicker than the conventional fuse thickness, and The connection layer 90 is made of tungsten, which not only prevents the fuse of the connection layer 90 from being eroded when the window is etched, but also has a better absorption rate of laser light. Then, the third interlayer dielectric layer 42 is formed into a side profile shape like the second interlayer dielectric layer 41; finally, a third ring-shaped plug 82 is formed in the same manner, and a fourth ring-shaped skin metal layer is formed. 53, which is the cross-sectional shape shown in Figure 5. The third annular plug 82 is still mainly made of tungsten. Please refer to FIG. 6. FIG. 6 is a schematic cross-sectional view of forming a fourth interlayer dielectric layer, a protective layer, and a window in the embodiment of the present invention. Among them, a fourth interlayer dielectric layer 43 is formed on the overall structure shown in FIG. 5, and a protective layer 60 is covered on the fourth interlayer dielectric layer 43. The fourth interlayer dielectric layer 43 is made of silicon oxide (Si02), and its thickness is between 1000 angstroms and 5000 angstroms. About the protective layer 60 is nitrogen 10 (read the precautions on the back before filling this page) -a

TT

I 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明() 化矽(sy^4)作爲其材質者,其厚度係介於2000埃至10000埃 之間。之後於整個結構之中央部份蝕刻形成一窗口 100,該 窗口 100即係爲一雷射修護窗口 100,其深度係介於10000埃 至30000埃之間,即如圖六所示之側觀輪廓形狀,俾利於雷 射光之射入。藉由上述之熔絲形成方式與結構,則可以較 容易控制熔絲上方所另外設置之氧化層的厚度,並且於使 用較薄之氧化層時,元件修護所需之雷射光仍不會對基板 產生損害,即可有效改善習用技術之缺失。 另一方面,圖七所示係爲本發明圖七係爲本發明實施 例之頂視圖。其中主要係包括有兩組之複晶矽層20、連接 層90以及延伸插塞71者;另外,圖七中亦包括有複層結構 120與保護環110。其中該複層結構120中主要即係爲包括保 護層60 ’複數個層間介電層40、41、42、43,複數個環狀 插塞80、81、82以及複數個環狀金屬層50、51、52、53等 等之複層結構所組合而成者,亦即形成圖七所示之頂視 圖。 綜上所通,本發明所述之一種積體電路熔絲之製造方 法,其藉由使震羅使掃蹇材鴛,並且 使用較習用技術堤厦之燈絲,可有效改善習用技術中之使 用變金屬作爲相關插塞與熔絲時,該繼蹇惠證絲畫寮曼, 被餽刻之步驟所侵蝕;並且本發明所形成之結構,能夠有 效地控制雷射修護窗上之氧化層厚度,以及能,於使用較 薄之氧化層時,雷射之修護仍然不會破壞整體基板結構,。 .......... ..... .........; ............................... 充份顯示出本發明之目的及功效上均深富寳施之進步性’ — 11 (請先聞讀背面之注意事項再填寫本頁)I This paper size applies to Chinese National Standards (CNS) A4 specifications (210X297 mm) A7 B7 Printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs 5. Description of the invention () Siliconized silicon (sy ^ 4) as its material, its thickness The range is between 2000 Angstroms and 10,000 Angstroms. Then, a window 100 is etched in the central part of the entire structure. The window 100 is a laser repair window 100 with a depth between 10,000 Angstroms and 30,000 Angstroms, which is a side view as shown in FIG. The outline shape is conducive to the injection of laser light. With the above-mentioned fuse formation method and structure, it is easier to control the thickness of the additional oxide layer provided above the fuse, and when a thinner oxide layer is used, the laser light required for component repair is still not affected. Damage to the substrate can effectively improve the lack of conventional technology. On the other hand, Fig. 7 is a top view of an embodiment of the present invention. It mainly includes two groups of the polycrystalline silicon layer 20, the connection layer 90, and the extension plug 71. In addition, the multilayer structure 120 and the protection ring 110 are also included in FIG. The multilayer structure 120 mainly includes a protective layer 60 ′, a plurality of interlayer dielectric layers 40, 41, 42, 43 and a plurality of annular plugs 80, 81, 82, and a plurality of annular metal layers 50, The combination of 51, 52, 53 and so on the multi-layer structure forms the top view shown in Figure 7. To sum up, a method for manufacturing an integrated circuit fuse according to the present invention can effectively improve the use of conventional technology by using a vibrator to sweep the concrete and using a filament of a conventional technology bank. When the metal is used as the related plug and fuse, the follow-up card is eroded by the feeding step; and the structure formed by the present invention can effectively control the oxide layer on the laser repair window Thickness and energy, when using a thinner oxide layer, laser repair will still not damage the overall substrate structure. .......... ................; ... ... fully show the purpose and efficacy of the present invention are rich in the advancement of Bao Shi '— 11 (Please read the precautions on the back before filling this page)

本紙張尺度適用中國國家標準(CNS ) M規格(210X297公釐) 經濟部中央標率局員工消費合作社印黎 A7 B7______ 五、發明説明() 極具產業之利用價值’且爲目前市面上前所未見之新發 明,完全符合發明專利之要件’爰依法提出申請。 唯以上所述者,僅爲本發明之較佳實施例而已,當不 能以之限定本發明所實施之範圍。即大凡依本發明申請專 利範圍所作之均等變化與修飾’皆應仍屬於本發明專利涵 蓋之範圍內,謹請貴審查委員明鑑,並祈惠准,是所至 禱。 J,---* ^ '('' ~、·ιτI (請先閱讀背面之注意事項再填寫本頁) __ — _12 本紙張尺度適用中國國家檩準(CNS ) A4規格(210X297公釐)This paper size applies to Chinese National Standard (CNS) M specifications (210X297 mm) Employees 'Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs Consumer Cooperatives A7 B7______ 5. Description of the invention () Great industrial use value' and is currently the highest in the market Unseen new inventions are fully in line with the requirements of the invention patents. The above are only the preferred embodiments of the present invention, and it should not be used to limit the scope of implementation of the present invention. That is to say, all equal changes and modifications made according to the scope of the patent application of the present invention should still fall within the scope of the patent of the present invention. I would like to ask your reviewing committee to make a clear reference and pray for the best. J, --- * ^ '(' '~ 、 · ιτI (Please read the notes on the back before filling this page) __ — _12 This paper size is applicable to China National Standard (CNS) A4 (210X297 mm)

Claims (1)

A8 B8 C8 D8 申請專利範圍 L •〜種積體電路之溶絲形成方法,其步驟係包括有: (a) 於一基板上形成一複晶矽層,該複晶矽層中之—區段 爲斷路區域; (b) 於該複晶矽層及該斷路區域的表面上形成一介電層; (c) 於該複晶矽層之斷路區域的兩端延伸形成二延伸插 塞; (d) 於該介電層上形成一環狀金屬層; ⑹於該介電層及環狀金屬層上形成一層間介電層,該層 間介電層之側觀輪廓,是以靠近該環狀金屬層之厚度 較凸於中央部份; ®於該層間介電層中形成一環狀插塞,以及延長該二延 伸插塞之厚度; (g) 依序再形成另一環狀金屬層與另一層間介電層,該層 間介電層之側觀輪廓係以接近環狀金屬層部份者較凸 於中央部份; (h) 於該二延伸插塞之頂端形成一連接層; (0於步驟(g)所述之環狀金屬層上,形成另一環狀插塞; G)於該連接層、環狀插塞與層間介電層上,再依序形成 複數個環狀金屬層、複數個環狀插塞與複數個層間介 電層,最後形成一保護層,而形成一複層結構; (k)蝕刻形成一窗口。 13 (請先聞讀背面之注意事項再填寫本頁) 訂 舞. 經濟部中央標準局員工消費合作社印製 本紙張又度適用中國國家標準(CNS ) A4規格(210X297公釐) A8 B8 C8 D8 經济部中央標準局員工消費合作社印製 六、申請專利範圍 2.如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法’其中步驟(a)所述之複晶矽層係爲積體電路之第一複 晶矽者。 3如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法’其中步驟⑻所述之複晶矽層係爲積體電路之第二複 晶砂者。 4. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法,其中步驟(a)所述之複晶矽層,其厚度係介於1〇〇〇埃 至3000埃之間者。 5. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法’其中步驟(b)所述之介電層係爲一氧化矽層者。 6. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法,其中步驟(b)所述之介電層,其厚度係介於5000埃至 13000埃之間者。 7. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法,其中步驟(c)所述之二延伸插塞係亦以鎢作爲其材質 者。 ' ’ 8. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法,其中步驟⑹所述之二延伸插塞係與步驟⑼中所述之 介電層等高者。 9. 如申請專利範圍第1項所述之一種積體電路之熔絲形成方 法,其中步驟(d)所述之環狀金屬層係以鋁銅金屬作爲其 材質者。 .、 14 (請先聞讀背面之注意事項再填寫本頁y -'s Γ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) M濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 10·如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(d)所述之環狀金屬層,其厚度係介於 3000埃至6000埃之間者。 11 ·如申請專利範圍第1項所述之一種積體電路之溶絲形成 方法,其中步驟(Φ所述之環狀金屬層係爲第一環狀金屬 層者。 12. 如申請專利範圍第丨項所述之一種積體電路之熔絲形成 方法’其中步驟⑻所述之層間介電層係爲一氧化矽層 者。 13. 如申請專利範圍第】項所述之一種積體電路之熔絲形成 方法’其中步驟(e)所述之層間介電層,其較凸出部份之 厚度係介於5000埃至13000埃之間者。 14. 如申請專利範圍第〗項所述之一種積體電路之熔絲形成 方法’其中步驟⑹所述之層間介電層,其中央部份之厚 度係介於5000埃至13000埃之間者。 15. 如申請專利轉圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(e)所述之層間介電層係爲第一層間介電 層者。 16. 如申請專利範圍第丨項所述之一種積體電路之熔絲形成 方法’其中步驟(f)所述之環狀插塞係以鎢作爲其材質 ..者。 17·如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法’其中步驟(f)所述之環狀插塞係爲第一、環狀插塞 者。 15 不紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ^---Ί! - — II (請先閱讀背面之注意事項再填寫本頁) 言 經濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範園 18. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(f)所述之延長二延伸插塞,係將該二延 伸插塞延長至與步驟(e)所述層間介電層之中央部份等高 者。 19. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(g)所述之另一環狀金屬層係爲第二環狀 金屬層者。 20. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(g)所述之另一層間介電層係爲第二層間 介電層者。 21. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(h)所述之連接層係爲一雷射修護之熔絲 者。 22. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(h)所述之連接層係以鎢作爲其材質者。 23. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(h)所述之連接層厚度係與步驟(g)所述之 另一層間介電層之厚度相同者。 24. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟①所述之另一環狀插塞係爲第二環狀插 塞者。 25. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟①所述複層結構中之複數個層間介電層 之最上一層,係以氮化矽作爲其材質者。 _16_ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁) 訂 ΦΊ 經濟部中央標準局員工消費合作社印製 as Β8 C8 D8 六、申請專利範圍 26. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟①所述複層結構中之複數個層間介電層 之最上一層,其厚度係介於5000埃至13000埃之間者。 27. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟①所述複層結構中之複數個層間介電層 之最上一層,係爲第四層間介電層者。 28. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟G)所述複層結構中之保護層係以氧化矽 作爲其材質者。 29. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(])所述複層結構中之保護層,其厚度係 介於2000埃至10000埃之間者。 30. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(k)所述之窗口係爲一雷射修護窗口者。 31. 如申請專利範圍第1項所述之一種積體電路之熔絲形成 方法,其中步驟(k)所述之窗口,其深度係介於10000埃 t 至30000埃;έ:間者。 32. —種積體電路中關於熔絲之組成結構,主要係包括有: (a) —複晶矽層,係位於一基板上,且有一斷路區域; (b) —介電層,係覆蓋於該複晶矽層與該段路區域上; (c) 二延伸插塞,係位於該複晶矽層之斷路區域的兩端 上; (d) —環狀金屬層,係位於該介電層上; 、 17 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) ~ (請先閱讀背面之注意事項再填寫本頁) 、ST 0>. 經濟部中央標隼局員工消費合作社印製 Αδ Β8 C8 D8 六、申請專利範圍 (e)—層間介電層,係覆蓋於該介電層與該環狀金屬層 上,其側觀輪廓是以靠近該環狀金屬層之厚度較凸於 中央部份; ω—環狀插塞,係位於該層間介電層之中; (g) 另一環狀金屬層,係位於該層間介電層上; (h) 另一層間介電層,係覆蓋於該另一環狀金屬層與該層 間介電層上; (i) 一連接層,係位於該二延伸插塞之頂端; ω另一環狀插塞,係位於該另一環狀金屬層上; (k) 複數個環狀金屬層、複數個層間介電層以及複數個環 狀插塞,係依序連接堆疊於前述之結構上; (l) 一保護層,係覆蓋於最上一層之層間介電層上; (m) —窗口,係位於該連接層之上方。 33. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(a)項所述之複晶矽層係爲積體電路之 第一複晶矽者。 34. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(a)項所述之複晶矽層係爲積體電路之 第二複晶矽者。 35. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(a)項所述之複晶矽層,其厚度係介於 1〇〇〇埃至3000埃之間者。 18 (請先閱讀背面之注意事項再填寫本頁)A8 B8 C8 D8 Patent application scope L • ~ A method for forming a fused wire of an integrated circuit, the steps of which include: (a) forming a polycrystalline silicon layer on a substrate, and a section of the polycrystalline silicon layer Is a disconnection region; (b) a dielectric layer is formed on the polycrystalline silicon layer and the surface of the disconnected region; (c) two extension plugs are formed at both ends of the polycrystalline silicon layer's disconnected region; (d) ) Forming a ring metal layer on the dielectric layer; 形成 forming an interlayer dielectric layer on the dielectric layer and the ring metal layer, the lateral profile of the interlayer dielectric layer is close to the ring metal The thickness of the layer is more convex than the central portion; ® forms a ring-shaped plug in the interlayer dielectric layer, and extends the thickness of the two extended plugs; (g) sequentially forms another ring-shaped metal layer and another An interlayer dielectric layer, the lateral profile of the interlayer dielectric layer is more convex to the central part than the annular metal layer part; (h) a connecting layer is formed on the top of the two extension plugs; (0) Forming another annular plug on the annular metal layer described in step (g); G) on the connecting layer and the annular plug On the interlayer dielectric layer, a plurality of annular metal layers, a plurality of annular plugs and a plurality of interlayer dielectric layers are sequentially formed, and finally a protective layer is formed to form a multi-layer structure; (k) etching forms a window. 13 (Please read the notes on the back before filling out this page) Ordering. The paper printed by the Consumer Cooperatives of the Central Standards Bureau of the Ministry of Economic Affairs is again applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) A8 B8 C8 D8 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 6. The scope of patent application 2. A method for forming a fuse of an integrated circuit as described in item 1 of the scope of patent application, wherein the polycrystalline silicon layer described in step (a) It is the first polycrystalline silicon of integrated circuit. 3 A fuse forming method for an integrated circuit as described in item 1 of the scope of the patent application, wherein the polycrystalline silicon layer described in step 系 is the second compound sand of the integrated circuit. 4. A fuse forming method for an integrated circuit according to item 1 of the scope of patent application, wherein the thickness of the polycrystalline silicon layer described in step (a) is between 1000 angstroms and 3000 angstroms. By. 5. A fuse forming method for an integrated circuit according to item 1 of the scope of the patent application, wherein the dielectric layer described in step (b) is a silicon oxide layer. 6. A fuse forming method for an integrated circuit according to item 1 of the scope of the patent application, wherein the thickness of the dielectric layer in step (b) is between 5000 angstroms and 13,000 angstroms. 7. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the extension plug described in step (c) also uses tungsten as its material. '”8. A fuse forming method for an integrated circuit as described in item 1 of the scope of the patent application, wherein the extension plug described in step (2) is the height of the dielectric layer described in step (2). 9. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the ring-shaped metal layer described in step (d) is made of aluminum-copper metal as its material. ., 14 (Please read the notes on the back before filling in this page y -'s Γ This paper size is applicable to China National Standard (CNS) A4 specification (210X297 mm) M Printed by the Consumer Standards Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs) B8 C8 D8 VI. Application scope 10 · A fuse forming method for an integrated circuit as described in item 1 of the application scope, wherein the thickness of the annular metal layer in step (d) is between 3000 Angstroms To 6000 angstroms. 11 · A method for forming a molten wire of an integrated circuit according to item 1 of the scope of patent application, wherein the ring metal layer in step (Φ) is a first ring metal layer. 12. A fuse forming method for an integrated circuit as described in item 丨 of the scope of the patent application, wherein the interlayer dielectric layer described in step 系 is a silicon oxide layer. A fuse forming method of an integrated circuit described above, wherein the thickness of the inter-layer dielectric layer described in step (e) is between 5,000 angstroms and 13,000 angstroms. 14. If a patent is applied for Fusion of an integrated circuit described in item The method of forming a wire, wherein the interlayer dielectric layer described in step , has a thickness in the central portion between 5000 angstroms and 13,000 angstroms. A fuse forming method, wherein the interlayer dielectric layer described in step (e) is a first interlayer dielectric layer. 16. A fuse forming method for an integrated circuit as described in item 丨 of the patent application scope 'Where the ring-shaped plug described in step (f) is made of tungsten as its material .. 17. A method for forming a fuse of an integrated circuit as described in item 1 of the scope of patent application' wherein step (f) The ring-shaped plug is the first and the ring-shaped plug. 15 No paper size applies the Chinese National Standard (CNS) A4 (210X297 mm) ^ --- Ί!--II (Please read the back first (Please note this page, please fill in this page again.) Statement printed by A8 B8 C8 D8 of the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 6. Application for Patent Fanyuan 18. A fuse formation method for integrated circuits as described in item 1 of the scope of patent application , Wherein the extension two extension plugs described in step (f) extend the two extension plugs The plug is extended to a height equal to the central portion of the interlayer dielectric layer described in step (e). 19. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein step (g) The other ring-shaped metal layer is a second ring-shaped metal layer. 20. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the step (g) The interlayer dielectric layer is the second interlayer dielectric layer. 21. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the connection layer described in step (h) is a Laser fuse fuser. 22. A fuse forming method for an integrated circuit according to item 1 of the scope of the patent application, wherein the connection layer described in step (h) is made of tungsten as its material. 23. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the thickness of the connection layer described in step (h) is the thickness of the other interlayer dielectric layer described in step (g) The same. 24. The fuse forming method for an integrated circuit according to item 1 of the scope of the patent application, wherein the other ring plug described in step ① is a second ring plug. 25. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the uppermost layer of the plurality of interlayer dielectric layers in the multilayer structure described in step ① is made of silicon nitride as its material By. _16_ This paper size applies to Chinese National Standard (CNS) A4 (210X297 mm) (Please read the notes on the back before filling out this page) Order Ί 印 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs as Β8 C8 D8 VI. Application Patent scope 26. The fuse forming method of an integrated circuit as described in item 1 of the scope of patent application, wherein the top layer of the plurality of interlayer dielectric layers in the multi-layer structure in step ① has a thickness of 5000 Between Angstrom and 13,000 Angstroms. 27. The fuse forming method for an integrated circuit as described in item 1 of the scope of the patent application, wherein the uppermost layer of the plurality of interlayer dielectric layers in the multilayer structure described in step ① is a fourth interlayer dielectric layer By. 28. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the protective layer in the multi-layer structure in step G) is made of silicon oxide as its material. 29. A fuse forming method for an integrated circuit as described in item 1 of the scope of patent application, wherein the thickness of the protective layer in the multilayer structure described in step ()) is between 2000 Angstroms and 10,000 Angstroms . 30. A fuse forming method for an integrated circuit as described in item 1 of the patent application scope, wherein the window described in step (k) is a laser repair window. 31. The fuse forming method for an integrated circuit according to item 1 of the scope of the patent application, wherein the depth of the window in step (k) is between 10,000 angstroms and 30,000 angstroms; 32. —The composition structure of the fuse in the integrated circuit mainly includes: (a) — a polycrystalline silicon layer, which is located on a substrate and has an open area; (b) — a dielectric layer, which covers On the polycrystalline silicon layer and the section of the road; (c) two extension plugs located on both ends of the disconnected region of the polycrystalline silicon layer; (d) a ring-shaped metal layer located on the dielectric 17 layers of paper; Chinese paper standard (CNS) A4 size (210X297 mm) ~ (Please read the precautions on the back before filling this page), ST 0 >. Staff Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs Printed Αδ Β8 C8 D8 6. Scope of patent application (e) —Interlayer dielectric layer covers the dielectric layer and the annular metal layer, and its side profile is compared with the thickness near the annular metal layer. Convex in the central part; ω-ring plug, located in the interlayer dielectric layer; (g) another ring metal layer, located on the interlayer dielectric layer; (h) another interlayer dielectric layer Layer, which covers the other annular metal layer and the interlayer dielectric layer; (i) a connection layer, which is positioned The top of the two extended plugs; ω another ring-shaped plug, located on the other ring-shaped metal layer; (k) a plurality of ring-shaped metal layers, a plurality of interlayer dielectric layers, and a plurality of ring-shaped plugs , Is connected and stacked in sequence on the aforementioned structure; (l) a protective layer is covered on the interlayer dielectric layer of the uppermost layer; (m) — a window is located above the connection layer. 33. The fuse structure of the integrated circuit according to item 32 of the scope of the patent application, wherein the polycrystalline silicon layer described in (a) is the first polycrystalline silicon of the integrated circuit. 34. The fuse structure of the integrated circuit as described in item 32 of the scope of the patent application, wherein the polycrystalline silicon layer described in (a) is the second polycrystalline silicon of the integrated circuit. 35. The composition of a fuse in an integrated circuit as described in item 32 of the scope of patent application, wherein the polycrystalline silicon layer described in item (a) has a thickness between 1000 angstroms and 3000 angstroms Between those. 18 (Please read the notes on the back before filling this page) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X;297公釐) A8 B8 C8 D8 率 /¾ 員 工 消 費 製 申請專利範圍 36. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(b)項所述之介電層係爲一氧化矽層 者。 37. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(b)項所述之介電層,其厚度係介於 5000埃至13000埃之間者。 38. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構’其中(c)項所述之二延伸插塞係亦以鎢作爲 其材質者。 39. 如申請專利範圍第32項所述之一種積體電路中關於溶絲 之組成結構’其中(d)項所述之環狀金屬層係以鋁銅金屬 作爲其材質者。 40. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構’其中(d)項所述之環狀金屬層,其厚度係介 於3000埃至6000埃之間者。 41. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構’其中(d)項述之環狀金屬層係爲第一環狀 金屬層者。 42_如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構’其中(e)項所述之層間介電層係爲一氧化砂 層者。 43.如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(e)項所述之層間介電層,其較凸出部 份之厚度係介於5000埃至13000埃之間者。 (請先聞讀背面之注意事項再填寫本頁)This paper size applies to China National Standard (CNS) A4 specifications (210X; 297 mm) A8 B8 C8 D8 rate / ¾ Employee patent application scope of patent 36. As described in the integrated circuit described in item 32 of the patent scope The composition structure of the fuse, wherein the dielectric layer described in (b) is a silicon oxide layer. 37. The fuse structure of the integrated circuit according to item 32 of the scope of the patent application, wherein the dielectric layer described in item (b) has a thickness between 5000 angstroms and 13,000 angstroms. 38. As described in item 32 of the scope of the patent application, the fuse structure and structure of the integrated circuit, where the extension plug described in item (c) is also made of tungsten. 39. As described in item 32 of the scope of the patent application, for the structure of the dissolving silk in the integrated circuit, the ring metal layer described in item (d) above is made of aluminum copper metal. 40. The fuse structure of the integrated circuit described in item 32 of the scope of the patent application, wherein the annular metal layer described in item (d) above has a thickness between 3000 angstroms and 6000 angstroms . 41. As described in item 32 of the scope of the patent application, for a fuse structure in a integrated circuit, wherein the ring metal layer described in item (d) is the first ring metal layer. 42_ A fuse structure in a integrated circuit according to item 32 of the scope of the patent application, wherein the interlayer dielectric layer described in item (e) is an oxide sand layer. 43. The composition of a fuse in an integrated circuit as described in item 32 of the scope of the patent application, wherein the thickness of the protruding portion of the interlayer dielectric layer described in item (e) is between 5000 Angstroms To 13,000 angstroms. (Please read the notes on the back before filling this page) 經濟部中央標準局員工消費合作社印製 A8 B8 C8 D8 六、申請專利範圍 44. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(e)項所述之層間介電層,其中央部份 之厚度係介於5000埃至13000埃之間者。 45. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(e)項所述之層間介電層係爲第一層間 介電層者。 46. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(f)項所述之環狀插塞係以鎢作爲其材 質者。 47. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(f)項所述之環狀插塞係爲第一環狀插 塞者。 48. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(g)項所述之另一環狀金屬層係爲第二 環狀金屬層者。 49_如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中〇1)項所述之另一層間介電層係爲第二 層間介電層者。 50. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中⑴項所述之連接層係爲一雷射修護之 熔絲者。 51. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中⑴項所述之連接層係以鎢作爲其材質 者。 _20_^_ 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) : ~ (請先閱讀背面之注意事項再填寫本頁) 訂 -— 經濟部中央標準局舅工消費合作社印製 Αδ Β8 C8 D8 六、申請專利範圍 52. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中⑴項所述之連接層厚度係與(g)項所述 之另一層間介電層之厚度相同者。 53. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中①項所述之另一環狀插塞係爲第二環 狀插塞者。 54. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(k)項所述複層結構中之複數個層間介 電層之最上一層,係以氮化矽作爲其材質者。 55. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(k)項所述複層結構中之複數個層間介 電層之最上一層,其厚度係介於5000埃至13000埃之間 者。 56. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(k)項所述複層結構中之複數個層間介 電層之最上一層,係爲第四層間介電層者。 57. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(1)項所述複層結構中之保護層係以旋 塗式玻璃作爲其材質者。 58. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(1)項所述複層結構中之保護層,其厚 度係介於2000埃至10000埃之間者。 (請先閱讀背面之注意事項再填寫本頁) 訂 21 本纸張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) 384S85 8 8 8 8 ABCD 六、申請專利範圍 59. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(m)項所述之窗口係爲一雷射修護窗口 者。 60. 如申請專利範圍第32項所述之一種積體電路中關於熔絲 之組成結構,其中(m)項所述之窗口,其深度係介於 10000埃至30000埃之間者。 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央操隼局員工消費合作社印製 22 本紙張尺度適用中國國家標準(CNS ) Μ規格(210X297公釐)Printed by the Consumer Standards Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs A8 B8 C8 D8 6. Scope of patent application 44. The composition of the fuse in an integrated circuit described in item 32 of the scope of patent application, as described in (e) The thickness of the interlayer dielectric layer is between 5,000 angstroms and 13,000 angstroms. 45. The composition of a fuse in an integrated circuit as described in item 32 of the scope of the patent application, wherein the interlayer dielectric layer described in (e) is a first interlayer dielectric layer. 46. The composition of a fuse in an integrated circuit as described in item 32 of the scope of the patent application, wherein the annular plug described in item (f) uses tungsten as its material. 47. The fuse structure of the integrated circuit according to item 32 of the scope of the patent application, wherein the ring plug described in item (f) is the first ring plug. 48. The composition of the fuse in an integrated circuit described in item 32 of the scope of the patent application, wherein the other annular metal layer described in item (g) is a second annular metal layer. 49_ According to the composition structure of fuses in an integrated circuit described in item 32 of the scope of patent application, wherein the other interlayer dielectric layer described in item 0) is a second interlayer dielectric layer. 50. The fuse structure of an integrated circuit as described in item 32 of the scope of the patent application, wherein the connection layer described in item (2) is a laser repaired fuse. 51. The composition of a fuse in an integrated circuit as described in item 32 of the scope of the patent application, wherein the connection layer described in item 以 is made of tungsten as its material. _20 _ ^ _ This paper size applies Chinese National Standard (CNS) A4 specification (210X297mm): ~ (Please read the precautions on the back before filling this page) Order --- Printed by the Central Standards Bureau of the Ministry of Economic Affairs, Printed Consumer Cooperatives Αδ Β8 C8 D8 6. Scope of patent application 52. The composition of the fuse in an integrated circuit described in item 32 of the scope of patent application, wherein the thickness of the connection layer described in item 系 is the same as that described in (g) The other interlayer dielectric layer has the same thickness. 53. According to the composition structure of the fuse in an integrated circuit described in item 32 of the scope of the patent application, the other ring plug described in item ① is a second ring plug. 54. According to the composition structure of a fuse in an integrated circuit described in item 32 of the scope of the patent application, the top layer of the plurality of interlayer dielectric layers in the multilayer structure described in item (k) is nitrided. Silicon as its material. 55. According to the composition structure of fuses in an integrated circuit described in item 32 of the scope of application for patents, wherein the top layer of the plurality of interlayer dielectric layers in the multilayer structure described in item (k) is the thickness of the dielectric layer Between 5000 angstroms and 13,000 angstroms. 56. According to the composition structure of fuses in an integrated circuit described in item 32 of the scope of application for patents, wherein the uppermost layer of the plurality of interlayer dielectric layers in the multilayer structure described in item (k) is the fourth Interlayer dielectric layer. 57. The composition of the fuse in an integrated circuit as described in item 32 of the scope of the patent application, wherein the protective layer in the multilayer structure described in item (1) is made of spin-on glass as its material. 58. The fuse composition structure of an integrated circuit as described in item 32 of the scope of the patent application, wherein the thickness of the protective layer in the multilayer structure described in item (1) is between 2000 Angstroms and 10,000 Angstroms. Between. (Please read the precautions on the back before filling this page) Order 21 This paper size is applicable to Chinese National Standard (CNS) Α4 size (210X297 mm) 384S85 8 8 8 8 ABCD VI. Patent Application Scope 59. Such as patent application scope The fuse structure in the integrated circuit according to item 32, wherein the window described in (m) is a laser repair window. 60. The composition of the fuse in an integrated circuit described in item 32 of the scope of the patent application, wherein the depth of the window described in (m) is between 10,000 Angstroms and 30,000 Angstroms. (Please read the precautions on the back before filling out this page) Printed by the Consumer Cooperatives of the Central Operating Bureau of the Ministry of Economic Affairs 22 This paper size is applicable to the Chinese National Standard (CNS) M specifications (210X297 mm)
TW87109524A 1998-06-16 1998-06-16 Method of forming fuse in IC TW384535B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022077963A1 (en) * 2020-10-12 2022-04-21 长鑫存储技术有限公司 Fuse structure and forming method therefor
CN116454053A (en) * 2023-06-16 2023-07-18 西安紫光国芯半导体股份有限公司 Functional chip, wafer, module equipment and testing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022077963A1 (en) * 2020-10-12 2022-04-21 长鑫存储技术有限公司 Fuse structure and forming method therefor
CN116454053A (en) * 2023-06-16 2023-07-18 西安紫光国芯半导体股份有限公司 Functional chip, wafer, module equipment and testing method
CN116454053B (en) * 2023-06-16 2023-09-19 西安紫光国芯半导体股份有限公司 Functional chip, wafer, module equipment and testing method

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