TW375782B - Method of forming intermediate insulation layer in semiconductor device - Google Patents

Method of forming intermediate insulation layer in semiconductor device

Info

Publication number
TW375782B
TW375782B TW087110191A TW87110191A TW375782B TW 375782 B TW375782 B TW 375782B TW 087110191 A TW087110191 A TW 087110191A TW 87110191 A TW87110191 A TW 87110191A TW 375782 B TW375782 B TW 375782B
Authority
TW
Taiwan
Prior art keywords
forming
oxide film
metal interconnection
semiconductor device
insulation layer
Prior art date
Application number
TW087110191A
Other languages
Chinese (zh)
Inventor
Hyun-Jin Jang
Ki-Hong Yang
Se-Jun Oh
Sang-Ki Hong
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW375782B publication Critical patent/TW375782B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76819Smoothing of the dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material

Abstract

Disclosed is a method of forming an intermediate insulation layer with improved insulation and planarization characteristics in a semiconductor device. The method includes the steps of: providing a semiconductor substrate on which a first metal interconnection is formed; forming a first oxide film with high density on the semiconductor substrate; forming a second oxide film on the first oxide film by a plasma enhanced chemical vapor deposition; coating a SOG film on the second oxide film; blanket-etching the SOG film until the SOG film is completely removed; forming a through hole of exposing a selected portion of the first interconnection; and forming a second metal interconnection to electrically connect the resultant substrate which the through hole is formed, to electrically connect the second metal interconnection with the first metal interconnection.
TW087110191A 1997-06-25 1998-06-24 Method of forming intermediate insulation layer in semiconductor device TW375782B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019970027387A KR100257151B1 (en) 1997-06-25 1997-06-25 Method of forming intermetal dielectrics of semiconductor device

Publications (1)

Publication Number Publication Date
TW375782B true TW375782B (en) 1999-12-01

Family

ID=19511237

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087110191A TW375782B (en) 1997-06-25 1998-06-24 Method of forming intermediate insulation layer in semiconductor device

Country Status (2)

Country Link
KR (1) KR100257151B1 (en)
TW (1) TW375782B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100345672B1 (en) * 1999-05-25 2002-07-24 주식회사 하이닉스반도체 Method of forming interlayer dielectric layer using high density plasma oxide in semiconductor device
KR100811180B1 (en) * 2006-10-18 2008-03-07 삼성전자주식회사 A spindle motor and data cording/reproding apparatus

Also Published As

Publication number Publication date
KR19990003506A (en) 1999-01-15
KR100257151B1 (en) 2000-05-15

Similar Documents

Publication Publication Date Title
US5637533A (en) Method for fabricating a diffusion barrier metal layer in a semiconductor device
TW377502B (en) Method of dual damascene
TW429599B (en) Method for forming inductors on the semiconductor substrate
TW368685B (en) Method of fabricating bump electrode
TW353797B (en) Method of shallow trench isolation
TW356572B (en) Method for forming metal wiring of semiconductor devices
KR940010206A (en) Tungsten Plug Formation Method
TW375782B (en) Method of forming intermediate insulation layer in semiconductor device
JPS6482620A (en) Manufacture of semiconductor device
JPH05234935A (en) Semiconductor device and its manufacture
KR970052830A (en) Manufacturing method of semiconductor device
JPH05114578A (en) Semiconductor device and manufacture thereof
TW350129B (en) Manufacturing method of semiconductor formation latches the invention relates to a manufacturing method of semiconductor formation latches
TW358227B (en) Half-embedded metal manufacturing for improvement of planarization of Ics
KR100256825B1 (en) Method of forming metal wiring in semiconductor device
KR950002955B1 (en) Manufacturing method of metal wiring of semiconductor device
KR100252843B1 (en) Method for forming diffusion barrier film of semiconductor device
TW358970B (en) Manufacturing method for tungsten nitride diffusing screen in copper metallization
KR0171016B1 (en) Metal-wiring method of semiconductor device
TW324853B (en) The manufacturing method for plug
TW430947B (en) Method for forming metal interconnects
TW342524B (en) Method of depositing SiH4 oxide by fluoro-doped plasma-enhanced chemical vapor deposition
KR19980026307A (en) Metal layer formation method of semiconductor device
TW366581B (en) Metallization method of forming tungsten plug in making ICs
TW344102B (en) Additive metallization process and structure

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees