TW370723B - Method for reducing current leakage of high capacitivity materials - Google Patents
Method for reducing current leakage of high capacitivity materialsInfo
- Publication number
- TW370723B TW370723B TW086117832A TW86117832A TW370723B TW 370723 B TW370723 B TW 370723B TW 086117832 A TW086117832 A TW 086117832A TW 86117832 A TW86117832 A TW 86117832A TW 370723 B TW370723 B TW 370723B
- Authority
- TW
- Taiwan
- Prior art keywords
- capacitivity
- materials
- current leakage
- reducing current
- anneal
- Prior art date
Links
- 239000000463 material Substances 0.000 title abstract 3
- 238000000034 method Methods 0.000 title abstract 3
- 239000013078 crystal Substances 0.000 abstract 1
- 230000006911 nucleation Effects 0.000 abstract 1
- 238000010899 nucleation Methods 0.000 abstract 1
- 239000002245 particle Substances 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02183—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing tantalum, e.g. Ta2O5
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02197—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW086117832A TW370723B (en) | 1997-11-27 | 1997-11-27 | Method for reducing current leakage of high capacitivity materials |
US09/010,005 US6174765B1 (en) | 1997-11-27 | 1998-01-21 | Method of reducing leakage current in dielectric |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW086117832A TW370723B (en) | 1997-11-27 | 1997-11-27 | Method for reducing current leakage of high capacitivity materials |
Publications (1)
Publication Number | Publication Date |
---|---|
TW370723B true TW370723B (en) | 1999-09-21 |
Family
ID=21627310
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086117832A TW370723B (en) | 1997-11-27 | 1997-11-27 | Method for reducing current leakage of high capacitivity materials |
Country Status (2)
Country | Link |
---|---|
US (1) | US6174765B1 (zh) |
TW (1) | TW370723B (zh) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003519913A (ja) * | 2000-01-06 | 2003-06-24 | アプライド マテリアルズ インコーポレイテッド | コンデンサ構造のための低熱収支金属酸化物堆積 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4201798A (en) * | 1976-11-10 | 1980-05-06 | Solarex Corporation | Method of applying an antireflective coating to a solar cell |
US5434102A (en) * | 1991-02-25 | 1995-07-18 | Symetrix Corporation | Process for fabricating layered superlattice materials and making electronic devices including same |
EP0528564A2 (en) * | 1991-08-20 | 1993-02-24 | National Semiconductor Corporation | Self-aligned stacked gate EPROM cell using tantalum oxide control gate dielectric |
US5723361A (en) * | 1991-12-13 | 1998-03-03 | Symetrix Corporation | Thin films of ABO3 with excess A-site and B-site modifiers and method of fabricating integrated circuits with same |
JP2679599B2 (ja) * | 1993-12-02 | 1997-11-19 | 日本電気株式会社 | 半導体装置の製造方法 |
US5635741A (en) * | 1994-09-30 | 1997-06-03 | Texas Instruments Incorporated | Barium strontium titanate (BST) thin films by erbium donor doping |
KR100360468B1 (ko) * | 1995-03-20 | 2003-01-24 | 삼성전자 주식회사 | 강유전성박막제조방법및이를적용한캐패시터및그제조방법 |
KR0183732B1 (ko) * | 1995-09-01 | 1999-03-20 | 김광호 | 반도체 장치의 캐패시터 제작방법 |
KR0155879B1 (ko) * | 1995-09-13 | 1998-12-01 | 김광호 | 오산화 이탄탈륨 유전막 커패시터 제조방법 |
KR100235949B1 (ko) * | 1996-06-27 | 1999-12-15 | 김영환 | 반도체 소자의 캐패시터 제조 방법 |
-
1997
- 1997-11-27 TW TW086117832A patent/TW370723B/zh not_active IP Right Cessation
-
1998
- 1998-01-21 US US09/010,005 patent/US6174765B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6174765B1 (en) | 2001-01-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |