TW363267B - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
TW363267B
TW363267B TW086118627A TW86118627A TW363267B TW 363267 B TW363267 B TW 363267B TW 086118627 A TW086118627 A TW 086118627A TW 86118627 A TW86118627 A TW 86118627A TW 363267 B TW363267 B TW 363267B
Authority
TW
Taiwan
Prior art keywords
electrode layer
semiconductor substrate
voltage
gate electrode
low
Prior art date
Application number
TW086118627A
Other languages
Chinese (zh)
Inventor
Jae-Kap Kim
Original Assignee
Magnachip Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Magnachip Semiconductor Ltd filed Critical Magnachip Semiconductor Ltd
Application granted granted Critical
Publication of TW363267B publication Critical patent/TW363267B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

A method of fabricating a semiconductor device having high-voltage and low-voltage transistors on a single semiconductor substrate, the method comprising the steps of: forming layers for isolation of high-voltage and low-voltage transistor regions on the first conductive semiconductor substrate; forming gate insulating layers and gate electrode layer all over the surface of the semiconductor substrate in serial order; forming a mask used for ion implantation on the gate electrode layer of the high-voltage transistor region to expose the gate electrode layer of the low-voltage transistor region; implanting a second conductive impurity in the exposed gate electrode layer of the low-voltage transistor region; removing the mask for ion implantation; patterning the gate electrode layer and gate insulating layers to form gate electrodes in each transistor region; and implanting a second conductive impurity in all the surface of the semiconductor substrate including the gate electrodes to form source-drain regions on the semiconductor substrate at both sides of the respective gate electrodes.
TW086118627A 1996-12-30 1997-12-10 Method of fabricating semiconductor device TW363267B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960077752A KR100247637B1 (en) 1996-12-30 1996-12-30 Semiconductor device and method for manufacturing the same

Publications (1)

Publication Number Publication Date
TW363267B true TW363267B (en) 1999-07-01

Family

ID=19492684

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086118627A TW363267B (en) 1996-12-30 1997-12-10 Method of fabricating semiconductor device

Country Status (3)

Country Link
JP (1) JP3182609B2 (en)
KR (1) KR100247637B1 (en)
TW (1) TW363267B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7186623B2 (en) 2003-01-27 2007-03-06 Renesas Technology Corp. Integrated semiconductor device and method of manufacturing thereof

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100320681B1 (en) * 1999-04-17 2002-01-24 윤종용 Semiconductor and method for manufacturing the same
KR100525078B1 (en) * 2004-04-28 2005-11-01 매그나칩 반도체 유한회사 Method for forming a semiconductor device having a high power transistor and a low power transistor
KR100800749B1 (en) * 2006-12-11 2008-02-01 동부일렉트로닉스 주식회사 Method of fabricating semiconductor device
KR101964262B1 (en) * 2011-11-25 2019-04-02 삼성전자주식회사 Semiconductor device and method of manufacturing same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7186623B2 (en) 2003-01-27 2007-03-06 Renesas Technology Corp. Integrated semiconductor device and method of manufacturing thereof
US7541248B2 (en) 2003-01-27 2009-06-02 Renesas Technology Corp. Integrated semiconductor device and method of manufacturing thereof

Also Published As

Publication number Publication date
KR100247637B1 (en) 2000-03-15
JPH1131750A (en) 1999-02-02
JP3182609B2 (en) 2001-07-03
KR19980058428A (en) 1998-10-07

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