TW348284B - Wafer formed with circuit pattern and process for producing the same - Google Patents

Wafer formed with circuit pattern and process for producing the same

Info

Publication number
TW348284B
TW348284B TW086118713A TW86118713A TW348284B TW 348284 B TW348284 B TW 348284B TW 086118713 A TW086118713 A TW 086118713A TW 86118713 A TW86118713 A TW 86118713A TW 348284 B TW348284 B TW 348284B
Authority
TW
Taiwan
Prior art keywords
region
insulation film
formation region
formation
wafer
Prior art date
Application number
TW086118713A
Other languages
Chinese (zh)
Inventor
Kaoru Motonami
Jun Amauki
Hideki Doi
Masatoshi Kimura
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of TW348284B publication Critical patent/TW348284B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

A wafer formed with a circuit pattern, which is characterized in comprising: an element formation region (402) formed on the main surface of the wafer (401) and including a plurality of chip formation regions (M,L) divided by a slice line (403); an element non-formation region (404,P) formed on the main surface of the wafer (401) and not formed with a chip; a first region (M) and a second region (L) mutually in electric isolation by an element separation region (2M) installed on separate chip formation regions (M,L); a first insulation film (5M,5L,5P,7M,7L,7P) formed into covering the element formation region (402) and the element non-formation region (404); a semiconductor element (102) having specified functions and formed on the first insulation film (5M,7M) on the first region (M), and a specified film formed on the first insulation film (5P,7P) of the element non-formation region (P) and formed of same layers as the semiconductor element (102); a second insulation film (11M,11L,11P) formed on the first insulation film (5M,5L,5P,7M,7L,7P) in a way covering the semiconductor element (102) and the specified film (8P,9P,10P); and a wiring layer (12M,12L) formed on the second insulation film (11M,11L) on the first region and the second region (M,L), and a conductive layer (12P) formed on the second insulation film (11P) on the element non-formation region (P).
TW086118713A 1997-07-10 1997-12-11 Wafer formed with circuit pattern and process for producing the same TW348284B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9185342A JPH1131695A (en) 1997-07-10 1997-07-10 Wafer with circuit pattern and its manufacture

Publications (1)

Publication Number Publication Date
TW348284B true TW348284B (en) 1998-12-21

Family

ID=16169121

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086118713A TW348284B (en) 1997-07-10 1997-12-11 Wafer formed with circuit pattern and process for producing the same

Country Status (4)

Country Link
JP (1) JPH1131695A (en)
KR (1) KR100296205B1 (en)
DE (1) DE19756527C2 (en)
TW (1) TW348284B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002367897A (en) * 2001-06-11 2002-12-20 Denso Corp Method for manufacturing semiconductor device
KR101037321B1 (en) 2003-12-15 2011-05-27 매그나칩 반도체 유한회사 Structure of capacitor in semiconductor device
CN100370580C (en) 2004-03-29 2008-02-20 雅马哈株式会社 Semiconductor wafer and its producing method
KR101124563B1 (en) 2008-03-05 2012-03-16 주식회사 하이닉스반도체 Method for forming capacitor of semiconductor device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01251631A (en) * 1988-03-30 1989-10-06 Matsushita Electron Corp Wafer
JP2645478B2 (en) * 1988-10-07 1997-08-25 富士通株式会社 Method for manufacturing semiconductor device
JP2820187B2 (en) * 1992-04-16 1998-11-05 三星電子 株式会社 Method for manufacturing semiconductor device
JPH0831710A (en) * 1994-07-19 1996-02-02 Nippon Steel Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPH1131695A (en) 1999-02-02
KR19990013293A (en) 1999-02-25
KR100296205B1 (en) 2001-10-25
DE19756527C2 (en) 2001-02-22
DE19756527A1 (en) 1999-01-14

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