TW340974B - Semicondcutor and the manufacturing method - Google Patents

Semicondcutor and the manufacturing method

Info

Publication number
TW340974B
TW340974B TW086111412A TW86111412A TW340974B TW 340974 B TW340974 B TW 340974B TW 086111412 A TW086111412 A TW 086111412A TW 86111412 A TW86111412 A TW 86111412A TW 340974 B TW340974 B TW 340974B
Authority
TW
Taiwan
Prior art keywords
semicondcutor
manufacturing
misfet group
insulation layer
gate electrodes
Prior art date
Application number
TW086111412A
Other languages
English (en)
Chinese (zh)
Inventor
Takeo Fujii
Original Assignee
Nippon Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co filed Critical Nippon Electric Co
Application granted granted Critical
Publication of TW340974B publication Critical patent/TW340974B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
TW086111412A 1996-08-15 1997-08-08 Semicondcutor and the manufacturing method TW340974B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21564596A JP3212882B2 (ja) 1996-08-15 1996-08-15 半導体装置の製造方法

Publications (1)

Publication Number Publication Date
TW340974B true TW340974B (en) 1998-09-21

Family

ID=16675842

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086111412A TW340974B (en) 1996-08-15 1997-08-08 Semicondcutor and the manufacturing method

Country Status (4)

Country Link
US (1) US6537882B1 (ko)
JP (1) JP3212882B2 (ko)
KR (1) KR100272719B1 (ko)
TW (1) TW340974B (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1309048C (zh) * 2004-03-26 2007-04-04 力晶半导体股份有限公司 浮置栅极的形成方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4775642A (en) * 1987-02-02 1988-10-04 Motorola, Inc. Modified source/drain implants in a double-poly non-volatile memory process
US5252504A (en) 1988-05-02 1993-10-12 Micron Technology, Inc. Reverse polysilicon CMOS fabrication
US5323343A (en) * 1989-10-26 1994-06-21 Mitsubishi Denki Kabushiki Kaisha DRAM device comprising a stacked type capacitor and a method of manufacturing thereof
US5032530A (en) * 1989-10-27 1991-07-16 Micron Technology, Inc. Split-polysilicon CMOS process incorporating unmasked punchthrough and source/drain implants
US5021353A (en) * 1990-02-26 1991-06-04 Micron Technology, Inc. Split-polysilicon CMOS process incorporating self-aligned silicidation of conductive regions
US5026657A (en) * 1990-03-12 1991-06-25 Micron Technology, Inc. Split-polysilicon CMOS DRAM process incorporating self-aligned silicidation of the cell plate, transistor gates, and N+ regions
US5030585A (en) * 1990-03-22 1991-07-09 Micron Technology, Inc. Split-polysilicon CMOS DRAM process incorporating selective self-aligned silicidation of conductive regions and nitride blanket protection of N-channel regions during P-channel gate spacer formation
US5023190A (en) * 1990-08-03 1991-06-11 Micron Technology, Inc. CMOS processes
JPH0590537A (ja) 1991-09-27 1993-04-09 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP3258095B2 (ja) 1991-10-18 2002-02-18 マイクロン・テクノロジー・インコーポレイテッド 相補型ｎ−チャンネル及びｐ−チャンネル・デバイスを備えた集積回路の製造方法及び形成方法
DE69322928T2 (de) * 1992-10-27 1999-07-29 Nec Corp Verfahren zur Herstellung eines nicht-flüchtigen Halbleiter-Speicherbauteils
JPH06177349A (ja) * 1992-12-02 1994-06-24 Matsushita Electric Ind Co Ltd 高密度ｄｒａｍの製造方法および高密度ｄｒａｍ
JPH07169849A (ja) 1993-12-16 1995-07-04 Fujitsu Ltd 半導体装置の製造方法
US5526306A (en) * 1994-02-10 1996-06-11 Mega Chips Corporation Semiconductor memory device and method of fabricating the same
US5595922A (en) * 1994-10-28 1997-01-21 Texas Instruments Process for thickening selective gate oxide regions
JP2643907B2 (ja) * 1995-05-12 1997-08-25 日本電気株式会社 半導体装置の製造方法
US5489546A (en) * 1995-05-24 1996-02-06 Micron Technology, Inc. Method of forming CMOS devices using independent thickness spacers in a split-polysilicon DRAM process
JP2809183B2 (ja) 1996-03-27 1998-10-08 日本電気株式会社 半導体記憶装置の製造方法

Also Published As

Publication number Publication date
JPH1065017A (ja) 1998-03-06
US6537882B1 (en) 2003-03-25
KR19980018697A (ko) 1998-06-05
KR100272719B1 (ko) 2000-12-01
JP3212882B2 (ja) 2001-09-25

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