TW326110B - Manufacturing method for inversed T-type well component - Google Patents

Manufacturing method for inversed T-type well component

Info

Publication number
TW326110B
TW326110B TW085115989A TW85115989A TW326110B TW 326110 B TW326110 B TW 326110B TW 085115989 A TW085115989 A TW 085115989A TW 85115989 A TW85115989 A TW 85115989A TW 326110 B TW326110 B TW 326110B
Authority
TW
Taiwan
Prior art keywords
diffusion zone
inversed
type well
manufacturing
well component
Prior art date
Application number
TW085115989A
Other languages
English (en)
Inventor
Gwo-Ming Jang
Jy-I Yang
Ming-Ruey Mau
Original Assignee
Nat Science Council
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nat Science Council filed Critical Nat Science Council
Priority to TW085115989A priority Critical patent/TW326110B/zh
Priority to US08/864,988 priority patent/US6046475A/en
Application granted granted Critical
Publication of TW326110B publication Critical patent/TW326110B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thyristors (AREA)
  • Photovoltaic Devices (AREA)
TW085115989A 1996-12-24 1996-12-24 Manufacturing method for inversed T-type well component TW326110B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW085115989A TW326110B (en) 1996-12-24 1996-12-24 Manufacturing method for inversed T-type well component
US08/864,988 US6046475A (en) 1996-12-24 1997-05-29 Structure and method for manufacturing devices having inverse T-shaped well regions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW085115989A TW326110B (en) 1996-12-24 1996-12-24 Manufacturing method for inversed T-type well component

Publications (1)

Publication Number Publication Date
TW326110B true TW326110B (en) 1998-02-01

Family

ID=21625638

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085115989A TW326110B (en) 1996-12-24 1996-12-24 Manufacturing method for inversed T-type well component

Country Status (2)

Country Link
US (1) US6046475A (zh)
TW (1) TW326110B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7589007B2 (en) * 1999-06-02 2009-09-15 Arizona Board Of Regents For And On Behalf Of Arizona State University MESFETs integrated with MOSFETs on common substrate and methods of forming the same
US7894256B1 (en) 2005-06-22 2011-02-22 T-Ram Semiconductor, Inc. Thyristor based memory cell
US7460395B1 (en) 2005-06-22 2008-12-02 T-Ram Semiconductor, Inc. Thyristor-based semiconductor memory and memory array with data refresh
US7894255B1 (en) 2005-06-22 2011-02-22 T-Ram Semiconductor, Inc. Thyristor based memory cell
US8093107B1 (en) 2005-06-22 2012-01-10 T-Ram Semiconductor, Inc. Thyristor semiconductor memory and method of manufacture
US8685817B1 (en) 2012-11-19 2014-04-01 International Business Machines Corporation Metal gate structures for CMOS transistor devices having reduced parasitic capacitance

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4697198A (en) * 1984-08-22 1987-09-29 Hitachi, Ltd. MOSFET which reduces the short-channel effect
US4868620A (en) * 1988-07-14 1989-09-19 Pacific Bell High-voltage pull-up device
JPH0254537A (ja) * 1988-08-18 1990-02-23 Seiko Epson Corp 半導体装置及び半導体装置の製造方法
JPH0758791B2 (ja) * 1990-08-01 1995-06-21 株式会社東芝 Mos型半導体装置
US5466957A (en) * 1991-10-31 1995-11-14 Sharp Kabushiki Kaisha Transistor having source-to-drain nonuniformly-doped channel and method for fabricating the same
US5605855A (en) * 1995-02-28 1997-02-25 Motorola Inc. Process for fabricating a graded-channel MOS device
US5608253A (en) * 1995-03-22 1997-03-04 Advanced Micro Devices Inc. Advanced transistor structures with optimum short channel controls for high density/high performance integrated circuits
JPH09298195A (ja) * 1996-05-08 1997-11-18 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5668024A (en) * 1996-07-17 1997-09-16 Taiwan Semiconductor Manufacturing Company CMOS device structure with reduced risk of salicide bridging and reduced resistance via use of a ultra shallow, junction extension, ion implantation process

Also Published As

Publication number Publication date
US6046475A (en) 2000-04-04

Similar Documents

Publication Publication Date Title
EP0660391A3 (en) Semiconductor arrangement with an isolation zone with an isolation trench and method for producing the same.
TW358992B (en) Semiconductor device and method of fabricating the same
IT8349330A0 (it) Metodo per fabbricare un sostrato composito di semiconduttore su isolante, con profilo controllato perdensita' di difetti
EP0643403A3 (en) Inductive structures for semiconductor integrated circuits.
IT1243104B (it) Metodo per la fabbricazione di un semiconduttore.
EP0159483A3 (en) Method of manufacturing a semiconductor device having a well, e.g. a complementary semiconductor device
TW332314B (en) The semiconductor device and its producing method
EP0634788A3 (en) Method of manufacturing semiconductor components using a selective CVD method.
DE3582374D1 (de) Halbleiter-druckwandler.
EP0604234A3 (en) Method of manufacturing a semiconductor device.
DE3584301D1 (de) Hochfrequenz-halbleiteranordnung.
IT8323153A0 (it) Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo.
TW351021B (en) Photoelectric conversion apparatus and image reading apparatus
TW326110B (en) Manufacturing method for inversed T-type well component
DE69009626D1 (de) Masterslice-Halbleitervorrichtung.
TW356600B (en) A method for fabricating a buried doped region and vertical field effect transistor (VFET) fabricated based on said method
TW347555B (en) Trench scribe line for decreased chip spacing
TW337025B (en) Semiconductor device and its manufacturing method
TW359019B (en) Semiconductor device
TW334632B (en) Field effective semiconductor
EP1220306A4 (en) SEMICONDUCTOR MANUFACTURING METHOD
TW356567B (en) Planarized gate conductor on substrate with above-surface isolation
TW364177B (en) Method to produce barrier-free semiconductor memory device and said integrated semiconductor memory device
TW329046B (en) COMS-circuit
EP0622832A3 (en) Method of connecting a wiring with a semiconductor region and semiconductor device obtained by this method.

Legal Events

Date Code Title Description
MK4A Expiration of patent term of an invention patent